target/linux/lantiq/patches-3.2/0022-MIPS-lantiq-use-devres-managed-gpios.patch

   1 From 9819317c005d57e1a5924af1faa43f73ed156a2d Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 8 Mar 2012 08:37:25 +0100
   4 Subject: [PATCH 22/70] MIPS: lantiq: use devres managed gpios
   5
   6 3.2 introduced devm_request_gpio() to allow managed gpios.
   7
   8 The devres api requires a struct device pointer to work. Add a parameter to ltq_gpio_request()
   9 so that managed gpios can work.
  10
  11 Signed-off-by: John Crispin <blogic@openwrt.org>
  12 ---
  13  .../include/asm/mach-lantiq/falcon/lantiq_soc.h    |    4 +---
  14  arch/mips/include/asm/mach-lantiq/lantiq.h         |    4 ++++
  15  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 ---
  16  arch/mips/lantiq/falcon/gpio.c                     |    4 ++--
  17  arch/mips/lantiq/falcon/prom.c                     |    7 -------
  18  arch/mips/lantiq/xway/gpio.c                       |    4 ++--
  19  arch/mips/lantiq/xway/gpio_stp.c                   |   13 ++++++++-----
  20  arch/mips/pci/pci-lantiq.c                         |   18 ++++++++++--------
  21  drivers/net/ethernet/lantiq_etop.c                 |    9 ++++++---
  22  drivers/tty/serial/lantiq.c                        |   12 ++++++++++++
  23  10 files changed, 45 insertions(+), 33 deletions(-)
  24
  25 --- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
  26 +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
  27 @@ -126,9 +126,7 @@ extern __iomem void *ltq_sys1_membase;
  28  #define ltq_sys1_w32_mask(clear, set, reg)   \
  29         ltq_sys1_w32((ltq_sys1_r32(reg) & ~(clear)) | (set), reg)
  30
  31 -/* gpio_request wrapper to help configure the pin */
  32 -extern int  ltq_gpio_request(unsigned int pin, unsigned int mux,
  33 -                               unsigned int dir, const char *name);
  34 +/* gpio wrapper to help configure the pin muxing */
  35  extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux);
  36
  37  /* to keep the irq code generic we need to define these to 0 as falcon
  38 --- a/arch/mips/include/asm/mach-lantiq/lantiq.h
  39 +++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
  40 @@ -37,6 +37,10 @@ extern unsigned int ltq_get_soc_type(voi
  41  /* spinlock all ebu i/o */
  42  extern spinlock_t ebu_lock;
  43
  44 +/* request a non-gpio and set the PIO config */
  45 +extern int ltq_gpio_request(struct device *dev, unsigned int pin,
  46 +               unsigned int mux, unsigned int dir, const char *name);
  47 +
  48  /* some irq helpers */
  49  extern void ltq_disable_irq(struct irq_data *data);
  50  extern void ltq_mask_and_ack_irq(struct irq_data *data);
  51 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  52 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  53 @@ -145,9 +145,6 @@
  54  extern __iomem void *ltq_ebu_membase;
  55  extern __iomem void *ltq_cgu_membase;
  56
  57 -/* request a non-gpio and set the PIO config */
  58 -extern int  ltq_gpio_request(unsigned int pin, unsigned int mux,
  59 -                               unsigned int dir, const char *name);
  60  extern void ltq_pmu_enable(unsigned int module);
  61  extern void ltq_pmu_disable(unsigned int module);
  62  extern void ltq_cgu_enable(unsigned int clk);
  63 --- a/arch/mips/lantiq/falcon/gpio.c
  64 +++ b/arch/mips/lantiq/falcon/gpio.c
  65 @@ -97,7 +97,7 @@ int ltq_gpio_mux_set(unsigned int pin, u
  66  }
  67  EXPORT_SYMBOL(ltq_gpio_mux_set);
  68
  69 -int ltq_gpio_request(unsigned int pin, unsigned int mux,
  70 +int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux,
  71                         unsigned int dir, const char *name)
  72  {
  73         int port = pin / 100;
  74 @@ -106,7 +106,7 @@ int ltq_gpio_request(unsigned int pin, u
  75         if (offset >= PINS_PER_PORT || port >= MAX_PORTS)
  76                 return -EINVAL;
  77
  78 -       if (gpio_request(pin, name)) {
  79 +       if (devm_gpio_request(dev, pin, name)) {
  80                 pr_err("failed to setup lantiq gpio: %s\n", name);
  81                 return -EBUSY;
  82         }
  83 --- a/arch/mips/lantiq/falcon/prom.c
  84 +++ b/arch/mips/lantiq/falcon/prom.c
  85 @@ -27,9 +27,6 @@
  86  #define TYPE_SHIFT     26
  87  #define TYPE_MASK      0x3C000000
  88
  89 -#define MUXC_SIF_RX_PIN                112
  90 -#define MUXC_SIF_TX_PIN                113
  91 -
  92  /* this parameter allows us enable/disable asc1 via commandline */
  93  static int register_asc1;
  94  static int __init
  95 @@ -48,10 +45,6 @@ ltq_soc_setup(void)
  96         falcon_register_gpio();
  97         if (register_asc1) {
  98                 ltq_register_asc(1);
  99 -               if (ltq_gpio_request(MUXC_SIF_RX_PIN, 3, 0, "asc1-rx"))
 100 -                       pr_err("failed to request asc1-rx");
 101 -               if (ltq_gpio_request(MUXC_SIF_TX_PIN, 3, 1, "asc1-tx"))
 102 -                       pr_err("failed to request asc1-tx");
 103                 ltq_sysctl_activate(SYSCTL_SYS1, ACTS_ASC1_ACT);
 104         }
 105  }
 106 --- a/arch/mips/lantiq/xway/gpio.c
 107 +++ b/arch/mips/lantiq/xway/gpio.c
 108 @@ -50,14 +50,14 @@ int irq_to_gpio(unsigned int gpio)
 109  }
 110  EXPORT_SYMBOL(irq_to_gpio);
 111
 112 -int ltq_gpio_request(unsigned int pin, unsigned int mux,
 113 +int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux,
 114                         unsigned int dir, const char *name)
 115  {
 116         int id = 0;
 117
 118         if (pin >= (MAX_PORTS * PINS_PER_PORT))
 119                 return -EINVAL;
 120 -       if (gpio_request(pin, name)) {
 121 +       if (devm_gpio_request(dev, pin, name)) {
 122                 pr_err("failed to setup lantiq gpio: %s\n", name);
 123                 return -EBUSY;
 124         }
 125 --- a/arch/mips/lantiq/xway/gpio_stp.c
 126 +++ b/arch/mips/lantiq/xway/gpio_stp.c
 127 @@ -80,11 +80,6 @@ static struct gpio_chip ltq_stp_chip = {
 128
 129  static int ltq_stp_hw_init(void)
 130  {
 131 -       /* the 3 pins used to control the external stp */
 132 -       ltq_gpio_request(4, 2, 1, "stp-st");
 133 -       ltq_gpio_request(5, 2, 1, "stp-d");
 134 -       ltq_gpio_request(6, 2, 1, "stp-sh");
 135 -
 136         /* sane defaults */
 137         ltq_stp_w32(0, LTQ_STP_AR);
 138         ltq_stp_w32(0, LTQ_STP_CPU0);
 139 @@ -133,6 +128,14 @@ static int __devinit ltq_stp_probe(struc
 140                 dev_err(&pdev->dev, "failed to remap STP memory\n");
 141                 return -ENOMEM;
 142         }
 143 +
 144 +       /* the 3 pins used to control the external stp */
 145 +       if (ltq_gpio_request(&pdev->dev, 4, 2, 1, "stp-st") ||
 146 +                       ltq_gpio_request(&pdev->dev, 5, 2, 1, "stp-d") ||
 147 +                       ltq_gpio_request(&pdev->dev, 6, 2, 1, "stp-sh")) {
 148 +               dev_err(&pdev->dev, "failed to request needed gpios\n");
 149 +               return -EBUSY;
 150 +       }
 151         ret = gpiochip_add(&ltq_stp_chip);
 152         if (!ret)
 153                 ret = ltq_stp_hw_init();
 154 --- a/arch/mips/pci/pci-lantiq.c
 155 +++ b/arch/mips/pci/pci-lantiq.c
 156 @@ -150,24 +150,26 @@ static u32 ltq_calc_bar11mask(void)
 157         return bar11mask;
 158  }
 159
 160 -static void ltq_pci_setup_gpio(int gpio)
 161 +static void ltq_pci_setup_gpio(struct device *dev)
 162  {
 163 +       struct ltq_pci_data *conf = (struct ltq_pci_data *) dev->platform_data;
 164         int i;
 165         for (i = 0; i < ARRAY_SIZE(ltq_pci_gpio_map); i++) {
 166 -               if (gpio & (1 << i)) {
 167 -                       ltq_gpio_request(ltq_pci_gpio_map[i].pin,
 168 +               if (conf->gpio & (1 << i)) {
 169 +                       ltq_gpio_request(dev, ltq_pci_gpio_map[i].pin,
 170                                 ltq_pci_gpio_map[i].mux,
 171                                 ltq_pci_gpio_map[i].dir,
 172                                 ltq_pci_gpio_map[i].name);
 173                 }
 174         }
 175 -       ltq_gpio_request(21, 0, 1, "pci-reset");
 176 -       ltq_pci_req_mask = (gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
 177 +       ltq_gpio_request(dev, 21, 0, 1, "pci-reset");
 178 +       ltq_pci_req_mask = (conf->gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
 179  }
 180
 181 -static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)
 182 +static int __devinit ltq_pci_startup(struct device *dev)
 183  {
 184         u32 temp_buffer;
 185 +       struct ltq_pci_data *conf = (struct ltq_pci_data *) dev->platform_data;
 186
 187         /* set clock to 33Mhz */
 188         if (ltq_is_ar9()) {
 189 @@ -190,7 +192,7 @@ static int __devinit ltq_pci_startup(str
 190         }
 191
 192         /* setup pci clock and gpis used by pci */
 193 -       ltq_pci_setup_gpio(conf->gpio);
 194 +       ltq_pci_setup_gpio(dev);
 195
 196         /* enable auto-switching between PCI and EBU */
 197         ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
 198 @@ -275,7 +277,7 @@ static int __devinit ltq_pci_probe(struc
 199                 ioremap_nocache(LTQ_PCI_CFG_BASE, LTQ_PCI_CFG_BASE);
 200         ltq_pci_controller.io_map_base =
 201                 (unsigned long)ioremap(LTQ_PCI_IO_BASE, LTQ_PCI_IO_SIZE - 1);
 202 -       ltq_pci_startup(ltq_pci_data);
 203 +       ltq_pci_startup(&pdev->dev);
 204         register_pci_controller(&ltq_pci_controller);
 205
 206         return 0;
 207 --- a/drivers/net/ethernet/lantiq_etop.c
 208 +++ b/drivers/net/ethernet/lantiq_etop.c
 209 @@ -291,9 +291,6 @@ ltq_etop_gbit_init(void)
 210  {
 211         ltq_pmu_enable(PMU_SWITCH);
 212
 213 -       ltq_gpio_request(42, 2, 1, "MDIO");
 214 -       ltq_gpio_request(43, 2, 1, "MDC");
 215 -
 216         ltq_gbit_w32_mask(0, GCTL0_SE, LTQ_GBIT_GCTL0);
 217         /** Disable MDIO auto polling mode */
 218         ltq_gbit_w32_mask(0, PX_CTL_DMDIO, LTQ_GBIT_P0_CTL);
 219 @@ -868,6 +865,12 @@ ltq_etop_probe(struct platform_device *p
 220                         err = -ENOMEM;
 221                         goto err_out;
 222                 }
 223 +               if (ltq_gpio_request(&pdev->dev, 42, 2, 1, "MDIO") ||
 224 +                               ltq_gpio_request(&pdev->dev, 43, 2, 1, "MDC")) {
 225 +                       dev_err(&pdev->dev, "failed to request MDIO gpios\n");
 226 +                       err = -EBUSY;
 227 +                       goto err_out;
 228 +               }
 229         }
 230
 231         dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4);
 232 --- a/drivers/tty/serial/lantiq.c
 233 +++ b/drivers/tty/serial/lantiq.c
 234 @@ -107,6 +107,9 @@
 235  #define ASCFSTAT_TXFREEMASK    0x3F000000
 236  #define ASCFSTAT_TXFREEOFF     24
 237
 238 +#define MUXC_SIF_RX_PIN                112
 239 +#define MUXC_SIF_TX_PIN                113
 240 +
 241  static void lqasc_tx_chars(struct uart_port *port);
 242  static struct ltq_uart_port *lqasc_port[MAXPORTS];
 243  static struct uart_driver lqasc_reg;
 244 @@ -529,6 +532,15 @@ lqasc_request_port(struct uart_port *por
 245                 if (port->membase == NULL)
 246                         return -ENOMEM;
 247         }
 248 +       if (ltq_is_falcon() && (port->line == 1)) {
 249 +               struct ltq_uart_port *ltq_port = lqasc_port[pdev->id];
 250 +               if (ltq_gpio_request(&pdev->dev, MUXC_SIF_RX_PIN,
 251 +                               3, 0, "asc1-rx"))
 252 +                       return -EBUSY;
 253 +               if (ltq_gpio_request(&pdev->dev, MUXC_SIF_TX_PIN,
 254 +                               3, 1, "asc1-tx"))
 255 +                       return -EBUSY;
 256 +       }
 257         return 0;
 258  }
 259