target/linux/ppc40x/patches-2.6.30/005-magicboxv1.patch

   1 --- /dev/null
   2 +++ b/arch/powerpc/boot/cuboot-magicboxv1.c
   3 @@ -0,0 +1,41 @@
   4 +/*
   5 + * Old U-boot compatibility for Magicbox v1
   6 + *
   7 + * Author: Imre Kaloz <kaloz@openwrt.org>
   8 + *
   9 + * This program is free software; you can redistribute it and/or modify it
  10 + * under the terms of the GNU General Public License version 2 as published
  11 + * by the Free Software Foundation.
  12 + */
  13 +
  14 +#include "ops.h"
  15 +#include "io.h"
  16 +#include "dcr.h"
  17 +#include "stdio.h"
  18 +#include "4xx.h"
  19 +#include "44x.h"
  20 +#include "cuboot.h"
  21 +
  22 +#define TARGET_4xx
  23 +#define TARGET_405EP
  24 +#include "ppcboot.h"
  25 +
  26 +static bd_t bd;
  27 +
  28 +static void magicboxv1_fixups(void)
  29 +{
  30 +       ibm405ep_fixup_clocks(25000000);
  31 +       ibm4xx_sdram_fixup_memsize();
  32 +       dt_fixup_mac_addresses(&bd.bi_enetaddr);
  33 +}
  34 +
  35 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
  36 +               unsigned long r6, unsigned long r7)
  37 +{
  38 +       CUBOOT_INIT();
  39 +       platform_ops.fixups = magicboxv1_fixups;
  40 +       platform_ops.exit = ibm40x_dbcr_reset;
  41 +       fdt_init(_dtb_start);
  42 +       serial_console_init();
  43 +}
  44 +
  45 --- /dev/null
  46 +++ b/arch/powerpc/boot/dts/magicboxv1.dts
  47 @@ -0,0 +1,217 @@
  48 +/*
  49 + * Device Tree Source for Magicbox v1
  50 + *
  51 + * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
  52 + *
  53 + * Based on walnut.dts
  54 + *
  55 + * This file is licensed under the terms of the GNU General Public
  56 + * License version 2.  This program is licensed "as is" without
  57 + * any warranty of any kind, whether express or implied.
  58 + */
  59 +
  60 +/dts-v1/;
  61 +
  62 +/ {
  63 +       #address-cells = <1>;
  64 +       #size-cells = <1>;
  65 +       model = "magicboxv1";
  66 +       compatible = "magicboxv1";
  67 +       dcr-parent = <&{/cpus/cpu@0}>;
  68 +
  69 +       aliases {
  70 +               ethernet0 = &EMAC;
  71 +               serial0 = &UART;
  72 +       };
  73 +
  74 +       cpus {
  75 +               #address-cells = <1>;
  76 +               #size-cells = <0>;
  77 +
  78 +               cpu@0 {
  79 +                       device_type = "cpu";
  80 +                       model = "PowerPC,405EP";
  81 +                       reg = <0x00000000>;
  82 +                       clock-frequency = <0xbebc200>; /* Filled in by zImage */
  83 +                       timebase-frequency = <0>; /* Filled in by zImage */
  84 +                       i-cache-line-size = <20>;
  85 +                       d-cache-line-size = <20>;
  86 +                       i-cache-size = <4000>;
  87 +                       d-cache-size = <4000>;
  88 +                       dcr-controller;
  89 +                       dcr-access-method = "native";
  90 +               };
  91 +       };
  92 +
  93 +       memory {
  94 +               device_type = "memory";
  95 +               reg = <0x00000000 0x00000000>; /* Filled in by zImage */
  96 +       };
  97 +
  98 +       UIC0: interrupt-controller {
  99 +               compatible = "ibm,uic";
 100 +               interrupt-controller;
 101 +               cell-index = <0>;
 102 +               dcr-reg = <0x0c0 0x009>;
 103 +               #address-cells = <0>;
 104 +               #size-cells = <0>;
 105 +               #interrupt-cells = <2>;
 106 +       };
 107 +
 108 +       plb {
 109 +               compatible = "ibm,plb3";
 110 +               #address-cells = <1>;
 111 +               #size-cells = <1>;
 112 +               ranges;
 113 +               clock-frequency = <0>; /* Filled in by zImage */
 114 +
 115 +               SDRAM0: memory-controller {
 116 +                       compatible = "ibm,sdram-405ep";
 117 +                       dcr-reg = <0x010 0x002>;
 118 +               };
 119 +
 120 +               MAL: mcmal {
 121 +                       compatible = "ibm,mcmal-405ep", "ibm,mcmal";
 122 +                       dcr-reg = <0x180 0x062>;
 123 +                       num-tx-chans = <4>;
 124 +                       num-rx-chans = <2>;
 125 +                       interrupt-parent = <&UIC0>;
 126 +                       interrupts = <
 127 +                               0xb 0x4 /* TXEOB */
 128 +                               0xc 0x4 /* RXEOB */
 129 +                               0xa 0x4 /* SERR */
 130 +                               0xd 0x4 /* TXDE */
 131 +                               0xe 0x4 /* RXDE */>;
 132 +               };
 133 +
 134 +               POB0: opb {
 135 +                       compatible = "ibm,opb-405ep", "ibm,opb";
 136 +                       #address-cells = <1>;
 137 +                       #size-cells = <1>;
 138 +                       ranges = <0xef600000 0xef600000 0x00a00000>;
 139 +                       dcr-reg = <0x0a0 0x005>;
 140 +                       clock-frequency = <0>; /* Filled in by zImage */
 141 +
 142 +                       UART: serial@ef600300 {
 143 +                               device_type = "serial";
 144 +                               compatible = "ns16550";
 145 +                               reg = <0xef600300 0x00000008>;
 146 +                               virtual-reg = <0xef600300>;
 147 +                               clock-frequency = <0>; /* Filled in by zImage */
 148 +                               current-speed = <115200>;
 149 +                               interrupt-parent = <&UIC0>;
 150 +                               interrupts = <0x0 0x4>;
 151 +                       };
 152 +
 153 +                       IIC: i2c@ef600500 {
 154 +                               compatible = "ibm,iic-405ep", "ibm,iic";
 155 +                               reg = <0xef600500 0x00000011>;
 156 +                               interrupt-parent = <&UIC0>;
 157 +                               interrupts = <0x2 0x4>;
 158 +                       };
 159 +
 160 +                       GPIO: gpio@ef600700 {
 161 +                               compatible = "ibm,gpio-405ep";
 162 +                               reg = <0xef600700 0x00000020>;
 163 +                       };
 164 +
 165 +                       EMAC: ethernet@ef600800 {
 166 +                               linux,network-index = <0x0>;
 167 +                               device_type = "network";
 168 +                               compatible = "ibm,emac-405ep", "ibm,emac";
 169 +                               interrupt-parent = <&UIC0>;
 170 +                               interrupts = <
 171 +                                       0xf 0x4 /* Ethernet */
 172 +                                       0x9 0x4 /* Ethernet Wake Up */>;
 173 +                               local-mac-address = [000000000000]; /* Filled in by zImage */
 174 +                               reg = <0xef600800 0x00000070>;
 175 +                               mal-device = <&MAL>;
 176 +                               mal-tx-channel = <0>;
 177 +                               mal-rx-channel = <0>;
 178 +                               cell-index = <0>;
 179 +                               max-frame-size = <0x5dc>;
 180 +                               rx-fifo-size = <0x1000>;
 181 +                               tx-fifo-size = <0x800>;
 182 +                               phy-mode = "mii";
 183 +                               phy-map = <0x00000000>;
 184 +                       };
 185 +
 186 +               };
 187 +
 188 +               EBC0: ebc {
 189 +                       compatible = "ibm,ebc-405ep", "ibm,ebc";
 190 +                       dcr-reg = <0x012 0x002>;
 191 +                       #address-cells = <2>;
 192 +                       #size-cells = <1>;
 193 +                       /* The ranges property is supplied by the bootwrapper
 194 +                        * and is based on the firmware's configuration of the
 195 +                        * EBC bridge
 196 +                        */
 197 +                       clock-frequency = <0>; /* Filled in by zImage */
 198 +
 199 +                       nor_flash@ffc00000 {
 200 +                               compatible = "cfi-flash";
 201 +                               bank-width = <2>;
 202 +                               reg = <0x00000000 0xffc00000 0x00400000>;
 203 +                               #address-cells = <1>;
 204 +                               #size-cells = <1>;
 205 +                               partition@0 {
 206 +                                       label = "linux";
 207 +                                       reg = <0x0 0x120000>;
 208 +                               };
 209 +                               partition@120000 {
 210 +                                       label = "rootfs";
 211 +                                       reg = <0x120000 0x2a0000>;
 212 +                               };
 213 +                               partition@3c0000 {
 214 +                                       label = "u-boot";
 215 +                                       reg = <0x3c0000 0x30000>;
 216 +                                       read-only;
 217 +                               };
 218 +                       };
 219 +               };
 220 +
 221 +               PCI0: pci@ec000000 {
 222 +                       device_type = "pci";
 223 +                       #interrupt-cells = <1>;
 224 +                       #size-cells = <2>;
 225 +                       #address-cells = <3>;
 226 +                       compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
 227 +                       primary;
 228 +                       reg = <0xeec00000 0x00000008    /* Config space access */
 229 +                              0xeed80000 0x00000004    /* IACK */
 230 +                              0xeed80000 0x00000004    /* Special cycle */
 231 +                              0xef480000 0x00000040>;  /* Internal registers */
 232 +
 233 +                       /* Outbound ranges, one memory and one IO,
 234 +                        * later cannot be changed. Chip supports a second
 235 +                        * IO range but we don't use it for now
 236 +                        */
 237 +                       ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
 238 +                                 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
 239 +
 240 +                       /* Inbound 2GB range starting at 0 */
 241 +                       dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
 242 +
 243 +                       /* Magicbox v1 has all 4 IRQ pins tied together per slot */
 244 +                       interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
 245 +                       interrupt-map = <
 246 +                               /* IDSEL 1 */
 247 +                               0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
 248 +
 249 +                               /* IDSEL 2 */
 250 +                               0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
 251 +
 252 +                               /* IDSEL 3 */
 253 +                               0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
 254 +
 255 +                               /* IDSEL 4 */
 256 +                               0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
 257 +                       >;
 258 +               };
 259 +       };
 260 +
 261 +       chosen {
 262 +               linux,stdout-path = "/plb/opb/serial@ef600300";
 263 +       };
 264 +};
 265 --- a/arch/powerpc/boot/Makefile
 266 +++ b/arch/powerpc/boot/Makefile
 267 @@ -75,7 +75,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
 268                 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
 269                 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
 270                 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
 271 -               cuboot-acadia.c cuboot-amigaone.c
 272 +               cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c
 273  src-boot := $(src-wlib) $(src-plat) empty.c
 274
 275  src-boot := $(addprefix $(obj)/, $(src-boot))
 276 @@ -192,6 +192,7 @@ image-$(CONFIG_DEFAULT_UIMAGE)              += uImag
 277  image-$(CONFIG_EP405)                  += dtbImage.ep405
 278  image-$(CONFIG_WALNUT)                 += treeImage.walnut
 279  image-$(CONFIG_ACADIA)                 += cuImage.acadia
 280 +image-$(CONFIG_MAGICBOXV1)             += cuImage.magicboxv1
 281
 282  # Board ports in arch/powerpc/platform/44x/Kconfig
 283  image-$(CONFIG_EBONY)                  += treeImage.ebony cuImage.ebony
 284 --- a/arch/powerpc/platforms/40x/Kconfig
 285 +++ b/arch/powerpc/platforms/40x/Kconfig
 286 @@ -49,6 +49,16 @@ config KILAUEA
 287         help
 288           This option enables support for the AMCC PPC405EX evaluation board.
 289
 290 +config MAGICBOXV1
 291 +       bool "Magicbox v1"
 292 +       depends on 40x
 293 +       default n
 294 +       select PPC40x_SIMPLE
 295 +       select 405EP
 296 +       select PCI
 297 +       help
 298 +         This option enables support for the Magicbox v1 board.
 299 +
 300  config MAKALU
 301         bool "Makalu"
 302         depends on 40x
 303 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
 304 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
 305 @@ -51,7 +51,8 @@ machine_device_initcall(ppc40x_simple, p
 306   * board.c file for it rather than adding it to this list.
 307   */
 308  static char *board[] __initdata = {
 309 -       "amcc,acadia"
 310 +       "amcc,acadia",
 311 +       "magicboxv1",
 312  };
 313
 314  static int __init ppc40x_probe(void)