#define ETH_FCS_LEN 4
#define AG71XX_DRV_NAME "ag71xx"
#define ETH_FCS_LEN 4
#define AG71XX_DRV_NAME "ag71xx"
-#define AG71XX_DRV_VERSION "0.5.31"
+#define AG71XX_DRV_VERSION "0.5.32"
#define AG71XX_NAPI_WEIGHT 64
#define AG71XX_OOM_REFILL (1 + HZ/10)
#define AG71XX_NAPI_WEIGHT 64
#define AG71XX_OOM_REFILL (1 + HZ/10)
- t = (((u32) mac[0]) << 24) | (((u32) mac[1]) << 16)
- | (((u32) mac[2]) << 8) | ((u32) mac[3]);
+ t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16)
+ | (((u32) mac[3]) << 8) | ((u32) mac[2]);
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t);
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t);
- t = (((u32) mac[4]) << 24) | (((u32) mac[5]) << 16);
+ t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16);
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
}
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
}