projectconfig.h

   1 /**************************************************************************/
   2 /*!
   3     @file     projectconfig.h
   4     @author   K. Townsend (microBuilder.eu)
   5
   6     @section LICENSE
   7
   8     Software License Agreement (BSD License)
   9
  10     Copyright (c) 2010, microBuilder SARL
  11     All rights reserved.
  12
  13     Redistribution and use in source and binary forms, with or without
  14     modification, are permitted provided that the following conditions are met:
  15     1. Redistributions of source code must retain the above copyright
  16     notice, this list of conditions and the following disclaimer.
  17     2. Redistributions in binary form must reproduce the above copyright
  18     notice, this list of conditions and the following disclaimer in the
  19     documentation and/or other materials provided with the distribution.
  20     3. Neither the name of the copyright holders nor the
  21     names of its contributors may be used to endorse or promote products
  22     derived from this software without specific prior written permission.
  23
  24     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  25     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  26     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  28     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  31     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34 */
  35 /**************************************************************************/
  36
  37 #ifndef _PROJECTCONFIG_H_
  38 #define _PROJECTCONFIG_H_
  39
  40 #include "lpc134x.h"
  41 #include "sysdefs.h"
  42
  43 /*=========================================================================
  44     BOARD SELECTION
  45
  46     Because several boards use this code library with sometimes slightly
  47     different pin configuration, you will need to specify which board you
  48     are using by enabling one of the following definitions. The code base
  49     will then try to configure itself accordingly for that board.
  50     -----------------------------------------------------------------------*/
  51     // #define CFG_BRD_LPC1343_REFDESIGN
  52     #define CFG_BRD_LPC1343_TFTLCDSTANDALONE
  53     // #define CFG_BRD_LPC1343_802154USBSTICK
  54 /*=========================================================================*/
  55
  56
  57 /**************************************************************************
  58     PIN USAGE
  59     -----------------------------------------------------------------------
  60     This table tries to give an indication of which GPIO pins and
  61     peripherals are used by the available drivers and SW examples.  Only
  62     dedicated GPIO pins available on the LPC1343 Reference Board are shown
  63     below.  Any unused peripheral blocks like I2C, SSP, ADC, etc., can
  64     also be used as GPIO if they are available.
  65
  66                 PORT 1        PORT 2                PORT 3
  67                 =========     =================     =======
  68                 8 9 10 11     1 2 3 4 5 6 7 8 9     0 1 2 3
  69
  70     SDCARD      . .  .  .     . . . . . . . . .     X . . .
  71     PWM         . X  .  .     . . . . . . . . .     . . . .
  72     STEPPER     . .  .  .     . . . . . . . . .     X X X X
  73     CHIBI       X X  X  .     . . . . . . . . .     . . . .
  74     ILI9325/8   X X  X  X     X X X X X X X X X     . . . X
  75     ST7565      X X  X  X     X X X X X X X X X     . . . X
  76     ST7735      . .  .  .     X X X X X X . . .     . . . .
  77     SSD1306     . .  .  .     X X X . X X . . .     . . . .
  78     MCP121      . .  .  .     . . . . . . . . .     . X . .
  79
  80                 TIMERS                    SSP     ADC         UART
  81                 ======================    ===     =======     ====
  82                 16B0  16B1  32B0  32B1    0       0 1 2 3     0
  83
  84     SDCARD      .     .     .     .       X       . . . .     .
  85     PWM         .     X     .     .       .       . . . .     .
  86     PMU [1]     .     .     X     .       .       . . . .     .
  87     USB         .     .     .     X       .       . . . .     .
  88     STEPPER     .     .     X     .       .       . . . .     .
  89     CHIBI       x     .     .     .       X       . . . .     .
  90     ILI9325/8   .     .     .     .       .       X X X X     .
  91     ST7565      .     .     .     .       .       X X X X     .
  92     ST7535      .     .     .     .       .       . . . .     .
  93     SSD1306     .     .     .     .       .       . . . .     .
  94     INTERFACE   .     .     .     .       .       . . . .     X[2]
  95
  96     [1]  PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep.  This timer
  97          can safely be used by other peripherals, but may need to be
  98          reconfigured when you wakeup from deep-sleep.
  99     [2]  INTERFACE can be configured to use either USBCDC or UART
 100
 101  **************************************************************************/
 102
 103
 104 /*=========================================================================
 105     FIRMWARE VERSION SETTINGS
 106     -----------------------------------------------------------------------*/
 107     #define CFG_FIRMWARE_VERSION_MAJOR            (0)
 108     #define CFG_FIRMWARE_VERSION_MINOR            (9)
 109     #define CFG_FIRMWARE_VERSION_REVISION         (2)
 110 /*=========================================================================*/
 111
 112
 113 /*=========================================================================
 114     CORE CPU SETTINGS
 115     -----------------------------------------------------------------------
 116
 117     CFG_CPU_CCLK    Value is for reference only.  'core/cpu/cpu.c' must
 118                     be modified to change the clock speed, but the value
 119                     should be indicated here since CFG_CPU_CCLK is used by
 120                     other peripherals to determine timing.
 121
 122     -----------------------------------------------------------------------*/
 123     #ifdef CFG_BRD_LPC1343_REFDESIGN
 124       #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 125     #endif
 126
 127     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 128       #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 129     #endif
 130
 131     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 132       #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 133     #endif
 134 /*=========================================================================*/
 135
 136
 137 /*=========================================================================
 138     SYSTICK TIMER
 139     -----------------------------------------------------------------------
 140
 141     CFG_SYSTICK_DELAY_IN_MS   The number of milliseconds between each tick
 142                               of the systick timer.
 143
 144     -----------------------------------------------------------------------*/
 145     #ifdef CFG_BRD_LPC1343_REFDESIGN
 146       #define CFG_SYSTICK_DELAY_IN_MS     (1)
 147     #endif
 148
 149     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 150       #define CFG_SYSTICK_DELAY_IN_MS     (1)
 151     #endif
 152
 153     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 154       #define CFG_SYSTICK_DELAY_IN_MS     (1)
 155     #endif
 156 /*=========================================================================*/
 157
 158
 159 /*=========================================================================
 160     UART
 161     -----------------------------------------------------------------------
 162
 163     CFG_UART_BAUDRATE         The default UART speed.  This value is used
 164                               when initialising UART, and should be a
 165                               standard value like 57600, 9600, etc.
 166                               NOTE: This value may be overridden if
 167                               another value is stored in EEPROM!
 168     CFG_UART_BUFSIZE          The length in bytes of the UART RX FIFO. This
 169                               will determine the maximum number of received
 170                               characters to store in memory.
 171
 172     -----------------------------------------------------------------------*/
 173     #ifdef CFG_BRD_LPC1343_REFDESIGN
 174       #define CFG_UART_BAUDRATE           (115200)
 175       #define CFG_UART_BUFSIZE            (512)
 176     #endif
 177
 178     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 179       #define CFG_UART_BAUDRATE           (115200)
 180       #define CFG_UART_BUFSIZE            (512)
 181     #endif
 182
 183     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 184       #define CFG_UART_BAUDRATE           (115200)
 185       #define CFG_UART_BUFSIZE            (512)
 186     #endif
 187 /*=========================================================================*/
 188
 189
 190 /*=========================================================================
 191     SSP
 192     -----------------------------------------------------------------------
 193
 194     CFG_SSP0_SCKPIN_2_11      Indicates which pin should be used for SCK0
 195     CFG_SSP0_SCKPIN_0_6
 196
 197     -----------------------------------------------------------------------*/
 198     #ifdef CFG_BRD_LPC1343_REFDESIGN
 199       #define CFG_SSP0_SCKPIN_2_11
 200       // #define CFG_SSP0_SCKPIN_0_6
 201     #endif
 202
 203     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 204       #define CFG_SSP0_SCKPIN_2_11
 205       // #define CFG_SSP0_SCKPIN_0_6
 206     #endif
 207
 208     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 209       // #define CFG_SSP0_SCKPIN_2_11
 210       #define CFG_SSP0_SCKPIN_0_6
 211     #endif
 212 /*=========================================================================*/
 213
 214
 215 /*=========================================================================
 216     ON-BOARD LED
 217     -----------------------------------------------------------------------
 218
 219     CFG_LED_PORT              The port for the on board LED
 220     CFG_LED_PIN               The pin for the on board LED
 221     CFG_LED_ON                The pin state to turn the LED on (0 = low, 1 = high)
 222     CFG_LED_OFF               The pin state to turn the LED off (0 = low, 1 = high)
 223
 224     -----------------------------------------------------------------------*/
 225     #ifdef CFG_BRD_LPC1343_REFDESIGN
 226       #define CFG_LED_PORT                (2)
 227       #define CFG_LED_PIN                 (10)
 228       #define CFG_LED_ON                  (0)
 229       #define CFG_LED_OFF                 (1)
 230     #endif
 231
 232     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 233       #define CFG_LED_PORT                (2)
 234       #define CFG_LED_PIN                 (10)
 235       #define CFG_LED_ON                  (0)
 236       #define CFG_LED_OFF                 (1)
 237     #endif
 238
 239     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 240       #define CFG_LED_PORT                (3)
 241       #define CFG_LED_PIN                 (2)
 242       #define CFG_LED_ON                  (0)
 243       #define CFG_LED_OFF                 (1)
 244     #endif
 245 /*=========================================================================*/
 246
 247
 248 /*=========================================================================
 249     MICRO-SD CARD
 250     -----------------------------------------------------------------------
 251
 252     CFG_SDCARD                If this field is defined SD Card and FAT32
 253                               file system support will be included
 254     CFG_SDCARD_READONLY       If this is set to 1, all commands to
 255                               write to the SD card will be removed
 256                               saving some flash space.
 257     CFG_SDCARD_CDPORT         The card detect port number
 258     CFG_SDCARD_CDPIN          The card detect pin number
 259
 260     NOTE:                     All config settings for FAT32 are defined
 261                               in ffconf.h
 262
 263     BENCHMARK:                With SPI set to 6.0MHz, FATFS can read
 264                               ~300KB/s (w/512 byte read buffer)
 265
 266     PIN LAYOUT:               The pin layout that is used by this driver
 267                               can be seen in the following schematic:
 268                               /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 269
 270     DEPENDENCIES:             SDCARD requires the use of SSP0.
 271     -----------------------------------------------------------------------*/
 272     #ifdef CFG_BRD_LPC1343_REFDESIGN
 273       // #define CFG_SDCARD
 274       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 275       #define CFG_SDCARD_CDPORT           (3)
 276       #define CFG_SDCARD_CDPIN            (0)
 277     #endif
 278
 279     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 280       #define CFG_SDCARD
 281       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 282       #define CFG_SDCARD_CDPORT           (3)
 283       #define CFG_SDCARD_CDPIN            (0)
 284     #endif
 285
 286     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 287       // #define CFG_SDCARD
 288       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 289       #define CFG_SDCARD_CDPORT           (3)
 290       #define CFG_SDCARD_CDPIN            (0)
 291     #endif
 292 /*=========================================================================*/
 293
 294
 295 /*=========================================================================
 296     USB
 297     -----------------------------------------------------------------------
 298
 299     CFG_USBHID                If this field is defined USB HID support will
 300                               be included.  Currently uses ROM-based USB HID
 301     CFG_USBCDC                If this field is defined USB CDC support will
 302                               be included, with the USB Serial Port speed
 303                               set to 115200 BPS by default
 304     CFG_USBCDC_BAUDRATE       The default TX/RX speed.  This value is used
 305                               when initialising USBCDC, and should be a
 306                               standard value like 57600, 9600, etc.
 307     CFG_USBCDC_INITTIMEOUT    The maximum delay in milliseconds to wait for
 308                               USB to connect.  Must be a multiple of 10!
 309     CFG_USBCDC_BUFFERSIZE     Size of the buffer (in bytes) that stores
 310                               printf data until it can be sent out in
 311                               64 byte frames.  The buffer is required since
 312                               only one frame per ms can be sent using USB
 313                               CDC (see 'puts' in systeminit.c).
 314
 315     -----------------------------------------------------------------------*/
 316     #define CFG_USB_VID                   (0x239A)
 317     #define CFG_USB_PID                   (0x1002)
 318
 319     #ifdef CFG_BRD_LPC1343_REFDESIGN
 320       // #define CFG_USBHID
 321       #define CFG_USBCDC
 322       #define CFG_USBCDC_BAUDRATE         (115200)
 323       #define CFG_USBCDC_INITTIMEOUT      (5000)
 324       #define CFG_USBCDC_BUFFERSIZE       (256)
 325     #endif
 326
 327     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 328       // #define CFG_USBHID
 329       #define CFG_USBCDC
 330       #define CFG_USBCDC_BAUDRATE         (115200)
 331       #define CFG_USBCDC_INITTIMEOUT      (5000)
 332       #define CFG_USBCDC_BUFFERSIZE       (256)
 333     #endif
 334
 335     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 336       // #define CFG_USBHID
 337       #define CFG_USBCDC
 338       #define CFG_USBCDC_BAUDRATE         (115200)
 339       #define CFG_USBCDC_INITTIMEOUT      (5000)
 340       #define CFG_USBCDC_BUFFERSIZE       (256)
 341     #endif
 342 /*=========================================================================*/
 343
 344
 345 /*=========================================================================
 346     PRINTF REDIRECTION
 347     -----------------------------------------------------------------------
 348
 349     CFG_PRINTF_UART           Will cause all printf statements to be
 350                               redirected to UART
 351     CFG_PRINTF_USBCDC         Will cause all printf statements to be
 352                               redirect to USB Serial
 353     CFG_PRINTF_NEWLINE        This should be either "\r\n" for Windows or
 354                               "\n" for *nix
 355
 356     Note: If no printf redirection definitions are present, all printf
 357     output will be ignored, though this will also save ~350 bytes flash.
 358
 359     NOTE: PRINTF Support =    ~350 bytes Flash (-Os)
 360     -----------------------------------------------------------------------*/
 361     #ifdef CFG_BRD_LPC1343_REFDESIGN
 362       // #define CFG_PRINTF_UART
 363       #define CFG_PRINTF_USBCDC
 364       #define CFG_PRINTF_NEWLINE          "\r\n"
 365     #endif
 366
 367     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 368       // #define CFG_PRINTF_UART
 369       #define CFG_PRINTF_USBCDC
 370       #define CFG_PRINTF_NEWLINE          "\r\n"
 371     #endif
 372
 373     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 374       // #define CFG_PRINTF_UART
 375       #define CFG_PRINTF_USBCDC
 376       #define CFG_PRINTF_NEWLINE          "\r\n"
 377     #endif
 378 /*=========================================================================*/
 379
 380
 381 /*=========================================================================
 382     COMMAND LINE INTERFACE
 383     -----------------------------------------------------------------------
 384
 385     CFG_INTERFACE             If this field is defined the UART or USBCDC
 386                               based command-line interface will be included
 387     CFG_INTERFACE_MAXMSGSIZE  The maximum number of bytes to accept for an
 388                               incoming command
 389     CFG_INTERFACE_PROMPT      The command prompt to display at the start
 390                               of every new data entry line
 391     CFG_INTERFACE_SILENTMODE  If this is set to 1 only text generated in
 392                               response to commands will be send to the
 393                               output buffer.  The command prompt will not
 394                               be displayed and incoming text will not be
 395                               echoed back to the output buffer (allowing
 396                               you to see the text you have input).  This
 397                               is normally only desirable in a situation
 398                               where another MCU is communicating with
 399                               the LPC1343.
 400     CFG_INTERFACE_ENABLEIRQ   If this is set to 1 the IRQ pin will be
 401                               set high when a command starts executing
 402                               and will go low when the command has
 403                               finished executing or the LCD is not busy.
 404                               This allows another device to know when a
 405                               new command can safely be sent.
 406     CFG_INTERFACE_IRQPORT     The gpio port for the IRQ/busy pin
 407     CFG_INTERFACE_IRQPIN      The gpio pin number for the IRQ/busy pin
 408
 409     NOTE:                     The command-line interface will use either
 410                               USB-CDC or UART depending on whether
 411                               CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
 412                               selected.
 413     -----------------------------------------------------------------------*/
 414     #ifdef CFG_BRD_LPC1343_REFDESIGN
 415       #define CFG_INTERFACE
 416       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 417       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 418       #define CFG_INTERFACE_SILENTMODE    (0)
 419       #define CFG_INTERFACE_ENABLEIRQ     (0)
 420       #define CFG_INTERFACE_IRQPORT       (2)
 421       #define CFG_INTERFACE_IRQPIN        (0)
 422     #endif
 423
 424     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 425       #define CFG_INTERFACE
 426       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 427       #define CFG_INTERFACE_PROMPT        "LCD >> "
 428       #define CFG_INTERFACE_SILENTMODE    (0)
 429       #define CFG_INTERFACE_ENABLEIRQ     (1)
 430       #define CFG_INTERFACE_IRQPORT       (2)
 431       #define CFG_INTERFACE_IRQPIN        (0)
 432     #endif
 433
 434     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 435       // #define CFG_INTERFACE
 436       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 437       #define CFG_INTERFACE_PROMPT        "CMD >> "
 438       #define CFG_INTERFACE_SILENTMODE    (0)
 439       #define CFG_INTERFACE_ENABLEIRQ     (0)
 440       #define CFG_INTERFACE_IRQPORT       (2)
 441       #define CFG_INTERFACE_IRQPIN        (0)
 442     #endif
 443 /*=========================================================================*/
 444
 445
 446 /*=========================================================================
 447     PWM SETTINGS
 448     -----------------------------------------------------------------------
 449
 450     CFG_PWM                     If this is defined, a basic PWM driver
 451                                 will be included using 16-bit Timer 1 and
 452                                 Pin 1.9 (MAT0) for the PWM output.  In
 453                                 order to allow for a fixed number of
 454                                 pulses to be generated, some PWM-specific
 455                                 code is required in the 16-Bit Timer 1
 456                                 ISR.  See "core/timer16/timer16.c" for
 457                                 more information.
 458     CFG_PWM_DEFAULT_PULSEWIDTH  The default pulse width in ticks
 459     CFG_PWM_DEFAULT_DUTYCYCLE   The default duty cycle in percent
 460
 461     DEPENDENCIES:               PWM output requires the use of 16-bit
 462                                 timer 1 and pin 1.9 (CT16B1_MAT0).
 463     -----------------------------------------------------------------------*/
 464     #ifdef CFG_BRD_LPC1343_REFDESIGN
 465       // #define CFG_PWM
 466       #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 467       #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 468     #endif
 469
 470     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 471       // #define CFG_PWM
 472       #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 473       #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 474     #endif
 475
 476     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 477       // #define CFG_PWM
 478       #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 479       #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 480     #endif
 481 /*=========================================================================*/
 482
 483
 484 /*=========================================================================
 485     STEPPER MOTOR SETTINGS
 486     -----------------------------------------------------------------------
 487
 488     CFG_STEPPER                 If this is defined, a simple bi-polar
 489                                 stepper motor will be included for common
 490                                 H-bridge chips like the L293D or SN754410N
 491
 492     DEPENDENCIES:               STEPPER requires the use of pins 3.0-3 and
 493                                 32-bit Timer 0.
 494     -----------------------------------------------------------------------*/
 495     #ifdef CFG_BRD_LPC1343_REFDESIGN
 496       // #define CFG_STEPPER
 497     #endif
 498
 499     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 500       // #define CFG_STEPPER
 501     #endif
 502
 503     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 504       // #define CFG_STEPPER
 505     #endif
 506 /*=========================================================================*/
 507
 508
 509 /*=========================================================================
 510     EEPROM
 511     -----------------------------------------------------------------------
 512
 513     CFG_I2CEEPROM             If defined, drivers for the onboard EEPROM
 514                               will be included during build
 515     CFG_I2CEEPROM_SIZE        The number of bytes available on the EEPROM
 516
 517     -----------------------------------------------------------------------*/
 518     #ifdef CFG_BRD_LPC1343_REFDESIGN
 519       #define CFG_I2CEEPROM
 520       #define CFG_I2CEEPROM_SIZE          (3072)
 521     #endif
 522
 523     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 524       #define CFG_I2CEEPROM
 525       #define CFG_I2CEEPROM_SIZE          (3072)
 526     #endif
 527
 528     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 529       #define CFG_I2CEEPROM
 530       #define CFG_I2CEEPROM_SIZE          (3072)
 531     #endif
 532 /*=========================================================================*/
 533
 534
 535 /*=========================================================================
 536     EEPROM MEMORY MAP
 537     -----------------------------------------------------------------------
 538     EEPROM is used to persist certain user modifiable values to make
 539     sure that these changes remain in effect after a reset or hard
 540     power-down.  The addresses in EEPROM for these various system
 541     settings/values are defined below.  The first 256 bytes of EEPROM
 542     are reserved for this (0x0000..0x00FF).
 543
 544     CFG_EEPROM_RESERVED       The last byte of reserved EEPROM memory
 545
 546           EEPROM Address (0x0000..0x00FF)
 547           ===============================
 548           0 1 2 3 4 5 6 7 8 9 A B C D E F
 549     000x  x x x x x x x x . x x . . . . .   Chibi
 550     001x  . . . . . . . . . . . . . . . .
 551     002x  x x x x . . . . . . . . . . . .   UART
 552     003x  x x x x x x x x x x x x x x x x   Touch Screen Calibration
 553     004x  x x x x x x x x x x x x x x . .   Touch Screen Calibration
 554     005x  . . . . . . . . . . . . . . . .
 555     006x  . . . . . . . . . . . . . . . .
 556     007x  . . . . . . . . . . . . . . . .
 557     008x  . . . . . . . . . . . . . . . .
 558     009x  . . . . . . . . . . . . . . . .
 559     00Ax  . . . . . . . . . . . . . . . .
 560     00Bx  . . . . . . . . . . . . . . . .
 561     00Cx  . . . . . . . . . . . . . . . .
 562     00Dx  . . . . . . . . . . . . . . . .
 563     00Ex  . . . . . . . . . . . . . . . .
 564     00Fx  . . . . . . . . . . . . . . . .
 565
 566     -----------------------------------------------------------------------*/
 567     #define CFG_EEPROM_RESERVED                 (0x00FF)              // Protect first 256 bytes of memory
 568     #define CFG_EEPROM_CHIBI_IEEEADDR           (uint16_t)(0x0000)    // 8
 569     #define CFG_EEPROM_CHIBI_SHORTADDR          (uint16_t)(0x0009)    // 2
 570     #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED   (uint16_t)(0x0030)    // 1
 571     #define CFG_EEPROM_TOUCHSCREEN_CAL_AN       (uint16_t)(0x0031)    // 4
 572     #define CFG_EEPROM_TOUCHSCREEN_CAL_BN       (uint16_t)(0x0035)    // 4
 573     #define CFG_EEPROM_TOUCHSCREEN_CAL_CN       (uint16_t)(0x0039)    // 4
 574     #define CFG_EEPROM_TOUCHSCREEN_CAL_DN       (uint16_t)(0x003D)    // 4
 575     #define CFG_EEPROM_TOUCHSCREEN_CAL_EN       (uint16_t)(0x0041)    // 4
 576     #define CFG_EEPROM_TOUCHSCREEN_CAL_FN       (uint16_t)(0x0045)    // 4
 577     #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER  (uint16_t)(0x0049)    // 4
 578     #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD   (uint16_t)(0x004D)    // 1
 579     #define CFG_EEPROM_UART_SPEED               (uint16_t)(0x0020)    // 4
 580 /*=========================================================================*/
 581
 582
 583 /*=========================================================================
 584     LM75B TEMPERATURE SENSOR
 585     -----------------------------------------------------------------------
 586
 587     CFG_LM75B                 If defined, drivers for an optional LM75B
 588                               temperature sensor will be included during
 589                               build (requires external HW)
 590
 591     -----------------------------------------------------------------------*/
 592     #ifdef CFG_BRD_LPC1343_REFDESIGN
 593       // #define CFG_LM75B
 594     #endif
 595
 596     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 597       // #define CFG_LM75B
 598     #endif
 599
 600     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 601       // #define CFG_LM75B
 602     #endif
 603 /*=========================================================================*/
 604
 605
 606 /*=========================================================================
 607     CHIBI WIRELESS STACK
 608     -----------------------------------------------------------------------
 609
 610     CFG_CHIBI                   If defined, the CHIBI wireless stack will be
 611                                 included during build.  Requires external HW.
 612     CFG_CHIBI_MODE              The mode to use when receiving and transmitting
 613                                 wireless data.  See chb_drvr.h for possible values
 614     CFG_CHIBI_POWER             The power level to use when transmitting.  See
 615                                 chb_drvr.h for possible values
 616     CFG_CHIBI_CHANNEL           802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
 617     CFG_CHIBI_PANID             16-bit PAN Identifier (ex.0x1234)
 618     CFG_CHIBI_PROMISCUOUS       Set to 1 to enabled promiscuous mode or
 619                                 0 to disable it.  If promiscuous mode is
 620                                 enabled be sure to set CFG_CHIBI_BUFFERSIZE
 621                                 to an appropriately large value (ex. 1024)
 622     CFG_CHIBI_BUFFERSIZE        The size of the message buffer in bytes
 623
 624     DEPENDENCIES:               Chibi requires the use of SSP0, 16-bit timer
 625                                 0 and pins 3.1, 3.2, 3.3.  It also requires
 626                                 the presence of CFG_I2CEEPROM.
 627
 628     NOTE:                       These settings are not relevant to all boards!
 629                                 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
 630                                 show how 'CHIBI' is meant to be connected
 631     -----------------------------------------------------------------------*/
 632     #ifdef CFG_BRD_LPC1343_REFDESIGN
 633       // #define CFG_CHIBI
 634       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 635       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 636       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 637       #define CFG_CHIBI_PANID             (0x1234)
 638       #define CFG_CHIBI_PROMISCUOUS       (0)
 639       #define CFG_CHIBI_BUFFERSIZE        (128)
 640     #endif
 641
 642     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 643       // #define CFG_CHIBI
 644       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 645       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 646       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 647       #define CFG_CHIBI_PANID             (0x1234)
 648       #define CFG_CHIBI_PROMISCUOUS       (0)
 649       #define CFG_CHIBI_BUFFERSIZE        (128)
 650     #endif
 651
 652     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 653       #define CFG_CHIBI
 654       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 655       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 656       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 657       #define CFG_CHIBI_PANID             (0x1234)
 658       #define CFG_CHIBI_PROMISCUOUS       (0)
 659       #define CFG_CHIBI_BUFFERSIZE        (1024)
 660     #endif
 661 /*=========================================================================*/
 662
 663
 664 /*=========================================================================
 665     TFT LCD
 666     -----------------------------------------------------------------------
 667
 668     CFG_TFTLCD                  If defined, this will cause drivers for
 669                                 a pre-determined LCD screen to be included
 670                                 during build.  Only one LCD driver can be
 671                                 included during the build process (for ex.
 672                                 'drivers/lcd/hw/ILI9325.c')
 673     CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
 674                                 included for 3x6, 5x8, 7x8 and 8x8 fonts.
 675                                 This should only be enabled if these small
 676                                 fonts are required since there is already
 677                                 support for larger fonts generated with
 678                                 Dot Factory
 679                                 http://www.pavius.net/downloads/tools/53-the-dot-factory
 680     CFG_TFTLCD_TS_DEFAULTTHRESHOLD  Default minimum threshold to trigger a
 681                                 touch event with the touch screen (and exit
 682                                 from 'tsWaitForEvent' in touchscreen.c).
 683                                 Should be an 8-bit value somewhere between
 684                                 8 and 75 in normal circumstances.  This is
 685                                 the default value and may be overriden by
 686                                 a value stored in EEPROM.
 687     CFG_TFTLCD_TS_KEYPADDELAY   The delay in milliseconds between key
 688                                 presses in dialogue boxes
 689
 690     PIN LAYOUT:                 The pin layout that is used by this driver
 691                                 can be seen in the following schematic:
 692                                 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 693
 694     DEPENDENCIES:               TFTLCD requires the use of pins 1.8, 1.9,
 695                                 1.10, 1.11, 3.3 and 2.1-9.
 696     -----------------------------------------------------------------------*/
 697     #ifdef CFG_BRD_LPC1343_REFDESIGN
 698       // #define CFG_TFTLCD
 699       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 700       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 701       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 702     #endif
 703
 704     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 705       #define CFG_TFTLCD
 706       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 707       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 708       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 709     #endif
 710
 711     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 712       // #define CFG_TFTLCD
 713       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 714       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 715       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 716     #endif
 717 /*=========================================================================*/
 718
 719
 720 /*=========================================================================
 721     128x64 Graphic LCDs
 722     -----------------------------------------------------------------------
 723
 724     CFG_ST7565                If defined, this will cause drivers for
 725                               the 128x64 pixel ST7565 LCD to be included
 726     CFG_SSD1306               If defined, this will cause drivers for
 727                               the 128x64 pixel SSD1306 OLED display to be
 728                               included
 729
 730     Note:                     LPC1114 @ 36MHz and the ST7565 with the
 731                               backlight enabled consumes ~35mA
 732
 733     DEPENDENCIES:             ST7565 requires the use of pins 2.1-6.
 734     DEPENDENCIES:             SSD1306 requires the use of pins 2.1-6.
 735     -----------------------------------------------------------------------*/
 736     #ifdef CFG_BRD_LPC1343_REFDESIGN
 737       // #define CFG_ST7565
 738       // #define CFG_SSD1306
 739     #endif
 740
 741     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 742       // #define CFG_ST7565
 743       // #define CFG_SSD1306
 744     #endif
 745
 746     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 747       // #define CFG_ST7565
 748       // #define CFG_SSD1306
 749     #endif
 750 /*=========================================================================*/
 751
 752
 753 /*=========================================================================
 754     RSA Encryption
 755     -----------------------------------------------------------------------
 756
 757     CFG_RSA                     If defined, support for basic RSA
 758                                 encryption will be included.
 759     CFG_RSA_BITS                Indicates the number of bits used for
 760                                 RSA encryption keys.  To keep code size
 761                                 reasonable, RSA encryption is currently
 762                                 limited to using 64-bit or 32-bit numbers,
 763                                 with 64-bit providing higher security, and
 764                                 32-bit providing smaller encrypted text
 765                                 size.
 766
 767     NOTE:                       Please note that Printf can not be
 768                                 used to display 64-bit values (%lld)!
 769     -----------------------------------------------------------------------*/
 770     #ifdef CFG_BRD_LPC1343_REFDESIGN
 771       // #define CFG_RSA
 772       #define CFG_RSA_BITS                  (32)
 773     #endif
 774
 775     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE
 776       // #define CFG_RSA
 777       #define CFG_RSA_BITS                  (32)
 778     #endif
 779
 780     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 781       // #define CFG_RSA
 782       #define CFG_RSA_BITS                  (32)
 783     #endif
 784 /*=========================================================================*/
 785
 786
 787
 788
 789 /*=========================================================================
 790   CONFIG FILE VALIDATION
 791   -------------------------------------------------------------------------
 792   Basic error checking to make sure that incompatible defines are not
 793   enabled at the same time, etc.
 794
 795   =========================================================================*/
 796
 797 #if !defined CFG_BRD_LPC1343_REFDESIGN && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE && !defined CFG_BRD_LPC1343_802154USBSTICK
 798   #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_802154USBSTICK)"
 799 #endif
 800 #if (defined CFG_BRD_LPC1343_REFDESIGN && defined CFG_BRD_LPC1343_TFTLCDSTANDALONE) || (defined CFG_BRD_LPC1343_TFTLCDSTANDALONE && defined CFG_BRD_LPC1343_802154USBSTICK) || (defined CFG_BRD_LPC1343_REFDESIGN && defined CFG_BRD_LPC1343_802154USBSTICK)
 801   #error "Only one target board can be defined at a time"
 802 #endif
 803
 804 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
 805   #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
 806 #endif
 807
 808 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
 809   #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
 810 #endif
 811
 812 #if defined CFG_USBCDC && defined CFG_USBHID
 813   #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
 814 #endif
 815
 816 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
 817   #error "Only one SCK pin can be defined at a time for SSP0"
 818 #endif
 819
 820 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
 821   #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
 822 #endif
 823
 824 #ifdef CFG_INTERFACE
 825   #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
 826     #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
 827   #endif
 828   #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
 829     #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
 830   #endif
 831 #endif
 832
 833 #ifdef CFG_CHIBI
 834   #if !defined CFG_I2CEEPROM
 835     #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
 836   #endif
 837   #ifdef CFG_SDCARD
 838     #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
 839   #endif
 840   #ifdef CFG_TFTLCD
 841     #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
 842   #endif
 843   #ifdef CFG_PWM
 844     #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
 845   #endif
 846   #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
 847     #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
 848   #endif
 849 #endif
 850
 851 #ifdef CFG_TFTLCD
 852   #ifdef CFG_ST7565
 853     #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
 854   #endif
 855   #ifdef CFG_SSD1306
 856     #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
 857   #endif
 858   #ifdef CFG_PWM
 859     #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
 860   #endif
 861   #if !defined CFG_I2CEEPROM
 862     #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
 863   #endif
 864 #endif
 865
 866 #ifdef CFG_SDCARD
 867   #ifdef CFG_STEPPER
 868     #error  "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
 869   #endif
 870 #endif
 871
 872 #ifdef CFG_ST7565
 873   #ifdef CFG_SSD1306
 874     #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
 875   #endif
 876 #endif
 877
 878 #ifdef CFG_RSA
 879   #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
 880     #error "CFG_RSA_BITS must be equal to either 32 or 64."
 881   #endif
 882 #endif
 883
 884 #endif