88fddba93994e67a9883950ff22f6ed5ef38d924
[hackover2013-badge-firmware.git] / projectconfig.h
1 /**************************************************************************/
2 /*!
3 @file projectconfig.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2010, microBuilder SARL
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
39
40 #include "lpc134x.h"
41 #include "sysdefs.h"
42
43 /*=========================================================================
44 BOARD SELECTION
45
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50 -----------------------------------------------------------------------*/
51 #define CFG_BRD_LPC1343_REFDESIGN
52 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
53 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
54 // #define CFG_BRD_LPC1343_802154USBSTICK
55 /*=========================================================================*/
56
57
58 /**************************************************************************
59 PIN USAGE
60 -----------------------------------------------------------------------
61 This table tries to give an indication of which GPIO pins and
62 peripherals are used by the available drivers and SW examples. Only
63 dedicated GPIO pins available on the LPC1343 Reference Board are shown
64 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
65 also be used as GPIO if they are available.
66
67 PORT 1 PORT 2 PORT 3
68 ========= ================= =======
69 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
70
71 SDCARD . . . . . . . . . . . . . X . . .
72 PWM . X . . . . . . . . . . . . . . .
73 STEPPER . . . . . . . . . . . . . X X X X
74 CHIBI X X X . . . . . . . . . . . . . .
75 ILI9325/8 X X X X X X X X X X X X X . . . X
76 ST7565 X X X X X X X X X X X X X . . . X
77 ST7735 . . . . X X X X X X . . . . . . .
78 SSD1306 . . . . X X X . X X . . . . . . .
79 MCP121 . . . . . . . . . . . . . . X . .
80
81 TIMERS SSP ADC UART
82 ====================== === ======= ====
83 16B0 16B1 32B0 32B1 0 0 1 2 3 0
84
85 SDCARD . . . . X . . . . .
86 PWM . X . . . . . . . .
87 PMU [1] . . X . . . . . . .
88 USB . . . X . . . . . .
89 STEPPER . . X . . . . . . .
90 CHIBI x . . . X . . . . .
91 ILI9325/8 . . . . . X X X X .
92 ST7565 . . . . . X X X X .
93 ST7535 . . . . . . . . . .
94 SSD1306 . . . . . . . . . .
95 INTERFACE . . . . . . . . . X[2]
96
97 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
98 can safely be used by other peripherals, but may need to be
99 reconfigured when you wakeup from deep-sleep.
100 [2] INTERFACE can be configured to use either USBCDC or UART
101
102 **************************************************************************/
103
104
105 /*=========================================================================
106 FIRMWARE VERSION SETTINGS
107 -----------------------------------------------------------------------*/
108 #define CFG_FIRMWARE_VERSION_MAJOR (0)
109 #define CFG_FIRMWARE_VERSION_MINOR (9)
110 #define CFG_FIRMWARE_VERSION_REVISION (2)
111 /*=========================================================================*/
112
113
114 /*=========================================================================
115 CORE CPU SETTINGS
116 -----------------------------------------------------------------------
117
118 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
119 be modified to change the clock speed, but the value
120 should be indicated here since CFG_CPU_CCLK is used by
121 other peripherals to determine timing.
122
123 -----------------------------------------------------------------------*/
124 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
125 /*=========================================================================*/
126
127
128 /*=========================================================================
129 SYSTICK TIMER
130 -----------------------------------------------------------------------
131
132 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
133 of the systick timer.
134
135 -----------------------------------------------------------------------*/
136 #define CFG_SYSTICK_DELAY_IN_MS (1)
137 /*=========================================================================*/
138
139
140 /*=========================================================================
141 UART
142 -----------------------------------------------------------------------
143
144 CFG_UART_BAUDRATE The default UART speed. This value is used
145 when initialising UART, and should be a
146 standard value like 57600, 9600, etc.
147 NOTE: This value may be overridden if
148 another value is stored in EEPROM!
149 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
150 will determine the maximum number of received
151 characters to store in memory.
152
153 -----------------------------------------------------------------------*/
154 #ifdef CFG_BRD_LPC1343_REFDESIGN
155 #define CFG_UART_BAUDRATE (115200)
156 #define CFG_UART_BUFSIZE (512)
157 #endif
158
159 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
160 #define CFG_UART_BAUDRATE (115200)
161 #define CFG_UART_BUFSIZE (512)
162 #endif
163
164 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
165 #define CFG_UART_BAUDRATE (9600)
166 #define CFG_UART_BUFSIZE (512)
167 #endif
168
169 #ifdef CFG_BRD_LPC1343_802154USBSTICK
170 #define CFG_UART_BAUDRATE (115200)
171 #define CFG_UART_BUFSIZE (512)
172 #endif
173 /*=========================================================================*/
174
175
176 /*=========================================================================
177 SSP
178 -----------------------------------------------------------------------
179
180 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
181 CFG_SSP0_SCKPIN_0_6
182
183 -----------------------------------------------------------------------*/
184 #ifdef CFG_BRD_LPC1343_REFDESIGN
185 #define CFG_SSP0_SCKPIN_2_11
186 // #define CFG_SSP0_SCKPIN_0_6
187 #endif
188
189 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
190 #define CFG_SSP0_SCKPIN_2_11
191 // #define CFG_SSP0_SCKPIN_0_6
192 #endif
193
194 #ifdef CFG_BRD_LPC1343_802154USBSTICK
195 // #define CFG_SSP0_SCKPIN_2_11
196 #define CFG_SSP0_SCKPIN_0_6
197 #endif
198 /*=========================================================================*/
199
200
201 /*=========================================================================
202 ON-BOARD LED
203 -----------------------------------------------------------------------
204
205 CFG_LED_PORT The port for the on board LED
206 CFG_LED_PIN The pin for the on board LED
207 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
208 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
209
210 -----------------------------------------------------------------------*/
211 #ifdef CFG_BRD_LPC1343_REFDESIGN
212 #define CFG_LED_PORT (2)
213 #define CFG_LED_PIN (10)
214 #define CFG_LED_ON (0)
215 #define CFG_LED_OFF (1)
216 #endif
217
218 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
219 #define CFG_LED_PORT (2)
220 #define CFG_LED_PIN (10)
221 #define CFG_LED_ON (0)
222 #define CFG_LED_OFF (1)
223 #endif
224
225 #ifdef CFG_BRD_LPC1343_802154USBSTICK
226 #define CFG_LED_PORT (3)
227 #define CFG_LED_PIN (2)
228 #define CFG_LED_ON (0)
229 #define CFG_LED_OFF (1)
230 #endif
231 /*=========================================================================*/
232
233
234 /*=========================================================================
235 MICRO-SD CARD
236 -----------------------------------------------------------------------
237
238 CFG_SDCARD If this field is defined SD Card and FAT32
239 file system support will be included
240 CFG_SDCARD_READONLY If this is set to 1, all commands to
241 write to the SD card will be removed
242 saving some flash space.
243 CFG_SDCARD_CDPORT The card detect port number
244 CFG_SDCARD_CDPIN The card detect pin number
245
246 NOTE: All config settings for FAT32 are defined
247 in ffconf.h
248
249 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
250 ~300KB/s (w/512 byte read buffer)
251
252 PIN LAYOUT: The pin layout that is used by this driver
253 can be seen in the following schematic:
254 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
255
256 DEPENDENCIES: SDCARD requires the use of SSP0.
257 -----------------------------------------------------------------------*/
258 #ifdef CFG_BRD_LPC1343_REFDESIGN
259 // #define CFG_SDCARD
260 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
261 #define CFG_SDCARD_CDPORT (3)
262 #define CFG_SDCARD_CDPIN (0)
263 #endif
264
265 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
266 #define CFG_SDCARD
267 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
268 #define CFG_SDCARD_CDPORT (3)
269 #define CFG_SDCARD_CDPIN (0)
270 #endif
271
272 #ifdef CFG_BRD_LPC1343_802154USBSTICK
273 // #define CFG_SDCARD
274 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
275 #define CFG_SDCARD_CDPORT (3)
276 #define CFG_SDCARD_CDPIN (0)
277 #endif
278 /*=========================================================================*/
279
280
281 /*=========================================================================
282 USB
283 -----------------------------------------------------------------------
284
285 CFG_USBHID If this field is defined USB HID support will
286 be included. Currently uses ROM-based USB HID
287 CFG_USBCDC If this field is defined USB CDC support will
288 be included, with the USB Serial Port speed
289 set to 115200 BPS by default
290 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
291 when initialising USBCDC, and should be a
292 standard value like 57600, 9600, etc.
293 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
294 USB to connect. Must be a multiple of 10!
295 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
296 printf data until it can be sent out in
297 64 byte frames. The buffer is required since
298 only one frame per ms can be sent using USB
299 CDC (see 'puts' in systeminit.c).
300
301 -----------------------------------------------------------------------*/
302 #define CFG_USB_VID (0x239A)
303 #define CFG_USB_PID (0x1002)
304
305 #ifdef CFG_BRD_LPC1343_REFDESIGN
306 // #define CFG_USBHID
307 #define CFG_USBCDC
308 #define CFG_USBCDC_BAUDRATE (115200)
309 #define CFG_USBCDC_INITTIMEOUT (5000)
310 #define CFG_USBCDC_BUFFERSIZE (256)
311 #endif
312
313 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
314 // #define CFG_USBHID
315 #define CFG_USBCDC
316 #define CFG_USBCDC_BAUDRATE (115200)
317 #define CFG_USBCDC_INITTIMEOUT (5000)
318 #define CFG_USBCDC_BUFFERSIZE (256)
319 #endif
320
321 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
322 // #define CFG_USBHID
323 // #define CFG_USBCDC
324 #define CFG_USBCDC_BAUDRATE (115200)
325 #define CFG_USBCDC_INITTIMEOUT (5000)
326 #define CFG_USBCDC_BUFFERSIZE (256)
327 #endif
328
329 #ifdef CFG_BRD_LPC1343_802154USBSTICK
330 // #define CFG_USBHID
331 #define CFG_USBCDC
332 #define CFG_USBCDC_BAUDRATE (115200)
333 #define CFG_USBCDC_INITTIMEOUT (5000)
334 #define CFG_USBCDC_BUFFERSIZE (256)
335 #endif
336 /*=========================================================================*/
337
338
339 /*=========================================================================
340 PRINTF REDIRECTION
341 -----------------------------------------------------------------------
342
343 CFG_PRINTF_UART Will cause all printf statements to be
344 redirected to UART
345 CFG_PRINTF_USBCDC Will cause all printf statements to be
346 redirect to USB Serial
347 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
348 "\n" for *nix
349
350 Note: If no printf redirection definitions are present, all printf
351 output will be ignored, though this will also save ~350 bytes flash.
352
353 NOTE: PRINTF Support = ~350 bytes Flash (-Os)
354 -----------------------------------------------------------------------*/
355 #ifdef CFG_BRD_LPC1343_REFDESIGN
356 // #define CFG_PRINTF_UART
357 #define CFG_PRINTF_USBCDC
358 #define CFG_PRINTF_NEWLINE "\n"
359 #endif
360
361 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
362 // #define CFG_PRINTF_UART
363 #define CFG_PRINTF_USBCDC
364 #define CFG_PRINTF_NEWLINE "\n"
365 #endif
366
367 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
368 #define CFG_PRINTF_UART
369 // #define CFG_PRINTF_USBCDC
370 #define CFG_PRINTF_NEWLINE "\n"
371 #endif
372
373 #ifdef CFG_BRD_LPC1343_802154USBSTICK
374 // #define CFG_PRINTF_UART
375 #define CFG_PRINTF_USBCDC
376 #define CFG_PRINTF_NEWLINE "\n"
377 #endif
378 /*=========================================================================*/
379
380
381 /*=========================================================================
382 COMMAND LINE INTERFACE
383 -----------------------------------------------------------------------
384
385 CFG_INTERFACE If this field is defined the UART or USBCDC
386 based command-line interface will be included
387 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
388 incoming command
389 CFG_INTERFACE_PROMPT The command prompt to display at the start
390 of every new data entry line
391 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
392 response to commands will be send to the
393 output buffer. The command prompt will not
394 be displayed and incoming text will not be
395 echoed back to the output buffer (allowing
396 you to see the text you have input). This
397 is normally only desirable in a situation
398 where another MCU is communicating with
399 the LPC1343.
400 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
401 characters will be dropped
402 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
403 set high when a command starts executing
404 and will go low when the command has
405 finished executing or the LCD is not busy.
406 This allows another device to know when a
407 new command can safely be sent.
408 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
409 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
410 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
411 error messages will be returned (followed
412 by CFG_PRINTF_NEWLINE), rather than more
413 verbose error messages. The specific
414 characters used are defined below.
415 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
416 will be sent when the command prompt is
417 ready for a new command. This is in
418 addition to CFG_INTERFACE_ENABLEIRQ if
419 this is also enabled. The character used
420 is defined below.
421
422 NOTE: The command-line interface will use either
423 USB-CDC or UART depending on whether
424 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
425 selected.
426 -----------------------------------------------------------------------*/
427 #ifdef CFG_BRD_LPC1343_REFDESIGN
428 #define CFG_INTERFACE
429 #define CFG_INTERFACE_MAXMSGSIZE (256)
430 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
431 #define CFG_INTERFACE_SILENTMODE (0)
432 #define CFG_INTERFACE_DROPCR (1)
433 #define CFG_INTERFACE_ENABLEIRQ (0)
434 #define CFG_INTERFACE_IRQPORT (2)
435 #define CFG_INTERFACE_IRQPIN (0)
436 #define CFG_INTERFACE_SHORTERRORS (0)
437 #define CFG_INTERFACE_CONFIRMREADY (0)
438 #endif
439
440 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
441 #define CFG_INTERFACE
442 #define CFG_INTERFACE_MAXMSGSIZE (256)
443 #define CFG_INTERFACE_PROMPT "LCD >> "
444 #define CFG_INTERFACE_SILENTMODE (0)
445 #define CFG_INTERFACE_DROPCR (1)
446 #define CFG_INTERFACE_ENABLEIRQ (0)
447 #define CFG_INTERFACE_IRQPORT (2)
448 #define CFG_INTERFACE_IRQPIN (0)
449 #define CFG_INTERFACE_SHORTERRORS (0)
450 #define CFG_INTERFACE_CONFIRMREADY (0)
451 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
452 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
453 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
454 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
455 #endif
456
457 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
458 #define CFG_INTERFACE
459 #define CFG_INTERFACE_MAXMSGSIZE (256)
460 #define CFG_INTERFACE_PROMPT "LCD >> "
461 #define CFG_INTERFACE_SILENTMODE (1)
462 #define CFG_INTERFACE_DROPCR (1)
463 #define CFG_INTERFACE_ENABLEIRQ (1)
464 #define CFG_INTERFACE_IRQPORT (2)
465 #define CFG_INTERFACE_IRQPIN (0)
466 #define CFG_INTERFACE_SHORTERRORS (1)
467 #define CFG_INTERFACE_CONFIRMREADY (1)
468 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
469 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
470 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
471 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
472 #endif
473
474 #ifdef CFG_BRD_LPC1343_802154USBSTICK
475 // #define CFG_INTERFACE
476 #define CFG_INTERFACE_MAXMSGSIZE (256)
477 #define CFG_INTERFACE_PROMPT "CMD >> "
478 #define CFG_INTERFACE_SILENTMODE (0)
479 #define CFG_INTERFACE_DROPCR (1)
480 #define CFG_INTERFACE_ENABLEIRQ (0)
481 #define CFG_INTERFACE_IRQPORT (2)
482 #define CFG_INTERFACE_IRQPIN (0)
483 #define CFG_INTERFACE_SHORTERRORS (0)
484 #define CFG_INTERFACE_CONFIRMREADY (0)
485 #endif
486 /*=========================================================================*/
487
488
489 /*=========================================================================
490 PWM SETTINGS
491 -----------------------------------------------------------------------
492
493 CFG_PWM If this is defined, a basic PWM driver
494 will be included using 16-bit Timer 1 and
495 Pin 1.9 (MAT0) for the PWM output. In
496 order to allow for a fixed number of
497 pulses to be generated, some PWM-specific
498 code is required in the 16-Bit Timer 1
499 ISR. See "core/timer16/timer16.c" for
500 more information.
501 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
502 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
503
504 DEPENDENCIES: PWM output requires the use of 16-bit
505 timer 1 and pin 1.9 (CT16B1_MAT0).
506 -----------------------------------------------------------------------*/
507 // #define CFG_PWM
508 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
509 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
510 /*=========================================================================*/
511
512
513 /*=========================================================================
514 STEPPER MOTOR SETTINGS
515 -----------------------------------------------------------------------
516
517 CFG_STEPPER If this is defined, a simple bi-polar
518 stepper motor will be included for common
519 H-bridge chips like the L293D or SN754410N
520
521 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
522 32-bit Timer 0.
523 -----------------------------------------------------------------------*/
524 // #define CFG_STEPPER
525 /*=========================================================================*/
526
527
528 /*=========================================================================
529 EEPROM
530 -----------------------------------------------------------------------
531
532 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
533 will be included during build
534 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
535
536 -----------------------------------------------------------------------*/
537 #ifdef CFG_BRD_LPC1343_REFDESIGN
538 #define CFG_I2CEEPROM
539 #define CFG_I2CEEPROM_SIZE (3072)
540 #endif
541
542 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
543 #define CFG_I2CEEPROM
544 #define CFG_I2CEEPROM_SIZE (4096)
545 #endif
546
547 #ifdef CFG_BRD_LPC1343_802154USBSTICK
548 #define CFG_I2CEEPROM
549 #define CFG_I2CEEPROM_SIZE (3072)
550 #endif
551 /*=========================================================================*/
552
553
554 /*=========================================================================
555 EEPROM MEMORY MAP
556 -----------------------------------------------------------------------
557 EEPROM is used to persist certain user modifiable values to make
558 sure that these changes remain in effect after a reset or hard
559 power-down. The addresses in EEPROM for these various system
560 settings/values are defined below. The first 256 bytes of EEPROM
561 are reserved for this (0x0000..0x00FF).
562
563 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
564
565 EEPROM Address (0x0000..0x00FF)
566 ===============================
567 0 1 2 3 4 5 6 7 8 9 A B C D E F
568 000x x x x x x x x x . x x . . . . . Chibi
569 001x . . . . . . . . . . . . . . . .
570 002x x x x x . . . . . . . . . . . . UART
571 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
572 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
573 005x . . . . . . . . . . . . . . . .
574 006x . . . . . . . . . . . . . . . .
575 007x . . . . . . . . . . . . . . . .
576 008x . . . . . . . . . . . . . . . .
577 009x . . . . . . . . . . . . . . . .
578 00Ax . . . . . . . . . . . . . . . .
579 00Bx . . . . . . . . . . . . . . . .
580 00Cx . . . . . . . . . . . . . . . .
581 00Dx . . . . . . . . . . . . . . . .
582 00Ex . . . . . . . . . . . . . . . .
583 00Fx . . . . . . . . . . . . . . . .
584
585 -----------------------------------------------------------------------*/
586 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
587 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
588 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
589 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
590 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
591 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
592 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
593 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
594 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
595 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
596 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
597 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
598 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
599 /*=========================================================================*/
600
601
602 /*=========================================================================
603 LM75B TEMPERATURE SENSOR
604 -----------------------------------------------------------------------
605
606 CFG_LM75B If defined, drivers for an optional LM75B
607 temperature sensor will be included during
608 build (requires external HW)
609
610 -----------------------------------------------------------------------*/
611 // #define CFG_LM75B
612 /*=========================================================================*/
613
614
615 /*=========================================================================
616 CHIBI WIRELESS STACK
617 -----------------------------------------------------------------------
618
619 CFG_CHIBI If defined, the CHIBI wireless stack will be
620 included during build. Requires external HW.
621 CFG_CHIBI_MODE The mode to use when receiving and transmitting
622 wireless data. See chb_drvr.h for possible values
623 CFG_CHIBI_POWER The power level to use when transmitting. See
624 chb_drvr.h for possible values
625 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
626 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
627 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
628 0 to disable it. If promiscuous mode is
629 enabled be sure to set CFG_CHIBI_BUFFERSIZE
630 to an appropriately large value (ex. 1024)
631 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
632
633 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
634 0 and pins 3.1, 3.2, 3.3. It also requires
635 the presence of CFG_I2CEEPROM.
636
637 NOTE: These settings are not relevant to all boards!
638 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
639 show how 'CHIBI' is meant to be connected
640 -----------------------------------------------------------------------*/
641 #ifdef CFG_BRD_LPC1343_REFDESIGN
642 // #define CFG_CHIBI
643 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
644 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
645 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
646 #define CFG_CHIBI_PANID (0x1234)
647 #define CFG_CHIBI_PROMISCUOUS (0)
648 #define CFG_CHIBI_BUFFERSIZE (128)
649 #endif
650
651 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
652 // #define CFG_CHIBI
653 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
654 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
655 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
656 #define CFG_CHIBI_PANID (0x1234)
657 #define CFG_CHIBI_PROMISCUOUS (0)
658 #define CFG_CHIBI_BUFFERSIZE (128)
659 #endif
660
661 #ifdef CFG_BRD_LPC1343_802154USBSTICK
662 #define CFG_CHIBI
663 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
664 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
665 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
666 #define CFG_CHIBI_PANID (0x1234)
667 #define CFG_CHIBI_PROMISCUOUS (0)
668 #define CFG_CHIBI_BUFFERSIZE (1024)
669 #endif
670 /*=========================================================================*/
671
672
673 /*=========================================================================
674 TFT LCD
675 -----------------------------------------------------------------------
676
677 CFG_TFTLCD If defined, this will cause drivers for
678 a pre-determined LCD screen to be included
679 during build. Only one LCD driver can be
680 included during the build process (for ex.
681 'drivers/lcd/hw/ILI9325.c')
682 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
683 included for 3x6, 5x8, 7x8 and 8x8 fonts.
684 This should only be enabled if these small
685 fonts are required since there is already
686 support for larger fonts generated with
687 Dot Factory
688 http://www.pavius.net/downloads/tools/53-the-dot-factory
689 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
690 touch event with the touch screen (and exit
691 from 'tsWaitForEvent' in touchscreen.c).
692 Should be an 8-bit value somewhere between
693 8 and 75 in normal circumstances. This is
694 the default value and may be overriden by
695 a value stored in EEPROM.
696 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
697 presses in dialogue boxes
698
699 PIN LAYOUT: The pin layout that is used by this driver
700 can be seen in the following schematic:
701 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
702
703 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
704 1.10, 1.11, 3.3 and 2.1-9.
705 -----------------------------------------------------------------------*/
706 #ifdef CFG_BRD_LPC1343_REFDESIGN
707 // #define CFG_TFTLCD
708 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
709 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
710 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
711 #endif
712
713 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
714 #define CFG_TFTLCD
715 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
716 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
717 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
718 #endif
719
720 #ifdef CFG_BRD_LPC1343_802154USBSTICK
721 // #define CFG_TFTLCD
722 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
723 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
724 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
725 #endif
726 /*=========================================================================*/
727
728
729 /*=========================================================================
730 128x64 Graphic LCDs
731 -----------------------------------------------------------------------
732
733 CFG_ST7565 If defined, this will cause drivers for
734 the 128x64 pixel ST7565 LCD to be included
735 CFG_SSD1306 If defined, this will cause drivers for
736 the 128x64 pixel SSD1306 OLED display to be
737 included
738
739 Note: LPC1114 @ 36MHz and the ST7565 with the
740 backlight enabled consumes ~35mA
741
742 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
743 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
744 -----------------------------------------------------------------------*/
745 // #define CFG_ST7565
746 // #define CFG_SSD1306
747 /*=========================================================================*/
748
749
750 /*=========================================================================
751 RSA Encryption
752 -----------------------------------------------------------------------
753
754 CFG_RSA If defined, support for basic RSA
755 encryption will be included.
756 CFG_RSA_BITS Indicates the number of bits used for
757 RSA encryption keys. To keep code size
758 reasonable, RSA encryption is currently
759 limited to using 64-bit or 32-bit numbers,
760 with 64-bit providing higher security, and
761 32-bit providing smaller encrypted text
762 size.
763
764 NOTE: Please note that Printf can not be
765 used to display 64-bit values (%lld)!
766 -----------------------------------------------------------------------*/
767 // #define CFG_RSA
768 #define CFG_RSA_BITS (32)
769 /*=========================================================================*/
770
771
772
773
774 /*=========================================================================
775 CONFIG FILE VALIDATION
776 -------------------------------------------------------------------------
777 Basic error checking to make sure that incompatible defines are not
778 enabled at the same time, etc.
779
780 =========================================================================*/
781
782 #if !defined CFG_BRD_LPC1343_REFDESIGN && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && !defined CFG_BRD_LPC1343_802154USBSTICK
783 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
784 #endif
785
786 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
787 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
788 #endif
789
790 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
791 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
792 #endif
793
794 #if defined CFG_USBCDC && defined CFG_USBHID
795 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
796 #endif
797
798 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
799 #error "Only one SCK pin can be defined at a time for SSP0"
800 #endif
801
802 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
803 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
804 #endif
805
806 #ifdef CFG_INTERFACE
807 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
808 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
809 #endif
810 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
811 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
812 #endif
813 #endif
814
815 #ifdef CFG_CHIBI
816 #if !defined CFG_I2CEEPROM
817 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
818 #endif
819 #ifdef CFG_SDCARD
820 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
821 #endif
822 #ifdef CFG_TFTLCD
823 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
824 #endif
825 #ifdef CFG_PWM
826 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
827 #endif
828 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
829 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
830 #endif
831 #endif
832
833 #ifdef CFG_TFTLCD
834 #ifdef CFG_ST7565
835 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
836 #endif
837 #ifdef CFG_SSD1306
838 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
839 #endif
840 #ifdef CFG_PWM
841 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
842 #endif
843 #if !defined CFG_I2CEEPROM
844 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
845 #endif
846 #endif
847
848 #ifdef CFG_SDCARD
849 #ifdef CFG_STEPPER
850 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
851 #endif
852 #endif
853
854 #ifdef CFG_ST7565
855 #ifdef CFG_SSD1306
856 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
857 #endif
858 #endif
859
860 #ifdef CFG_RSA
861 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
862 #error "CFG_RSA_BITS must be equal to either 32 or 64."
863 #endif
864 #endif
865
866 #endif
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