Software License Agreement (BSD License)
- Copyright (c) 2010, microBuilder SARL
+ Copyright (c) 2012, microBuilder SARL
All rights reserved.
Redistribution and use in source and binary forms, with or without
microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
+ CFG_BRD_LPC1343_OLIMEX_P
+ ==============================
+
+ Simple Olimex LPC1343 breakout board
+
+ CFG_BRD_LPC1343_LPCXPRESSO
+ ==============================
+
+ LPC1343 LPCXpresso board
+
-----------------------------------------------------------------------*/
#define CFG_BRD_LPC1343_REFDESIGN
// #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
// #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
// #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
// #define CFG_BRD_LPC1343_802154USBSTICK
+ // #define CFG_BRD_LPC1343_OLIMEX_P
+ // #define CFG_BRD_LPC1343_LPCXPRESSO
/*=========================================================================*/
ST7565 X X X X X X X X X X X X X . . . X
ST7735 . . . . X X X X X X . . . . . . .
SHARPMEM . . . . X X X X . . . . . . . . .
- SSD1306 . . . . X X X . X X . . . . . . .
+ SSD1306 SPI . . . . X X X . X X . . . . . . .
+ SSD1306 I2C . . . . . X . . . . . . . . . . .
+ SSD1351 . . . . X X X X X . . . . . . . .
MCP121 . . . . . . . . . . . . . . X . .
+ PN532 [3] . . . . . . . . . . . . . . X X .
TIMERS SSP ADC UART
====================== === ======= ====
ST7565 . . . . . X X X X .
ST7535 . . . . . . . . . .
SHARPMEM . . . . . . . . . .
- SSD1306 . . . . . . . . . .
+ SSD1306 SPI . . . . . . . . . .
+ SSD1306 I2C . . . . . . . . . .
INTERFACE . . . . . . . . . X[2]
[1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
can safely be used by other peripherals, but may need to be
reconfigured when you wakeup from deep-sleep.
[2] INTERFACE can be configured to use either USBCDC or UART
+ [3] P3.2 is only used with the I2C bus (for IRQ)
**************************************************************************/
MCP4725 0xC0 1100000x
TSL2561 0x72 0111001x
TCS3414 0x72 0111001x
+ PN532 0x48 0100100x
+ SSD1306_I2C 0x78 0111100x // Assumes SA0 = GND
[1] Alternative addresses may exists, but the addresses listed in this
table are the values used in the code base
/*=========================================================================
FIRMWARE VERSION SETTINGS
-----------------------------------------------------------------------*/
- #define CFG_FIRMWARE_VERSION_MAJOR (0)
- #define CFG_FIRMWARE_VERSION_MINOR (9)
- #define CFG_FIRMWARE_VERSION_REVISION (8)
+ #define CFG_FIRMWARE_VERSION_MAJOR (1)
+ #define CFG_FIRMWARE_VERSION_MINOR (0)
+ #define CFG_FIRMWARE_VERSION_REVISION (0)
/*=========================================================================*/
/*=========================================================================*/
+/*=========================================================================
+ GPIO INTERRUPTS
+ -----------------------------------------------------------------------
+
+ IF you wish to use the GPIO interrupt handlers elsewhere in your code,
+ you should probably define a seperate IRQHandler for the appropriate
+ GPIO bank rather than using the definitions in core/gpio/gpio.c (to
+ avoid causing problems in other projects, and to make updates easier,
+ etc.) To disable the default IRQHandler, simply comment out the
+ define below for the appropriate GPIO bank and implement the handler
+ somewhere else.
+
+ GPIO_ENABLE_IRQ0 If defined, PIOINT0_IRQHandler will be declared and
+ handled in core/gpio/gpio.c
+ GPIO_ENABLE_IRQ1 If defined, PIOINT1_IRQHandler will be declared and
+ handled in core/gpio/gpio.c
+ GPIO_ENABLE_IRQ2 If defined, PIOINT2_IRQHandler will be declared and
+ handled in core/gpio/gpio.c
+ GPIO_ENABLE_IRQ3 If defined, PIOINT3_IRQHandler will be declared and
+ handled in core/gpio/gpio.c
+
+ -----------------------------------------------------------------------*/
+ #ifdef CFG_BRD_LPC1343_REFDESIGN
+ // #define GPIO_ENABLE_IRQ0
+ #define GPIO_ENABLE_IRQ1
+ // #define GPIO_ENABLE_IRQ2
+ // #define GPIO_ENABLE_IRQ3
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
+ // #define GPIO_ENABLE_IRQ0
+ #define GPIO_ENABLE_IRQ1
+ // #define GPIO_ENABLE_IRQ2
+ // #define GPIO_ENABLE_IRQ3
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
+ // #define GPIO_ENABLE_IRQ0
+ #define GPIO_ENABLE_IRQ1
+ // #define GPIO_ENABLE_IRQ2
+ // #define GPIO_ENABLE_IRQ3
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
+ // #define GPIO_ENABLE_IRQ0
+ #define GPIO_ENABLE_IRQ1
+ // #define GPIO_ENABLE_IRQ2
+ // #define GPIO_ENABLE_IRQ3
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_802154USBSTICK
+ // #define GPIO_ENABLE_IRQ0
+ #define GPIO_ENABLE_IRQ1
+ // #define GPIO_ENABLE_IRQ2
+ // #define GPIO_ENABLE_IRQ3
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ // #define GPIO_ENABLE_IRQ0
+ #define GPIO_ENABLE_IRQ1
+ // #define GPIO_ENABLE_IRQ2
+ // #define GPIO_ENABLE_IRQ3
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ // #define GPIO_ENABLE_IRQ0
+ #define GPIO_ENABLE_IRQ1
+ // #define GPIO_ENABLE_IRQ2
+ // #define GPIO_ENABLE_IRQ3
+ #endif
+/*=========================================================================*/
+
+
/*=========================================================================
ALTERNATE RESET PIN
-----------------------------------------------------------------------
#define CFG_UART_BAUDRATE (115200)
#define CFG_UART_BUFSIZE (512)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ #define CFG_UART_BAUDRATE (115200)
+ #define CFG_UART_BUFSIZE (512)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ #define CFG_UART_BAUDRATE (115200)
+ #define CFG_UART_BUFSIZE (512)
+ #endif
/*=========================================================================*/
// #define CFG_SSP0_SCKPIN_2_11
#define CFG_SSP0_SCKPIN_0_6
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ #define CFG_SSP0_SCKPIN_2_11
+ // #define CFG_SSP0_SCKPIN_0_6
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ #define CFG_SSP0_SCKPIN_2_11
+ // #define CFG_SSP0_SCKPIN_0_6
+ #endif
+/*=========================================================================*/
+
+
+/*=========================================================================
+ ADC
+ -----------------------------------------------------------------------
+
+ ADC_AVERAGING_ENABLE To get better results, the ADC code can take
+ a number of samples and return the average
+ value. This is slower, but can give more
+ accurate results compared to single-reading.
+
+ To enable averaging, set ADC_AVERAGING_ENABLE
+ to a non-zero value.
+ ADC_AVERAGING_SAMPLES The number of ADC samples to read and
+ average if ADC averaging is enabled.
+
+ -----------------------------------------------------------------------*/
+ #ifdef CFG_BRD_LPC1343_REFDESIGN
+ #define ADC_AVERAGING_ENABLE (1)
+ #define ADC_AVERAGING_SAMPLES (5)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
+ #define ADC_AVERAGING_ENABLE (1)
+ #define ADC_AVERAGING_SAMPLES (5)
+ #endif
+
+ #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
+ #define ADC_AVERAGING_ENABLE (0)
+ #define ADC_AVERAGING_SAMPLES (5)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_802154USBSTICK
+ #define ADC_AVERAGING_ENABLE (0)
+ #define ADC_AVERAGING_SAMPLES (5)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ #define ADC_AVERAGING_ENABLE (0)
+ #define ADC_AVERAGING_SAMPLES (5)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ #define ADC_AVERAGING_ENABLE (0)
+ #define ADC_AVERAGING_SAMPLES (5)
+ #endif
/*=========================================================================*/
#define CFG_LED_ON (0)
#define CFG_LED_OFF (1)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ #define CFG_LED_PORT (3)
+ #define CFG_LED_PIN (2)
+ #define CFG_LED_ON (0)
+ #define CFG_LED_OFF (1)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ #define CFG_LED_PORT (0)
+ #define CFG_LED_PIN (7)
+ #define CFG_LED_ON (0)
+ #define CFG_LED_OFF (1)
+ #endif
/*=========================================================================*/
#define CFG_SDCARD_CDPORT (3)
#define CFG_SDCARD_CDPIN (0)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ // #define CFG_SDCARD
+ #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
+ #define CFG_SDCARD_CDPORT (3)
+ #define CFG_SDCARD_CDPIN (0)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ // #define CFG_SDCARD
+ #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
+ #define CFG_SDCARD_CDPORT (3)
+ #define CFG_SDCARD_CDPIN (0)
+ #endif
/*=========================================================================*/
#define CFG_USBCDC_INITTIMEOUT (5000)
#define CFG_USBCDC_BUFFERSIZE (256)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ // #define CFG_USBHID
+ #define CFG_USBCDC
+ #define CFG_USBCDC_BAUDRATE (115200)
+ #define CFG_USBCDC_INITTIMEOUT (5000)
+ #define CFG_USBCDC_BUFFERSIZE (256)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ // #define CFG_USBHID
+ #define CFG_USBCDC
+ #define CFG_USBCDC_BAUDRATE (115200)
+ #define CFG_USBCDC_INITTIMEOUT (5000)
+ #define CFG_USBCDC_BUFFERSIZE (256)
+ #endif
/*=========================================================================*/
PRINTF REDIRECTION
-----------------------------------------------------------------------
+ CFG_PRINTF_MAXSTRINGSIZE Maximum size of string buffer for printf
CFG_PRINTF_UART Will cause all printf statements to be
redirected to UART
CFG_PRINTF_USBCDC Will cause all printf statements to be
output will be ignored.
-----------------------------------------------------------------------*/
#ifdef CFG_BRD_LPC1343_REFDESIGN
+ #define CFG_PRINTF_MAXSTRINGSIZE (255)
// #define CFG_PRINTF_UART
#define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\r\n"
#endif
#ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
+ #define CFG_PRINTF_MAXSTRINGSIZE (255)
#define CFG_PRINTF_UART
// #define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\r\n"
#endif
#ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
+ #define CFG_PRINTF_MAXSTRINGSIZE (255)
// #define CFG_PRINTF_UART
#define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\r\n"
#endif
#ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
+ #define CFG_PRINTF_MAXSTRINGSIZE (255)
#define CFG_PRINTF_UART
// #define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\n"
#endif
#ifdef CFG_BRD_LPC1343_802154USBSTICK
+ #define CFG_PRINTF_MAXSTRINGSIZE (255)
+ // #define CFG_PRINTF_UART
+ #define CFG_PRINTF_USBCDC
+ #define CFG_PRINTF_NEWLINE "\r\n"
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ #define CFG_PRINTF_MAXSTRINGSIZE (255)
+ // #define CFG_PRINTF_UART
+ #define CFG_PRINTF_USBCDC
+ #define CFG_PRINTF_NEWLINE "\r\n"
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ #define CFG_PRINTF_MAXSTRINGSIZE (255)
// #define CFG_PRINTF_UART
#define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\r\n"
#define CFG_INTERFACE_SHORTERRORS (0)
#define CFG_INTERFACE_CONFIRMREADY (0)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ #define CFG_INTERFACE
+ #define CFG_INTERFACE_MAXMSGSIZE (256)
+ #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
+ #define CFG_INTERFACE_SILENTMODE (0)
+ #define CFG_INTERFACE_DROPCR (0)
+ #define CFG_INTERFACE_ENABLEIRQ (0)
+ #define CFG_INTERFACE_IRQPORT (0)
+ #define CFG_INTERFACE_IRQPIN (7)
+ #define CFG_INTERFACE_SHORTERRORS (0)
+ #define CFG_INTERFACE_CONFIRMREADY (0)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ #define CFG_INTERFACE
+ #define CFG_INTERFACE_MAXMSGSIZE (256)
+ #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
+ #define CFG_INTERFACE_SILENTMODE (0)
+ #define CFG_INTERFACE_DROPCR (0)
+ #define CFG_INTERFACE_ENABLEIRQ (0)
+ #define CFG_INTERFACE_IRQPORT (0)
+ #define CFG_INTERFACE_IRQPIN (7)
+ #define CFG_INTERFACE_SHORTERRORS (0)
+ #define CFG_INTERFACE_CONFIRMREADY (0)
+ #endif
/*=========================================================================*/
#define CFG_I2CEEPROM
#define CFG_I2CEEPROM_SIZE (3072)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ // #define CFG_I2CEEPROM
+ #define CFG_I2CEEPROM_SIZE (3072)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ // #define CFG_I2CEEPROM
+ #define CFG_I2CEEPROM_SIZE (3072)
+ #endif
/*=========================================================================*/
#define CFG_CHIBI_PROMISCUOUS (0)
#define CFG_CHIBI_BUFFERSIZE (1024)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ // #define CFG_CHIBI
+ #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
+ #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
+ #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
+ #define CFG_CHIBI_PANID (0x1234)
+ #define CFG_CHIBI_PROMISCUOUS (0)
+ #define CFG_CHIBI_BUFFERSIZE (128)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ // #define CFG_CHIBI
+ #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
+ #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
+ #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
+ #define CFG_CHIBI_PANID (0x1234)
+ #define CFG_CHIBI_PROMISCUOUS (0)
+ #define CFG_CHIBI_BUFFERSIZE (128)
+ #endif
/*=========================================================================*/
a pre-determined LCD screen to be included
during build. Only one LCD driver can be
included during the build process (for ex.
- 'drivers/lcd/hw/ILI9325.c')
+ 'drivers/displays/hw/ILI9325.c')
CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
included for 3x6, 5x8, 7x8 and 8x8 fonts.
This should only be enabled if these small
#define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
#define CFG_TFTLCD_TS_KEYPADDELAY (100)
#endif
+
+ #ifdef CFG_BRD_LPC1343_OLIMEX_P
+ // #define CFG_TFTLCD
+ #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
+ #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
+ #define CFG_TFTLCD_TS_KEYPADDELAY (100)
+ #endif
+
+ #ifdef CFG_BRD_LPC1343_LPCXPRESSO
+ // #define CFG_TFTLCD
+ #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
+ #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
+ #define CFG_TFTLCD_TS_KEYPADDELAY (100)
+ #endif
/*=========================================================================*/
the 128x64 pixel ST7565 LCD to be included
CFG_SSD1306 If defined, this will cause drivers for
the 128x64 pixel SSD1306 OLED display to be
- included
+ included (using bit-banged SPI)
CFG_SHARPMEM If defined, this will cause drivers for
Sharp Memory Displays to be included
DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
+ DEPENDENCIES: SSD1306_I2C requires the use of pins 2.2.
DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
-----------------------------------------------------------------------*/
// #define CFG_ST7565
=========================================================================*/
-#if !defined CFG_BRD_LPC1343_REFDESIGN && !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && !defined CFG_BRD_LPC1343_802154USBSTICK
- #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
+#if !defined CFG_BRD_LPC1343_REFDESIGN && \
+ !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
+ !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
+ !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
+ !defined CFG_BRD_LPC1343_802154USBSTICK && \
+ !defined CFG_BRD_LPC1343_OLIMEX_P && \
+ !defined CFG_BRD_LPC1343_LPCXPRESSO
+ #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK or CFG_BRD_LPC1343_LPCXPRESSO)"
#endif
#if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
#if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
#error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
#endif
+ #if !defined GPIO_ENABLE_IRQ1
+ #error "GPIO_ENABLE_IRQ1 must be enabled when using Chibi (Chibi IRQ is on GPIO1.8)"
+ #endif
#endif
#ifdef CFG_TFTLCD
#ifdef CFG_SSD1306
#error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
#endif
+ #ifdef CFG_SHARPMEM
+ #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
+ #endif
#ifdef CFG_PWM
#error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
#endif
#endif
#endif
+#if ADC_AVERAGING_ENABLE && ADC_AVERAGING_SAMPLES < 1
+ #error "ADC_AVERAGING_SAMPLES must be 1 or higher when ADC averaging is enabled"
+#endif
+
#endif
projects / hackover2013-badge-firmware.git / blobdiff