/**************************************************************************/
-/*!
+/*!
@file pmu.c
@author K. Townsend (microBuilder.eu)
@date 22 March 2010
For examples of how to enter either mode, see the comments for the
functions pmuSleep(), pmuDeepSleep() and pmuPowerDown().
-
+
@section LICENSE
Software License Agreement (BSD License)
/**************************************************************************/
-/*!
+/*!
Wakeup interrupt handler
*/
/**************************************************************************/
+
void WAKEUP_IRQHandler(void)
{
uint32_t regVal;
}
/**************************************************************************/
-/*!
+/*!
Setup the clock for the watchdog timer. The default is 7.8125kHz.
*/
/**************************************************************************/
/* Configure watchdog clock */
/* Freq. = 0.5MHz, div = 64: WDT_OSC = 7.8125kHz */
- SCB_WDTOSCCTRL = SCB_WDTOSCCTRL_FREQSEL_0_5MHZ |
+ SCB_WDTOSCCTRL = SCB_WDTOSCCTRL_FREQSEL_0_5MHZ |
SCB_WDTOSCCTRL_DIVSEL_DIV64;
// Switch main clock to WDT output
}
/**************************************************************************/
-/*!
+/*!
@brief Initialises the power management unit
*/
/**************************************************************************/
void pmuInit( void )
{
/* Enable all clocks, even those turned off at power up. */
- SCB_PDRUNCFG &= ~(SCB_PDRUNCFG_WDTOSC_MASK |
- SCB_PDRUNCFG_SYSOSC_MASK |
+ SCB_PDRUNCFG &= ~(SCB_PDRUNCFG_WDTOSC_MASK |
+ SCB_PDRUNCFG_SYSOSC_MASK |
SCB_PDRUNCFG_ADC_MASK);
return;
}
/**************************************************************************/
-/*!
+/*!
@brief Puts select peripherals in sleep mode.
This function will put the device into sleep mode. Most gpio pins
@section Example
- @code
+ @code
// Configure wakeup sources before going into sleep/deep-sleep.
// By default, pin 0.1 is configured as wakeup source (falling edge)
pmuInit();
-
+
// Enter sleep mode
pmuSleep();
@endcode
}
/**************************************************************************/
-/*!
+/*!
@brief Turns off select peripherals and puts the device in deep-sleep
mode.
The sleepCtrl parameter is used to indicate which peripherals should
be put in sleep mode (see the SCB_PDSLEEPCFG register for details).
-
- @param[in] sleepCtrl
+
+ @param[in] sleepCtrl
The bits to set in the SCB_PDSLEEPCFG register. This
controls which peripherals will be put in sleep mode.
@param[in] wakeupSeconds
wakeup. If you do not wish to wakeup after a specific
delay, enter a value of 0.
- @code
+ @code
uint32_t pmuRegVal;
-
+
// Initialise power management unit
pmuInit();
-
+
// Put peripherals into sleep mode
pmuRegVal = SCB_PDSLEEPCFG_IRCOUT_PD |
SCB_PDSLEEPCFG_IRC_PD |
SCB_PDSLEEPCFG_SYSOSC_PD |
SCB_PDSLEEPCFG_ADC_PD |
SCB_PDSLEEPCFG_BOD_PD;
-
+
// Enter deep sleep mode (wakeup after 5 seconds)
// By default, pin 0.1 is configured as wakeup source
pmuDeepSleep(pmuRegVal, 5);
/* Enable the clock for CT32B0 */
SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT32B0);
-
+
/* Configure 0.1 as Timer0_32 MAT2 */
IOCON_PIO0_1 &= ~IOCON_PIO0_1_FUNC_MASK;
IOCON_PIO0_1 |= IOCON_PIO0_1_FUNC_CT32B0_MAT2;
/* Set appropriate timer delay */
TMR_TMR32B0MR0 = PMU_WDTCLOCKSPEED_HZ * wakeupSeconds;
-
+
/* Configure match control register to raise an interrupt and reset on MR0 */
TMR_TMR32B0MCR |= (TMR_TMR32B0MCR_MR0_INT_ENABLED | TMR_TMR32B0MCR_MR0_RESET_ENABLED);
-
+
/* Configure external match register to set 0.1 high on match */
TMR_TMR32B0EMR &= ~(0xFF<<4); // Clear EMR config bits
TMR_TMR32B0EMR |= TMR_TMR32B0EMR_EMC2_HIGH; // Set MAT2 (0.1) high on match
//NVIC_EnableIRQ(WAKEUP37_IRQn); // P3.1
//NVIC_EnableIRQ(WAKEUP38_IRQn); // P3.2
//NVIC_EnableIRQ(WAKEUP39_IRQn); // P3.3
-
+
/* Use RISING EDGE for wakeup detection. */
SCB_STARTAPRP0 |= SCB_STARTAPRP0_APRPIO0_1;
-
- /* Clear all wakeup sources */
+
+ /* Clear all wakeup sources */
SCB_STARTRSRP0CLR = SCB_STARTRSRP0CLR_MASK;
/* Enable Port 0.1 as wakeup source. */
// Reconfigure clock to run from WDTOSC
pmuWDTClockInit();
-
+
/* Start the timer */
TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_ENABLED;
}
}
/**************************************************************************/
-/*!
+/*!
@brief Puts the device in deep power-down mode.
This function will configure the PMU control register and enter
@section Example
- @code
+ @code
#include "core/cpu/cpu.h"
#include "core/pmu/pmu.h"
/* Check sleep and deep power down bits. If sleep and/or
deep power down mode are entered, clear the PCON bits. */
regVal = PMU_PMUCTRL;
- regVal |= ((0x1<<8) |
+ regVal |= ((0x1<<8) |
(PMU_PMUCTRL_DPDEN_SLEEP) |
(PMU_PMUCTRL_DPDFLAG));
PMU_PMUCTRL = regVal;
}
/**************************************************************************/
-/*!
+/*!
@brief Configures parts and system peripherals to use lower power
before entering sleep mode
*/
}
/**************************************************************************/
-/*!
+/*!
@brief Restores parts and system peripherals to an appropriate
state after waking up from deep-sleep mode
*/
/**************************************************************************/
-/*!
+/*!
@file projectconfig.h
@author K. Townsend (microBuilder.eu)
are using by enabling one of the following definitions. The code base
will then try to configure itself accordingly for that board.
- CFG_BRD_LPC1343_REFDESIGN
+ CFG_BRD_LPC1343_REFDESIGN
=========================
microBuilder.eu LPC1343 Reference Design base board with
on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
-
- This is the recommended starting point for new development
- since it makes it easy to send printf output to USB CDC, access
- the on-board EEPROM, etc.
+
+ This is the recommended starting point for new development
+ since it makes it easy to send printf output to USB CDC, access
+ the on-board EEPROM, etc.
CFG_BRD_LPC1343_REFDESIGN_MINIMAL
=================================
- microBuilder.eu LPC1343 Reference Design base board with
- only the most common peripherals initialised by default.
-
+ microBuilder.eu LPC1343 Reference Design base board with
+ only the most common peripherals initialised by default.
+
Results in smallest code since EEPROM, USB, etc., are not
initialised on startup. By default, only the following
peripherals are initialised by systemInit():
-
+
- CPU (Configures the PLL, etc.)
- GPIO
- SysTick Timer
- UART (with printf support) *
-
+
* Can be removed to save 0.8kb in debug and 0.3 kb in
release. Comment out 'CFG_PRINTF_UART' to disable it.
-
+
The code size can be further reduced by several KB by removing
any IRQ Handlers that are not used. The I2C IRQHandler, for
example, uses ~1KB of flash in debug and ~400KB in release mode,
/**************************************************************************
PIN USAGE
-----------------------------------------------------------------------
- This table tries to give an indication of which GPIO pins and
+ This table tries to give an indication of which GPIO pins and
peripherals are used by the available drivers and SW examples. Only
dedicated GPIO pins available on the LPC1343 Reference Board are shown
below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
also be used as GPIO if they are available.
- PORT 1 PORT 2 PORT 3
+ PORT 1 PORT 2 PORT 3
========= ================= =======
8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
SSD1306 SPI . . . . X X X . X X . . . . . . .
SSD1351 . . . . X X X X X . . . . . . . .
MCP121 . . . . . . . . . . . . . . X . .
- PN532 [3] . . . . . . . . . . . . . . X X .
+ PN532 [3] . . . . . . . . . . . . . . X X .
TIMERS SSP ADC UART
====================== === ======= ====
The following addresses are used by the different I2C sensors included
in the code base [1]
- HEX BINARY
+ HEX BINARY
==== ========
ISL12022M (RTC) 0xDE 1101111x
ISL12022M (SRAM) 0xAE 1010111x
// #define GPIO_ENABLE_IRQ2
// #define GPIO_ENABLE_IRQ3
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
// #define GPIO_ENABLE_IRQ0
#define GPIO_ENABLE_IRQ1
UART
-----------------------------------------------------------------------
- CFG_UART_BAUDRATE The default UART speed. This value is used
- when initialising UART, and should be a
- standard value like 57600, 9600, etc.
+ CFG_UART_BAUDRATE The default UART speed. This value is used
+ when initialising UART, and should be a
+ standard value like 57600, 9600, etc.
NOTE: This value may be overridden if
another value is stored in EEPROM!
CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
#define CFG_UART_BAUDRATE (115200)
#define CFG_UART_BUFSIZE (512)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
#define CFG_UART_BAUDRATE (115200)
#define CFG_UART_BUFSIZE (512)
// #define CFG_SSP0_SCKPIN_2_11
#define CFG_SSP0_SCKPIN_0_6
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
#define CFG_SSP0_SCKPIN_2_11
// #define CFG_SSP0_SCKPIN_0_6
a number of samples and return the average
value. This is slower, but can give more
accurate results compared to single-reading.
-
+
To enable averaging, set ADC_AVERAGING_ENABLE
to a non-zero value.
ADC_AVERAGING_SAMPLES The number of ADC samples to read and
#define ADC_AVERAGING_ENABLE (0)
#define ADC_AVERAGING_SAMPLES (5)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
#define ADC_AVERAGING_ENABLE (0)
#define ADC_AVERAGING_SAMPLES (5)
#define CFG_LED_ON (0)
#define CFG_LED_OFF (1)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
#define CFG_LED_PORT (3)
#define CFG_LED_PIN (2)
BENCHMARK: With SPI set to 6.0MHz, FATFS can read
~300KB/s (w/512 byte read buffer)
-
+
PIN LAYOUT: The pin layout that is used by this driver
can be seen in the following schematic:
/tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
#define CFG_SDCARD_CDPORT (3)
#define CFG_SDCARD_CDPIN (0)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
// #define CFG_SDCARD
#define CFG_SDCARD_READONLY (1) // Must be 0 or 1
CFG_USBCDC If this field is defined USB CDC support will
be included, with the USB Serial Port speed
set to 115200 BPS by default
- CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
- when initialising USBCDC, and should be a
+ CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
+ when initialising USBCDC, and should be a
standard value like 57600, 9600, etc.
CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
USB to connect. Must be a multiple of 10!
#define CFG_USB_VID (0x239A)
#define CFG_USB_PID (0x1002)
-
+
#ifdef CFG_BRD_LPC1343_REFDESIGN
// #define CFG_USBHID
#define CFG_USBCDC
#define CFG_USBCDC_INITTIMEOUT (5000)
#define CFG_USBCDC_BUFFERSIZE (256)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
// #define CFG_USBHID
#define CFG_USBCDC
#define CFG_USBCDC_BAUDRATE (115200)
#define CFG_USBCDC_INITTIMEOUT (5000)
#define CFG_USBCDC_BUFFERSIZE (256)
- #endif
+ #endif
#ifdef CFG_BRD_LPC1343_LPCXPRESSO
// #define CFG_USBHID
-----------------------------------------------------------------------
CFG_PRINTF_MAXSTRINGSIZE Maximum size of string buffer for printf
- CFG_PRINTF_UART Will cause all printf statements to be
+ CFG_PRINTF_UART Will cause all printf statements to be
redirected to UART
CFG_PRINTF_USBCDC Will cause all printf statements to be
redirect to USB Serial
#ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
#define CFG_PRINTF_MAXSTRINGSIZE (255)
- #define CFG_PRINTF_UART
+ // #define CFG_PRINTF_UART
// #define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\r\n"
#endif
#define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\r\n"
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
#define CFG_PRINTF_MAXSTRINGSIZE (255)
// #define CFG_PRINTF_UART
#define CFG_PRINTF_USBCDC
#define CFG_PRINTF_NEWLINE "\r\n"
- #endif
+ #endif
#ifdef CFG_BRD_LPC1343_LPCXPRESSO
#define CFG_PRINTF_MAXSTRINGSIZE (255)
echoed back to the output buffer (allowing
you to see the text you have input). This
is normally only desirable in a situation
- where another MCU is communicating with
+ where another MCU is communicating with
the LPC1343.
CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
characters will be dropped
CFG_INTERFACE_LONGSYSINFO If this is set to 1 extra information will
be included in the Sys Info ('V') command
on the CLI. This can be useful when trying
- to debug problems on remote HW, or with
+ to debug problems on remote HW, or with
unknown firmware. It will also use about
0.5KB flash, though, so only enable it is
necessary.
NOTE: The command-line interface will use either
USB-CDC or UART depending on whether
- CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
+ CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
selected.
-----------------------------------------------------------------------*/
#ifdef CFG_BRD_LPC1343_REFDESIGN
#define CFG_INTERFACE_CONFIRMREADY (0)
#define CFG_INTERFACE_LONGSYSINFO (0)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
#define CFG_INTERFACE
#define CFG_INTERFACE_MAXMSGSIZE (256)
STEPPER MOTOR SETTINGS
-----------------------------------------------------------------------
- CFG_STEPPER If this is defined, a simple bi-polar
+ CFG_STEPPER If this is defined, a simple bi-polar
stepper motor will be included for common
H-bridge chips like the L293D or SN754410N
#ifdef CFG_BRD_LPC1343_OLIMEX_P
// #define CFG_I2CEEPROM
#define CFG_I2CEEPROM_SIZE (3072)
- #endif
+ #endif
#ifdef CFG_BRD_LPC1343_LPCXPRESSO
// #define CFG_I2CEEPROM
===============================
0 1 2 3 4 5 6 7 8 9 A B C D E F
000x x x x x x x x x . x x . . . . . Chibi
- 001x . . . . . . . . . . . . . . . .
+ 001x . . . . . . . . . . . . . . . .
002x x x x x . . . . . . . . . . . . UART
003x x x x x x x x x x x x x x x x x Touch Screen Calibration
004x x x x x x x x x x x x x x x . . Touch Screen Calibration
#define CFG_CHIBI_PROMISCUOUS (0)
#define CFG_CHIBI_BUFFERSIZE (1024)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
// #define CFG_CHIBI
#define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
#define CFG_CHIBI_PANID (0x1234)
#define CFG_CHIBI_PROMISCUOUS (0)
#define CFG_CHIBI_BUFFERSIZE (128)
- #endif
+ #endif
#ifdef CFG_BRD_LPC1343_LPCXPRESSO
// #define CFG_CHIBI
CFG_TFTLCD If defined, this will cause drivers for
a pre-determined LCD screen to be included
- during build. Only one LCD driver can be
+ during build. Only one LCD driver can be
included during the build process (for ex.
'drivers/displays/hw/ILI9325.c')
CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
This should only be enabled if these small
fonts are required since there is already
support for larger fonts generated with
- Dot Factory
+ Dot Factory
http://www.pavius.net/downloads/tools/53-the-dot-factory
CFG_TFTLCD_USEAAFONTS If set to a non-zero value, anti-aliased
fonts will be used instead of regular 1-bit
#define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
#define CFG_TFTLCD_TS_KEYPADDELAY (100)
#endif
-
+
#ifdef CFG_BRD_LPC1343_OLIMEX_P
// #define CFG_TFTLCD
#define CFG_TFTLCD_INCLUDESMALLFONTS (0)
#define CFG_TFTLCD_USEAAFONTS (0)
#define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
#define CFG_TFTLCD_TS_KEYPADDELAY (100)
- #endif
+ #endif
#ifdef CFG_BRD_LPC1343_LPCXPRESSO
// #define CFG_TFTLCD
with 64-bit providing higher security, and
32-bit providing smaller encrypted text
size.
-
+
NOTE: Please note that Printf can not be
used to display 64-bit values (%lld)!
-----------------------------------------------------------------------*/
/*=========================================================================
CONFIG FILE VALIDATION
-------------------------------------------------------------------------
- Basic error checking to make sure that incompatible defines are not
+ Basic error checking to make sure that incompatible defines are not
enabled at the same time, etc.
=========================================================================*/