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[kernel/2.6.38] fix gcc-4.6 set but unused warnings
[openwrt.git] / target / linux / brcm63xx / patches-3.3 / 009-MIPS-BCM63XX-add-stub-to-register-the-SPI-platform-d.patch
1 From af84327888c7081662a6b949754fc54d32a50503 Mon Sep 17 00:00:00 2001
2 From: Florian Fainelli <florian@openwrt.org>
3 Date: Wed, 25 Jan 2012 17:40:04 +0100
4 Subject: [PATCH 11/63] MIPS: BCM63XX: add stub to register the SPI platform driver
5
6 This patch adds the necessary stub to register the SPI platform driver.
7 Since the registers are shuffled between the 4 BCM63xx CPUs supported by
8 this SPI driver we also need to generate the internal register layout and
9 export this layout for the driver to use it properly.
10
11 Signed-off-by: Florian Fainelli <florian@openwrt.org>
12 ---
13 arch/mips/bcm63xx/Makefile | 3 +-
14 arch/mips/bcm63xx/dev-spi.c | 119 ++++++++++++++++++++
15 .../include/asm/mach-bcm63xx/bcm63xx_dev_spi.h | 89 +++++++++++++++
16 3 files changed, 210 insertions(+), 1 deletions(-)
17 create mode 100644 arch/mips/bcm63xx/dev-spi.c
18 create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
19
20 --- a/arch/mips/bcm63xx/Makefile
21 +++ b/arch/mips/bcm63xx/Makefile
22 @@ -1,5 +1,6 @@
23 obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
24 - dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o
25 + dev-dsp.o dev-enet.o dev-pcmcia.o dev-spi.o dev-uart.o \
26 + dev-wdt.o
27 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
28
29 obj-y += boards/
30 --- /dev/null
31 +++ b/arch/mips/bcm63xx/dev-spi.c
32 @@ -0,0 +1,119 @@
33 +/*
34 + * This file is subject to the terms and conditions of the GNU General Public
35 + * License. See the file "COPYING" in the main directory of this archive
36 + * for more details.
37 + *
38 + * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
39 + * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
40 + */
41 +
42 +#include <linux/init.h>
43 +#include <linux/kernel.h>
44 +#include <linux/export.h>
45 +#include <linux/platform_device.h>
46 +#include <linux/err.h>
47 +#include <linux/clk.h>
48 +
49 +#include <bcm63xx_cpu.h>
50 +#include <bcm63xx_dev_spi.h>
51 +#include <bcm63xx_regs.h>
52 +
53 +#ifdef BCMCPU_RUNTIME_DETECT
54 +/*
55 + * register offsets
56 + */
57 +static const unsigned long bcm6338_regs_spi[] = {
58 + __GEN_SPI_REGS_TABLE(6338)
59 +};
60 +
61 +static const unsigned long bcm6348_regs_spi[] = {
62 + __GEN_SPI_REGS_TABLE(6348)
63 +};
64 +
65 +static const unsigned long bcm6358_regs_spi[] = {
66 + __GEN_SPI_REGS_TABLE(6358)
67 +};
68 +
69 +static const unsigned long bcm6368_regs_spi[] = {
70 + __GEN_SPI_REGS_TABLE(6368)
71 +};
72 +
73 +const unsigned long *bcm63xx_regs_spi;
74 +EXPORT_SYMBOL(bcm63xx_regs_spi);
75 +
76 +static __init void bcm63xx_spi_regs_init(void)
77 +{
78 + if (BCMCPU_IS_6338())
79 + bcm63xx_regs_spi = bcm6338_regs_spi;
80 + if (BCMCPU_IS_6348())
81 + bcm63xx_regs_spi = bcm6348_regs_spi;
82 + if (BCMCPU_IS_6358())
83 + bcm63xx_regs_spi = bcm6358_regs_spi;
84 + if (BCMCPU_IS_6368())
85 + bcm63xx_regs_spi = bcm6368_regs_spi;
86 +}
87 +#else
88 +static __init void bcm63xx_spi_regs_init(void) { }
89 +#endif
90 +
91 +static struct resource spi_resources[] = {
92 + {
93 + .start = -1, /* filled at runtime */
94 + .end = -1, /* filled at runtime */
95 + .flags = IORESOURCE_MEM,
96 + },
97 + {
98 + .start = -1, /* filled at runtime */
99 + .flags = IORESOURCE_IRQ,
100 + },
101 +};
102 +
103 +static struct bcm63xx_spi_pdata spi_pdata = {
104 + .bus_num = 0,
105 + .num_chipselect = 8,
106 +};
107 +
108 +static struct platform_device bcm63xx_spi_device = {
109 + .name = "bcm63xx-spi",
110 + .id = -1,
111 + .num_resources = ARRAY_SIZE(spi_resources),
112 + .resource = spi_resources,
113 + .dev = {
114 + .platform_data = &spi_pdata,
115 + },
116 +};
117 +
118 +int __init bcm63xx_spi_register(void)
119 +{
120 + struct clk *periph_clk;
121 +
122 + if (BCMCPU_IS_6345())
123 + return -ENODEV;
124 +
125 + periph_clk = clk_get(NULL, "periph");
126 + if (IS_ERR(periph_clk)) {
127 + pr_err("unable to get periph clock\n");
128 + return -ENODEV;
129 + }
130 +
131 + /* Set bus frequency */
132 + spi_pdata.speed_hz = clk_get_rate(periph_clk);
133 +
134 + spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
135 + spi_resources[0].end = spi_resources[0].start;
136 + spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
137 +
138 + if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
139 + spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
140 + spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
141 + }
142 +
143 + if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
144 + spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
145 + spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
146 + }
147 +
148 + bcm63xx_spi_regs_init();
149 +
150 + return platform_device_register(&bcm63xx_spi_device);
151 +}
152 --- /dev/null
153 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
154 @@ -0,0 +1,89 @@
155 +#ifndef BCM63XX_DEV_SPI_H
156 +#define BCM63XX_DEV_SPI_H
157 +
158 +#include <linux/types.h>
159 +#include <bcm63xx_io.h>
160 +#include <bcm63xx_regs.h>
161 +
162 +int __init bcm63xx_spi_register(void);
163 +
164 +struct bcm63xx_spi_pdata {
165 + unsigned int fifo_size;
166 + int bus_num;
167 + int num_chipselect;
168 + u32 speed_hz;
169 +};
170 +
171 +enum bcm63xx_regs_spi {
172 + SPI_CMD,
173 + SPI_INT_STATUS,
174 + SPI_INT_MASK_ST,
175 + SPI_INT_MASK,
176 + SPI_ST,
177 + SPI_CLK_CFG,
178 + SPI_FILL_BYTE,
179 + SPI_MSG_TAIL,
180 + SPI_RX_TAIL,
181 + SPI_MSG_CTL,
182 + SPI_MSG_DATA,
183 + SPI_RX_DATA,
184 +};
185 +
186 +#define __GEN_SPI_RSET_BASE(__cpu, __rset) \
187 + case SPI_## __rset: \
188 + return SPI_## __cpu ##_## __rset;
189 +
190 +#define __GEN_SPI_RSET(__cpu) \
191 + switch (reg) { \
192 + __GEN_SPI_RSET_BASE(__cpu, CMD) \
193 + __GEN_SPI_RSET_BASE(__cpu, INT_STATUS) \
194 + __GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST) \
195 + __GEN_SPI_RSET_BASE(__cpu, INT_MASK) \
196 + __GEN_SPI_RSET_BASE(__cpu, ST) \
197 + __GEN_SPI_RSET_BASE(__cpu, CLK_CFG) \
198 + __GEN_SPI_RSET_BASE(__cpu, FILL_BYTE) \
199 + __GEN_SPI_RSET_BASE(__cpu, MSG_TAIL) \
200 + __GEN_SPI_RSET_BASE(__cpu, RX_TAIL) \
201 + __GEN_SPI_RSET_BASE(__cpu, MSG_CTL) \
202 + __GEN_SPI_RSET_BASE(__cpu, MSG_DATA) \
203 + __GEN_SPI_RSET_BASE(__cpu, RX_DATA) \
204 + }
205 +
206 +#define __GEN_SPI_REGS_TABLE(__cpu) \
207 + [SPI_CMD] = SPI_## __cpu ##_CMD, \
208 + [SPI_INT_STATUS] = SPI_## __cpu ##_INT_STATUS, \
209 + [SPI_INT_MASK_ST] = SPI_## __cpu ##_INT_MASK_ST, \
210 + [SPI_INT_MASK] = SPI_## __cpu ##_INT_MASK, \
211 + [SPI_ST] = SPI_## __cpu ##_ST, \
212 + [SPI_CLK_CFG] = SPI_## __cpu ##_CLK_CFG, \
213 + [SPI_FILL_BYTE] = SPI_## __cpu ##_FILL_BYTE, \
214 + [SPI_MSG_TAIL] = SPI_## __cpu ##_MSG_TAIL, \
215 + [SPI_RX_TAIL] = SPI_## __cpu ##_RX_TAIL, \
216 + [SPI_MSG_CTL] = SPI_## __cpu ##_MSG_CTL, \
217 + [SPI_MSG_DATA] = SPI_## __cpu ##_MSG_DATA, \
218 + [SPI_RX_DATA] = SPI_## __cpu ##_RX_DATA,
219 +
220 +static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
221 +{
222 +#ifdef BCMCPU_RUNTIME_DETECT
223 + extern const unsigned long *bcm63xx_regs_spi;
224 +
225 + return bcm63xx_regs_spi[reg];
226 +#else
227 +#ifdef CONFIG_BCM63XX_CPU_6338
228 + __GEN_SPI_RSET(6338)
229 +#endif
230 +#ifdef CONFIG_BCM63XX_CPU_6348
231 + __GEN_SPI_RSET(6348)
232 +#endif
233 +#ifdef CONFIG_BCM63XX_CPU_6358
234 + __GEN_SPI_RSET(6358)
235 +#endif
236 +#ifdef CONFIG_BCM63XX_CPU_6368
237 + __GEN_SPI_RSET(6368)
238 +#endif
239 +#endif
240 + return 0;
241 +}
242 +
243 +#endif /* BCM63XX_DEV_SPI_H */
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