target/linux/pxa/patches-2.6.21/002-header.patch

   1 Index: linux-2.6.21.7/include/asm-arm/arch-pxa/gumstix.h
   2 ===================================================================
   3 --- /dev/null
   4 +++ linux-2.6.21.7/include/asm-arm/arch-pxa/gumstix.h
   5 @@ -0,0 +1,165 @@
   6 +/*
   7 + *  linux/include/asm-arm/arch-pxa/gumstix.h
   8 + *
   9 + * This program is free software; you can redistribute it and/or modify
  10 + * it under the terms of the GNU General Public License version 2 as
  11 + * published by the Free Software Foundation.
  12 + */
  13 +
  14 +
  15 +/* BTRESET - Reset line to Bluetooth module, active low signal. */
  16 +#define GPIO_GUMSTIX_BTRESET          7
  17 +#define GPIO_GUMSTIX_BTRESET_MD                (GPIO_GUMSTIX_BTRESET | GPIO_OUT)
  18 +
  19 +
  20 +/* GPIOn - Input from MAX823 (or equiv), normalizing USB +5V
  21 +     into a clean interrupt signal for determining cable presence
  22 +     On the original gumstix, this is GPIO81, and GPIO83 needs to be defined as well.
  23 +     On the gumstix F, this moves to GPIO17 and GPIO37 */
  24 +/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
  25 +     has detected a cable insertion; driven low otherwise. */
  26 +
  27 +#ifdef CONFIG_ARCH_GUMSTIX_ORIG
  28 +
  29 +#define GPIO_GUMSTIX_USB_GPIOn         81
  30 +#define GPIO_GUMSTIX_USB_GPIOx         83
  31 +
  32 +#else
  33 +
  34 +#define GPIO_GUMSTIX_USB_GPIOn         35
  35 +#define GPIO_GUMSTIX_USB_GPIOx         41
  36 +
  37 +#endif
  38 +
  39 +#define GUMSTIX_USB_INTR_IRQ           IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn)    /* usb state change */
  40 +#define GPIO_GUMSTIX_USB_GPIOn_MD      (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
  41 +#define GPIO_GUMSTIX_USB_GPIOx_CON_MD  (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
  42 +#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD  (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN)
  43 +
  44 +
  45 +/*
  46 + * SMC Ethernet definitions
  47 + * ETH_RST provides a hardware reset line to the ethernet chip
  48 + * ETH is the IRQ line in from the ethernet chip to the PXA
  49 + */
  50 +#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
  51 +#define GPIO_GUMSTIX_ETH0_RST          80
  52 +#define GPIO_GUMSTIX_ETH0              36
  53 +#else
  54 +#define GPIO_GUMSTIX_ETH0_RST          32
  55 +#define GPIO_GUMSTIX_ETH0              99
  56 +#endif
  57 +#define GPIO_GUMSTIX_ETH1_RST          52
  58 +#define GPIO_GUMSTIX_ETH1              27
  59 +
  60 +#define GPIO_GUMSTIX_ETH0_RST_MD       (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
  61 +#define GPIO_GUMSTIX_ETH1_RST_MD       (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
  62 +#define GPIO_GUMSTIX_ETH0_MD           (GPIO_GUMSTIX_ETH0 | GPIO_IN)
  63 +#define GPIO_GUMSTIX_ETH1_MD           (GPIO_GUMSTIX_ETH1 | GPIO_IN)
  64 +
  65 +#define GUMSTIX_ETH0_IRQ               IRQ_GPIO(GPIO_GUMSTIX_ETH0)
  66 +#define GUMSTIX_ETH1_IRQ               IRQ_GPIO(GPIO_GUMSTIX_ETH1)
  67 +
  68 +
  69 +/* CF reset line */
  70 +#define GPIO8_CF_RESET                 8
  71 +#define GPIO97_CF_RESET                        97
  72 +#define GPIO110_CF_RESET               110
  73 +#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
  74 +#define GPIO_GUMSTIX_CF_RESET          GPIO8_CF_RESET
  75 +#else
  76 +#define GPIO_GUMSTIX_CF_RESET          GPIO97_CF_RESET
  77 +#endif
  78 +#define GPIO_GUMSTIX_CF_OLD_RESET      GPIO110_CF_RESET
  79 +
  80 +
  81 +/* CF signals shared by both sockets */
  82 +#define GPIO_GUMSTIX_nPOE GPIO48_nPOE
  83 +#define GPIO_GUMSTIX_nPWE GPIO49_nPWE
  84 +#define GPIO_GUMSTIX_nPIOR GPIO50_nPIOR
  85 +#define GPIO_GUMSTIX_nPIOW GPIO51_nPIOW
  86 +#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
  87 +#define GPIO_GUMSTIX_nPCE_1 GPIO52_nPCE_1
  88 +#define GPIO_GUMSTIX_nPCE_2 GPIO53_nPCE_2
  89 +#define GPIO_GUMSTIX_pSKTSEL GPIO54_pSKTSEL
  90 +#else
  91 +#define GPIO_GUMSTIX_nPCE_1 GPIO102_nPCE_1
  92 +#define GPIO_GUMSTIX_nPCE_2 GPIO105_nPCE_2
  93 +#define GPIO_GUMSTIX_pSKTSEL GPIO79_pSKTSEL
  94 +#endif
  95 +#define GPIO_GUMSTIX_nPREG GPIO55_nPREG
  96 +#define GPIO_GUMSTIX_nPWAIT GPIO56_nPWAIT
  97 +#define GPIO_GUMSTIX_nIOIS16 GPIO57_nIOIS16
  98 +
  99 +#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE_MD
 100 +#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE_MD
 101 +#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR_MD
 102 +#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW_MD
 103 +#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
 104 +#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1_MD
 105 +#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2_MD
 106 +#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL_MD
 107 +#else
 108 +#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1_MD
 109 +#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2_MD
 110 +#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL_MD
 111 +#endif
 112 +#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG_MD
 113 +#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT_MD
 114 +#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16_MD
 115 +
 116 +/* CF slot 0 */
 117 +#define GPIO4_nBVD1_0                  4
 118 +#define GPIO4_nSTSCHG_0                        GPIO4_nBVD1_0
 119 +#define GPIO11_nCD_0                   11
 120 +#define GPIO26_PRDY_nBSY_0             26
 121 +
 122 +#define GPIO111_nBVD1_0                        111
 123 +#define GPIO111_nSTSCHG_0              GPIO111_nBVD1_0
 124 +#define GPIO104_nCD_0                  104
 125 +#define GPIO96_PRDY_nBSY_0             96
 126 +#define GPIO109_PRDY_nBSY_0            109
 127 +
 128 +#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
 129 +#define GPIO_GUMSTIX_nBVD1_0           GPIO4_nBVD1_0
 130 +#define GPIO_GUMSTIX_nSTSCHG_0         GPIO4_nSTSCHG_0
 131 +#define GPIO_GUMSTIX_nCD_0             GPIO11_nCD_0
 132 +#define GPIO_GUMSTIX_PRDY_nBSY_0       GPIO26_PRDY_nBSY_0
 133 +#else
 134 +#define GPIO_GUMSTIX_nBVD1_0           GPIO111_nBVD1_0
 135 +#define GPIO_GUMSTIX_nSTSCHG_0         GPIO111_nSTSCHG_0
 136 +#define GPIO_GUMSTIX_nCD_0             GPIO104_nCD_0
 137 +#define GPIO_GUMSTIX_PRDY_nBSY_0       GPIO96_PRDY_nBSY_0
 138 +#endif
 139 +#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD   GPIO109_PRDY_nBSY_0
 140 +
 141 +#define GUMSTIX_S0_nSTSCHG_IRQ         IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
 142 +#define GUMSTIX_S0_nCD_IRQ             IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
 143 +#define GUMSTIX_S0_PRDY_nBSY_IRQ       IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
 144 +#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ   IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
 145 +
 146 +/* CF slot 1 */
 147 +#define GPIO18_nBVD1_1                 18
 148 +#define GPIO18_nSTSCHG_1               GPIO18_nBVD1_1
 149 +#define GPIO36_nCD_1                   36
 150 +#define GPIO27_PRDY_nBSY_1             27
 151 +
 152 +#define GPIO_GUMSTIX_nBVD1_1           GPIO18_nBVD1_1
 153 +#define GPIO_GUMSTIX_nSTSCHG_1         GPIO18_nSTSCHG_1
 154 +#define GPIO_GUMSTIX_nCD_1             GPIO36_nCD_1
 155 +#define GPIO_GUMSTIX_PRDY_nBSY_1       GPIO27_PRDY_nBSY_1
 156 +
 157 +#define GUMSTIX_S1_nSTSCHG_IRQ         IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
 158 +#define GUMSTIX_S1_nCD_IRQ             IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
 159 +#define GUMSTIX_S1_PRDY_nBSY_IRQ       IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
 160 +
 161 +/* CF GPIO line modes */
 162 +#define GPIO_GUMSTIX_CF_RESET_MD       ( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
 163 +#define GPIO_GUMSTIX_CF_OLD_RESET_MD   ( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
 164 +#define GPIO_GUMSTIX_nSTSCHG_0_MD      ( GPIO_GUMSTIX_nSTSCHG_0 | GPIO_IN )
 165 +#define GPIO_GUMSTIX_nCD_0_MD          ( GPIO_GUMSTIX_nCD_0 | GPIO_IN )
 166 +#define GPIO_GUMSTIX_PRDY_nBSY_0_MD    ( GPIO_GUMSTIX_PRDY_nBSY_0 | GPIO_IN )
 167 +#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD        ( GPIO_GUMSTIX_PRDY_nBSY_0_OLD | GPIO_IN )
 168 +#define GPIO_GUMSTIX_nSTSCHG_1_MD      ( GPIO_GUMSTIX_nSTSCHG_1 | GPIO_IN )
 169 +#define GPIO_GUMSTIX_nCD_1_MD          ( GPIO_GUMSTIX_nCD_1 | GPIO_IN )
 170 +#define GPIO_GUMSTIX_PRDY_nBSY_1_MD    ( GPIO_GUMSTIX_PRDY_nBSY_1 | GPIO_IN )