target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h

   1 /*
   2  *  Atheros AR71xx SoC specific platform data definitions
   3  *
   4  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #ifndef __ASM_MACH_AR71XX_PLATFORM_H
  13 #define __ASM_MACH_AR71XX_PLATFORM_H
  14
  15 #include <linux/if_ether.h>
  16 #include <linux/skbuff.h>
  17 #include <linux/phy.h>
  18 #include <linux/spi/spi.h>
  19
  20 struct ag71xx_switch_platform_data {
  21         u8              phy4_mii_en:1;
  22 };
  23
  24 struct ag71xx_platform_data {
  25         phy_interface_t phy_if_mode;
  26         u32             phy_mask;
  27         int             speed;
  28         int             duplex;
  29         u32             reset_bit;
  30         u8              mac_addr[ETH_ALEN];
  31         struct device   *mii_bus_dev;
  32
  33         u8              has_gbit:1;
  34         u8              is_ar91xx:1;
  35         u8              is_ar7240:1;
  36         u8              is_ar724x:1;
  37         u8              has_ar8216:1;
  38
  39         struct ag71xx_switch_platform_data *switch_data;
  40
  41         void            (*ddr_flush)(void);
  42         void            (*set_speed)(int speed);
  43
  44         u32             fifo_cfg1;
  45         u32             fifo_cfg2;
  46         u32             fifo_cfg3;
  47 };
  48
  49 struct ag71xx_mdio_platform_data {
  50         u32             phy_mask;
  51         int             is_ar7240;
  52 };
  53
  54 struct ar71xx_ehci_platform_data {
  55         u8              is_ar91xx;
  56 };
  57
  58 struct ar71xx_spi_platform_data {
  59         unsigned        bus_num;
  60         unsigned        num_chipselect;
  61         u32             (*get_ioc_base)(u8 chip_select, int cs_high, int is_on);
  62 };
  63
  64 #define AR71XX_SPI_CS_INACTIVE  0
  65 #define AR71XX_SPI_CS_ACTIVE    1
  66
  67 #endif /* __ASM_MACH_AR71XX_PLATFORM_H */