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add missing fix for etrax compile without axis toolchain
[openwrt.git] / target / linux / etrax / patches / 301-usb_support.patch
1 diff -x .org -x .orig -x '.c*' -x '.h*' -x .git -x .git -urN clean-2.6.25-rc8/drivers/usb/Makefile source-2.6.25-rc8/drivers/usb/Makefile
2 --- clean-2.6.25-rc8/drivers/usb/Makefile 2008-04-07 10:26:24.000000000 +0200
3 +++ source-2.6.25-rc8/drivers/usb/Makefile 2008-04-07 10:29:40.000000000 +0200
4 @@ -16,6 +16,7 @@
5 obj-$(CONFIG_USB_SL811_HCD) += host/
6 obj-$(CONFIG_USB_U132_HCD) += host/
7 obj-$(CONFIG_USB_R8A66597_HCD) += host/
8 +obj-$(CONFIG_ETRAX_USB_HOST) += host/
9
10 obj-$(CONFIG_USB_ACM) += class/
11 obj-$(CONFIG_USB_PRINTER) += class/
12 diff -x .org -x .orig -x '.c*' -x '.h*' -x .git -x .git -urN clean-2.6.25-rc8/drivers/usb/host/Makefile source-2.6.25-rc8/drivers/usb/host/Makefile
13 --- clean-2.6.25-rc8/drivers/usb/host/Makefile 2008-04-07 10:26:24.000000000 +0200
14 +++ source-2.6.25-rc8/drivers/usb/host/Makefile 2008-04-07 10:29:40.000000000 +0200
15 @@ -17,3 +17,5 @@
16 obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o
17 obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
18
19 +#obj-$(CONFIG_USB_CARNEOL) += hc-crisv10.o
20 +obj-$(CONFIG_ETRAX_USB_HOST) += hc-crisv10.o
21 diff -x .org -x .orig -x '.c*' -x '.h*' -x .git -x .git -urN clean-2.6.25-rc8/drivers/usb/host/hc-cris-dbg.h source-2.6.25-rc8/drivers/usb/host/hc-cris-dbg.h
22 --- clean-2.6.25-rc8/drivers/usb/host/hc-cris-dbg.h 1970-01-01 01:00:00.000000000 +0100
23 +++ source-2.6.25-rc8/drivers/usb/host/hc-cris-dbg.h 2008-04-07 10:29:40.000000000 +0200
24 @@ -0,0 +1,143 @@
25 +
26 +/* macros for debug output */
27 +
28 +#define hcd_dbg(hcd, fmt, args...) \
29 + dev_info(hcd->self.controller, fmt, ## args)
30 +#define hcd_err(hcd, fmt, args...) \
31 + dev_err(hcd->self.controller, fmt, ## args)
32 +#define hcd_info(hcd, fmt, args...) \
33 + dev_info(hcd->self.controller, fmt, ## args)
34 +#define hcd_warn(hcd, fmt, args...) \
35 + dev_warn(hcd->self.controller, fmt, ## args)
36 +
37 +/*
38 +#define devdrv_dbg(fmt, args...) \
39 + printk(KERN_INFO "usb_devdrv dbg: ");printk(fmt, ## args)
40 +*/
41 +#define devdrv_dbg(fmt, args...) {}
42 +
43 +#define devdrv_err(fmt, args...) \
44 + printk(KERN_ERR "usb_devdrv error: ");printk(fmt, ## args)
45 +#define devdrv_info(fmt, args...) \
46 + printk(KERN_INFO "usb_devdrv: ");printk(fmt, ## args)
47 +
48 +#define irq_dbg(fmt, args...) \
49 + printk(KERN_INFO "crisv10_irq dbg: ");printk(fmt, ## args)
50 +#define irq_err(fmt, args...) \
51 + printk(KERN_ERR "crisv10_irq error: ");printk(fmt, ## args)
52 +#define irq_warn(fmt, args...) \
53 + printk(KERN_INFO "crisv10_irq warn: ");printk(fmt, ## args)
54 +#define irq_info(fmt, args...) \
55 + printk(KERN_INFO "crisv10_hcd: ");printk(fmt, ## args)
56 +
57 +/*
58 +#define rh_dbg(fmt, args...) \
59 + printk(KERN_DEBUG "crisv10_rh dbg: ");printk(fmt, ## args)
60 +*/
61 +#define rh_dbg(fmt, args...) {}
62 +
63 +#define rh_err(fmt, args...) \
64 + printk(KERN_ERR "crisv10_rh error: ");printk(fmt, ## args)
65 +#define rh_warn(fmt, args...) \
66 + printk(KERN_INFO "crisv10_rh warning: ");printk(fmt, ## args)
67 +#define rh_info(fmt, args...) \
68 + printk(KERN_INFO "crisv10_rh: ");printk(fmt, ## args)
69 +
70 +/*
71 +#define tc_dbg(fmt, args...) \
72 + printk(KERN_INFO "crisv10_tc dbg: ");printk(fmt, ## args)
73 +*/
74 +#define tc_dbg(fmt, args...) {while(0){}}
75 +
76 +#define tc_err(fmt, args...) \
77 + printk(KERN_ERR "crisv10_tc error: ");printk(fmt, ## args)
78 +/*
79 +#define tc_warn(fmt, args...) \
80 + printk(KERN_INFO "crisv10_tc warning: ");printk(fmt, ## args)
81 +*/
82 +#define tc_warn(fmt, args...) {while(0){}}
83 +
84 +#define tc_info(fmt, args...) \
85 + printk(KERN_INFO "crisv10_tc: ");printk(fmt, ## args)
86 +
87 +
88 +/* Debug print-outs for various traffic types */
89 +
90 +#define intr_warn(fmt, args...) \
91 + printk(KERN_INFO "crisv10_intr warning: ");printk(fmt, ## args)
92 +
93 +#define intr_dbg(fmt, args...) \
94 + printk(KERN_DEBUG "crisv10_intr dbg: ");printk(fmt, ## args)
95 +/*
96 +#define intr_dbg(fmt, args...) {while(0){}}
97 +*/
98 +
99 +
100 +#define isoc_err(fmt, args...) \
101 + printk(KERN_ERR "crisv10_isoc error: ");printk(fmt, ## args)
102 +/*
103 +#define isoc_warn(fmt, args...) \
104 + printk(KERN_INFO "crisv10_isoc warning: ");printk(fmt, ## args)
105 +*/
106 +#define isoc_warn(fmt, args...) {while(0){}}
107 +
108 +/*
109 +#define isoc_dbg(fmt, args...) \
110 + printk(KERN_INFO "crisv10_isoc dbg: ");printk(fmt, ## args)
111 +*/
112 +#define isoc_dbg(fmt, args...) {while(0){}}
113 +
114 +/*
115 +#define timer_warn(fmt, args...) \
116 + printk(KERN_INFO "crisv10_timer warning: ");printk(fmt, ## args)
117 +*/
118 +#define timer_warn(fmt, args...) {while(0){}}
119 +
120 +/*
121 +#define timer_dbg(fmt, args...) \
122 + printk(KERN_INFO "crisv10_timer dbg: ");printk(fmt, ## args)
123 +*/
124 +#define timer_dbg(fmt, args...) {while(0){}}
125 +
126 +
127 +/* Debug printouts for events related to late finishing of URBs */
128 +
129 +#define late_dbg(fmt, args...) \
130 + printk(KERN_INFO "crisv10_late dbg: ");printk(fmt, ## args)
131 +/*
132 +#define late_dbg(fmt, args...) {while(0){}}
133 +*/
134 +
135 +#define late_warn(fmt, args...) \
136 + printk(KERN_INFO "crisv10_late warning: ");printk(fmt, ## args)
137 +/*
138 +#define errno_dbg(fmt, args...) \
139 + printk(KERN_INFO "crisv10_errno dbg: ");printk(fmt, ## args)
140 +*/
141 +#define errno_dbg(fmt, args...) {while(0){}}
142 +
143 +
144 +#define dma_dbg(fmt, args...) \
145 + printk(KERN_INFO "crisv10_dma dbg: ");printk(fmt, ## args)
146 +#define dma_err(fmt, args...) \
147 + printk(KERN_ERR "crisv10_dma error: ");printk(fmt, ## args)
148 +#define dma_warn(fmt, args...) \
149 + printk(KERN_INFO "crisv10_dma warning: ");printk(fmt, ## args)
150 +#define dma_info(fmt, args...) \
151 + printk(KERN_INFO "crisv10_dma: ");printk(fmt, ## args)
152 +
153 +
154 +
155 +#define str_dir(pipe) \
156 + (usb_pipeout(pipe) ? "out" : "in")
157 +#define str_type(pipe) \
158 + ({ \
159 + char *s = "?"; \
160 + switch (usb_pipetype(pipe)) { \
161 + case PIPE_ISOCHRONOUS: s = "iso"; break; \
162 + case PIPE_INTERRUPT: s = "intr"; break; \
163 + case PIPE_CONTROL: s = "ctrl"; break; \
164 + case PIPE_BULK: s = "bulk"; break; \
165 + }; \
166 + s; \
167 + })
168 diff -x .org -x .orig -x '.c*' -x '.h*' -x .git -x .git -urN clean-2.6.25-rc8/drivers/usb/host/hc-crisv10.c source-2.6.25-rc8/drivers/usb/host/hc-crisv10.c
169 --- clean-2.6.25-rc8/drivers/usb/host/hc-crisv10.c 1970-01-01 01:00:00.000000000 +0100
170 +++ source-2.6.25-rc8/drivers/usb/host/hc-crisv10.c 2008-04-07 10:29:40.000000000 +0200
171 @@ -0,0 +1,4800 @@
172 +/*
173 + *
174 + * ETRAX 100LX USB Host Controller Driver
175 + *
176 + * Copyright (C) 2005, 2006 Axis Communications AB
177 + *
178 + * Author: Konrad Eriksson <konrad.eriksson@axis.se>
179 + *
180 + */
181 +
182 +#include <linux/module.h>
183 +#include <linux/kernel.h>
184 +#include <linux/init.h>
185 +#include <linux/moduleparam.h>
186 +#include <linux/spinlock.h>
187 +#include <linux/usb.h>
188 +#include <linux/platform_device.h>
189 +
190 +#include <asm/io.h>
191 +#include <asm/irq.h>
192 +#include <asm/arch/dma.h>
193 +#include <asm/arch/io_interface_mux.h>
194 +
195 +#include "../core/hcd.h"
196 +#include "../core/hub.h"
197 +#include "hc-crisv10.h"
198 +#include "hc-cris-dbg.h"
199 +
200 +
201 +/***************************************************************************/
202 +/***************************************************************************/
203 +/* Host Controller settings */
204 +/***************************************************************************/
205 +/***************************************************************************/
206 +
207 +#define VERSION "1.00 hinko.4"
208 +#define COPYRIGHT "(c) 2005, 2006 Axis Communications AB"
209 +#define DESCRIPTION "ETRAX 100LX USB Host Controller (2.6.25-rc9 port)"
210 +
211 +#define ETRAX_USB_HC_IRQ USB_HC_IRQ_NBR
212 +#define ETRAX_USB_RX_IRQ USB_DMA_RX_IRQ_NBR
213 +#define ETRAX_USB_TX_IRQ USB_DMA_TX_IRQ_NBR
214 +
215 +/* Number of physical ports in Etrax 100LX */
216 +#define USB_ROOT_HUB_PORTS 2
217 +
218 +const char hc_name[] = "hc-crisv10";
219 +const char product_desc[] = DESCRIPTION;
220 +
221 +/* The number of epids is, among other things, used for pre-allocating
222 + ctrl, bulk and isoc EP descriptors (one for each epid).
223 + Assumed to be > 1 when initiating the DMA lists. */
224 +#define NBR_OF_EPIDS 32
225 +
226 +/* Support interrupt traffic intervals up to 128 ms. */
227 +#define MAX_INTR_INTERVAL 128
228 +
229 +/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP
230 + table must be "invalid". By this we mean that we shouldn't care about epid
231 + attentions for this epid, or at least handle them differently from epid
232 + attentions for "valid" epids. This define determines which one to use
233 + (don't change it). */
234 +#define INVALID_EPID 31
235 +/* A special epid for the bulk dummys. */
236 +#define DUMMY_EPID 30
237 +
238 +/* Module settings */
239 +
240 +MODULE_DESCRIPTION(DESCRIPTION);
241 +MODULE_LICENSE("GPL");
242 +MODULE_AUTHOR("Konrad Eriksson <konrad.eriksson@axis.se>");
243 +
244 +
245 +/* Module parameters */
246 +
247 +/* 0 = No ports enabled
248 + 1 = Only port 1 enabled (on board ethernet on devboard)
249 + 2 = Only port 2 enabled (external connector on devboard)
250 + 3 = Both ports enabled
251 +*/
252 +static unsigned int ports = 3;
253 +module_param(ports, uint, S_IRUGO);
254 +MODULE_PARM_DESC(ports, "Bitmask indicating USB ports to use");
255 +
256 +
257 +/***************************************************************************/
258 +/***************************************************************************/
259 +/* Shared global variables for this module */
260 +/***************************************************************************/
261 +/***************************************************************************/
262 +
263 +/* EP descriptor lists for non period transfers. Must be 32-bit aligned. */
264 +static volatile struct USB_EP_Desc TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
265 +
266 +static volatile struct USB_EP_Desc TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
267 +
268 +/* EP descriptor lists for period transfers. Must be 32-bit aligned. */
269 +static volatile struct USB_EP_Desc TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
270 +static volatile struct USB_SB_Desc TxIntrSB_zout __attribute__ ((aligned (4)));
271 +
272 +static volatile struct USB_EP_Desc TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
273 +static volatile struct USB_SB_Desc TxIsocSB_zout __attribute__ ((aligned (4)));
274 +
275 +//static volatile struct USB_SB_Desc TxIsocSBList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
276 +
277 +/* After each enabled bulk EP IN we put two disabled EP descriptors with the eol flag set,
278 + causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
279 + gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
280 + EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
281 + in each frame. */
282 +static volatile struct USB_EP_Desc TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
283 +
284 +/* List of URB pointers, where each points to the active URB for a epid.
285 + For Bulk, Ctrl and Intr this means which URB that currently is added to
286 + DMA lists (Isoc URBs are all directly added to DMA lists). As soon as
287 + URB has completed is the queue examined and the first URB in queue is
288 + removed and moved to the activeUrbList while its state change to STARTED and
289 + its transfer(s) gets added to DMA list (exception Isoc where URBs enter
290 + state STARTED directly and added transfers added to DMA lists). */
291 +static struct urb *activeUrbList[NBR_OF_EPIDS];
292 +
293 +/* Additional software state info for each epid */
294 +static struct etrax_epid epid_state[NBR_OF_EPIDS];
295 +
296 +/* Timer handles for bulk traffic timer used to avoid DMA bug where DMA stops
297 + even if there is new data waiting to be processed */
298 +static struct timer_list bulk_start_timer = TIMER_INITIALIZER(NULL, 0, 0);
299 +static struct timer_list bulk_eot_timer = TIMER_INITIALIZER(NULL, 0, 0);
300 +
301 +/* We want the start timer to expire before the eot timer, because the former
302 + might start traffic, thus making it unnecessary for the latter to time
303 + out. */
304 +#define BULK_START_TIMER_INTERVAL (HZ/50) /* 20 ms */
305 +#define BULK_EOT_TIMER_INTERVAL (HZ/16) /* 60 ms */
306 +
307 +/* Delay before a URB completion happen when it's scheduled to be delayed */
308 +#define LATER_TIMER_DELAY (HZ/50) /* 20 ms */
309 +
310 +/* Simplifying macros for checking software state info of a epid */
311 +/* ----------------------------------------------------------------------- */
312 +#define epid_inuse(epid) epid_state[epid].inuse
313 +#define epid_out_traffic(epid) epid_state[epid].out_traffic
314 +#define epid_isoc(epid) (epid_state[epid].type == PIPE_ISOCHRONOUS ? 1 : 0)
315 +#define epid_intr(epid) (epid_state[epid].type == PIPE_INTERRUPT ? 1 : 0)
316 +
317 +
318 +/***************************************************************************/
319 +/***************************************************************************/
320 +/* DEBUG FUNCTIONS */
321 +/***************************************************************************/
322 +/***************************************************************************/
323 +/* Note that these functions are always available in their "__" variants,
324 + for use in error situations. The "__" missing variants are controlled by
325 + the USB_DEBUG_DESC/USB_DEBUG_URB macros. */
326 +static void __dump_urb(struct urb* purb)
327 +{
328 + struct crisv10_urb_priv *urb_priv = purb->hcpriv;
329 + int urb_num = -1;
330 + if(urb_priv) {
331 + urb_num = urb_priv->urb_num;
332 + }
333 + printk("\nURB:0x%x[%d]\n", (unsigned int)purb, urb_num);
334 + printk("dev :0x%08lx\n", (unsigned long)purb->dev);
335 + printk("pipe :0x%08x\n", purb->pipe);
336 + printk("status :%d\n", purb->status);
337 + printk("transfer_flags :0x%08x\n", purb->transfer_flags);
338 + printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
339 + printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
340 + printk("actual_length :%d\n", purb->actual_length);
341 + printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
342 + printk("start_frame :%d\n", purb->start_frame);
343 + printk("number_of_packets :%d\n", purb->number_of_packets);
344 + printk("interval :%d\n", purb->interval);
345 + printk("error_count :%d\n", purb->error_count);
346 + printk("context :0x%08lx\n", (unsigned long)purb->context);
347 + printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
348 +}
349 +
350 +static void __dump_in_desc(volatile struct USB_IN_Desc *in)
351 +{
352 + printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
353 + printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
354 + printk(" command : 0x%04x\n", in->command);
355 + printk(" next : 0x%08lx\n", in->next);
356 + printk(" buf : 0x%08lx\n", in->buf);
357 + printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
358 + printk(" status : 0x%04x\n\n", in->status);
359 +}
360 +
361 +static void __dump_sb_desc(volatile struct USB_SB_Desc *sb)
362 +{
363 + char tt = (sb->command & 0x30) >> 4;
364 + char *tt_string;
365 +
366 + switch (tt) {
367 + case 0:
368 + tt_string = "zout";
369 + break;
370 + case 1:
371 + tt_string = "in";
372 + break;
373 + case 2:
374 + tt_string = "out";
375 + break;
376 + case 3:
377 + tt_string = "setup";
378 + break;
379 + default:
380 + tt_string = "unknown (weird)";
381 + }
382 +
383 + printk(" USB_SB_Desc at 0x%08lx ", (unsigned long)sb);
384 + printk(" command:0x%04x (", sb->command);
385 + printk("rem:%d ", (sb->command & 0x3f00) >> 8);
386 + printk("full:%d ", (sb->command & 0x40) >> 6);
387 + printk("tt:%d(%s) ", tt, tt_string);
388 + printk("intr:%d ", (sb->command & 0x8) >> 3);
389 + printk("eot:%d ", (sb->command & 0x2) >> 1);
390 + printk("eol:%d)", sb->command & 0x1);
391 + printk(" sw_len:0x%04x(%d)", sb->sw_len, sb->sw_len);
392 + printk(" next:0x%08lx", sb->next);
393 + printk(" buf:0x%08lx\n", sb->buf);
394 +}
395 +
396 +
397 +static void __dump_ep_desc(volatile struct USB_EP_Desc *ep)
398 +{
399 + printk("USB_EP_Desc at 0x%08lx ", (unsigned long)ep);
400 + printk(" command:0x%04x (", ep->command);
401 + printk("ep_id:%d ", (ep->command & 0x1f00) >> 8);
402 + printk("enable:%d ", (ep->command & 0x10) >> 4);
403 + printk("intr:%d ", (ep->command & 0x8) >> 3);
404 + printk("eof:%d ", (ep->command & 0x2) >> 1);
405 + printk("eol:%d)", ep->command & 0x1);
406 + printk(" hw_len:0x%04x(%d)", ep->hw_len, ep->hw_len);
407 + printk(" next:0x%08lx", ep->next);
408 + printk(" sub:0x%08lx\n", ep->sub);
409 +}
410 +
411 +static inline void __dump_ep_list(int pipe_type)
412 +{
413 + volatile struct USB_EP_Desc *ep;
414 + volatile struct USB_EP_Desc *first_ep;
415 + volatile struct USB_SB_Desc *sb;
416 +
417 + switch (pipe_type)
418 + {
419 + case PIPE_BULK:
420 + first_ep = &TxBulkEPList[0];
421 + break;
422 + case PIPE_CONTROL:
423 + first_ep = &TxCtrlEPList[0];
424 + break;
425 + case PIPE_INTERRUPT:
426 + first_ep = &TxIntrEPList[0];
427 + break;
428 + case PIPE_ISOCHRONOUS:
429 + first_ep = &TxIsocEPList[0];
430 + break;
431 + default:
432 + warn("Cannot dump unknown traffic type");
433 + return;
434 + }
435 + ep = first_ep;
436 +
437 + printk("\n\nDumping EP list...\n\n");
438 +
439 + do {
440 + __dump_ep_desc(ep);
441 + /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
442 + sb = ep->sub ? phys_to_virt(ep->sub) : 0;
443 + while (sb) {
444 + __dump_sb_desc(sb);
445 + sb = sb->next ? phys_to_virt(sb->next) : 0;
446 + }
447 + ep = (volatile struct USB_EP_Desc *)(phys_to_virt(ep->next));
448 +
449 + } while (ep != first_ep);
450 +}
451 +
452 +static inline void __dump_ept_data(int epid)
453 +{
454 + unsigned long flags;
455 + __u32 r_usb_ept_data;
456 +
457 + if (epid < 0 || epid > 31) {
458 + printk("Cannot dump ept data for invalid epid %d\n", epid);
459 + return;
460 + }
461 +
462 + local_irq_save(flags);
463 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
464 + nop();
465 + r_usb_ept_data = *R_USB_EPT_DATA;
466 + local_irq_restore(flags);
467 +
468 + printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
469 + if (r_usb_ept_data == 0) {
470 + /* No need for more detailed printing. */
471 + return;
472 + }
473 + printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
474 + printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
475 + printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
476 + printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
477 + printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
478 + printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
479 + printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
480 + printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
481 + printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
482 + printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
483 + printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
484 + printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
485 +}
486 +
487 +static inline void __dump_ept_data_iso(int epid)
488 +{
489 + unsigned long flags;
490 + __u32 ept_data;
491 +
492 + if (epid < 0 || epid > 31) {
493 + printk("Cannot dump ept data for invalid epid %d\n", epid);
494 + return;
495 + }
496 +
497 + local_irq_save(flags);
498 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
499 + nop();
500 + ept_data = *R_USB_EPT_DATA_ISO;
501 + local_irq_restore(flags);
502 +
503 + printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", ept_data, epid);
504 + if (ept_data == 0) {
505 + /* No need for more detailed printing. */
506 + return;
507 + }
508 + printk(" valid : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, valid,
509 + ept_data));
510 + printk(" port : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, port,
511 + ept_data));
512 + printk(" error_code : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code,
513 + ept_data));
514 + printk(" max_len : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len,
515 + ept_data));
516 + printk(" ep : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, ep,
517 + ept_data));
518 + printk(" dev : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, dev,
519 + ept_data));
520 +}
521 +
522 +static inline void __dump_ept_data_list(void)
523 +{
524 + int i;
525 +
526 + printk("Dumping the whole R_USB_EPT_DATA list\n");
527 +
528 + for (i = 0; i < 32; i++) {
529 + __dump_ept_data(i);
530 + }
531 +}
532 +
533 +static void debug_epid(int epid) {
534 + int i;
535 +
536 + if(epid_isoc(epid)) {
537 + __dump_ept_data_iso(epid);
538 + } else {
539 + __dump_ept_data(epid);
540 + }
541 +
542 + printk("Bulk:\n");
543 + for(i = 0; i < 32; i++) {
544 + if(IO_EXTRACT(USB_EP_command, epid, TxBulkEPList[i].command) ==
545 + epid) {
546 + printk("%d: ", i); __dump_ep_desc(&(TxBulkEPList[i]));
547 + }
548 + }
549 +
550 + printk("Ctrl:\n");
551 + for(i = 0; i < 32; i++) {
552 + if(IO_EXTRACT(USB_EP_command, epid, TxCtrlEPList[i].command) ==
553 + epid) {
554 + printk("%d: ", i); __dump_ep_desc(&(TxCtrlEPList[i]));
555 + }
556 + }
557 +
558 + printk("Intr:\n");
559 + for(i = 0; i < MAX_INTR_INTERVAL; i++) {
560 + if(IO_EXTRACT(USB_EP_command, epid, TxIntrEPList[i].command) ==
561 + epid) {
562 + printk("%d: ", i); __dump_ep_desc(&(TxIntrEPList[i]));
563 + }
564 + }
565 +
566 + printk("Isoc:\n");
567 + for(i = 0; i < 32; i++) {
568 + if(IO_EXTRACT(USB_EP_command, epid, TxIsocEPList[i].command) ==
569 + epid) {
570 + printk("%d: ", i); __dump_ep_desc(&(TxIsocEPList[i]));
571 + }
572 + }
573 +
574 + __dump_ept_data_list();
575 + __dump_ep_list(PIPE_INTERRUPT);
576 + printk("\n\n");
577 +}
578 +
579 +
580 +
581 +char* hcd_status_to_str(__u8 bUsbStatus) {
582 + static char hcd_status_str[128];
583 + hcd_status_str[0] = '\0';
584 + if(bUsbStatus & IO_STATE(R_USB_STATUS, ourun, yes)) {
585 + strcat(hcd_status_str, "ourun ");
586 + }
587 + if(bUsbStatus & IO_STATE(R_USB_STATUS, perror, yes)) {
588 + strcat(hcd_status_str, "perror ");
589 + }
590 + if(bUsbStatus & IO_STATE(R_USB_STATUS, device_mode, yes)) {
591 + strcat(hcd_status_str, "device_mode ");
592 + }
593 + if(bUsbStatus & IO_STATE(R_USB_STATUS, host_mode, yes)) {
594 + strcat(hcd_status_str, "host_mode ");
595 + }
596 + if(bUsbStatus & IO_STATE(R_USB_STATUS, started, yes)) {
597 + strcat(hcd_status_str, "started ");
598 + }
599 + if(bUsbStatus & IO_STATE(R_USB_STATUS, running, yes)) {
600 + strcat(hcd_status_str, "running ");
601 + }
602 + return hcd_status_str;
603 +}
604 +
605 +
606 +char* sblist_to_str(struct USB_SB_Desc* sb_desc) {
607 + static char sblist_to_str_buff[128];
608 + char tmp[32], tmp2[32];
609 + sblist_to_str_buff[0] = '\0';
610 + while(sb_desc != NULL) {
611 + switch(IO_EXTRACT(USB_SB_command, tt, sb_desc->command)) {
612 + case 0: sprintf(tmp, "zout"); break;
613 + case 1: sprintf(tmp, "in"); break;
614 + case 2: sprintf(tmp, "out"); break;
615 + case 3: sprintf(tmp, "setup"); break;
616 + }
617 + sprintf(tmp2, "(%s %d)", tmp, sb_desc->sw_len);
618 + strcat(sblist_to_str_buff, tmp2);
619 + if(sb_desc->next != 0) {
620 + sb_desc = phys_to_virt(sb_desc->next);
621 + } else {
622 + sb_desc = NULL;
623 + }
624 + }
625 + return sblist_to_str_buff;
626 +}
627 +
628 +char* port_status_to_str(__u16 wPortStatus) {
629 + static char port_status_str[128];
630 + port_status_str[0] = '\0';
631 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) {
632 + strcat(port_status_str, "connected ");
633 + }
634 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) {
635 + strcat(port_status_str, "enabled ");
636 + }
637 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, suspended, yes)) {
638 + strcat(port_status_str, "suspended ");
639 + }
640 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes)) {
641 + strcat(port_status_str, "reset ");
642 + }
643 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, speed, full)) {
644 + strcat(port_status_str, "full-speed ");
645 + } else {
646 + strcat(port_status_str, "low-speed ");
647 + }
648 + return port_status_str;
649 +}
650 +
651 +
652 +char* endpoint_to_str(struct usb_endpoint_descriptor *ed) {
653 + static char endpoint_to_str_buff[128];
654 + char tmp[32];
655 + int epnum = ed->bEndpointAddress & 0x0F;
656 + int dir = ed->bEndpointAddress & 0x80;
657 + int type = ed->bmAttributes & 0x03;
658 + endpoint_to_str_buff[0] = '\0';
659 + sprintf(endpoint_to_str_buff, "ep:%d ", epnum);
660 + switch(type) {
661 + case 0:
662 + sprintf(tmp, " ctrl");
663 + break;
664 + case 1:
665 + sprintf(tmp, " isoc");
666 + break;
667 + case 2:
668 + sprintf(tmp, " bulk");
669 + break;
670 + case 3:
671 + sprintf(tmp, " intr");
672 + break;
673 + }
674 + strcat(endpoint_to_str_buff, tmp);
675 + if(dir) {
676 + sprintf(tmp, " in");
677 + } else {
678 + sprintf(tmp, " out");
679 + }
680 + strcat(endpoint_to_str_buff, tmp);
681 +
682 + return endpoint_to_str_buff;
683 +}
684 +
685 +/* Debug helper functions for Transfer Controller */
686 +char* pipe_to_str(unsigned int pipe) {
687 + static char pipe_to_str_buff[128];
688 + char tmp[64];
689 + sprintf(pipe_to_str_buff, "dir:%s", str_dir(pipe));
690 + sprintf(tmp, " type:%s", str_type(pipe));
691 + strcat(pipe_to_str_buff, tmp);
692 +
693 + sprintf(tmp, " dev:%d", usb_pipedevice(pipe));
694 + strcat(pipe_to_str_buff, tmp);
695 + sprintf(tmp, " ep:%d", usb_pipeendpoint(pipe));
696 + strcat(pipe_to_str_buff, tmp);
697 + return pipe_to_str_buff;
698 +}
699 +
700 +
701 +#define USB_DEBUG_DESC 1
702 +
703 +#ifdef USB_DEBUG_DESC
704 +#define dump_in_desc(x) __dump_in_desc(x)
705 +#define dump_sb_desc(...) __dump_sb_desc(...)
706 +#define dump_ep_desc(x) __dump_ep_desc(x)
707 +#define dump_ept_data(x) __dump_ept_data(x)
708 +#else
709 +#define dump_in_desc(...) do {} while (0)
710 +#define dump_sb_desc(...) do {} while (0)
711 +#define dump_ep_desc(...) do {} while (0)
712 +#endif
713 +
714 +
715 +/* Uncomment this to enable massive function call trace
716 + #define USB_DEBUG_TRACE */
717 +//#define USB_DEBUG_TRACE 1
718 +
719 +#ifdef USB_DEBUG_TRACE
720 +#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
721 +#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
722 +#else
723 +#define DBFENTER do {} while (0)
724 +#define DBFEXIT do {} while (0)
725 +#endif
726 +
727 +#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
728 +{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
729 +
730 +/* Most helpful debugging aid */
731 +#define ASSERT(expr) ((void) ((expr) ? 0 : (err("assert failed at: %s %d",__FUNCTION__, __LINE__))))
732 +
733 +
734 +/***************************************************************************/
735 +/***************************************************************************/
736 +/* Forward declarations */
737 +/***************************************************************************/
738 +/***************************************************************************/
739 +void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg);
740 +void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg);
741 +void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg);
742 +void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg);
743 +
744 +void rh_port_status_change(__u16[]);
745 +int rh_clear_port_feature(__u8, __u16);
746 +int rh_set_port_feature(__u8, __u16);
747 +static void rh_disable_port(unsigned int port);
748 +
749 +static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
750 + int timer);
751 +
752 +//static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
753 +// int mem_flags);
754 +static int tc_setup_epid(struct urb *urb, int mem_flags);
755 +static void tc_free_epid(struct usb_host_endpoint *ep);
756 +static int tc_allocate_epid(void);
757 +static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status);
758 +static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
759 + int status);
760 +
761 +static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
762 + int mem_flags);
763 +static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb);
764 +
765 +static inline struct urb *urb_list_first(int epid);
766 +static inline void urb_list_add(struct urb *urb, int epid,
767 + int mem_flags);
768 +static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid);
769 +static inline void urb_list_del(struct urb *urb, int epid);
770 +static inline void urb_list_move_last(struct urb *urb, int epid);
771 +static inline struct urb *urb_list_next(struct urb *urb, int epid);
772 +
773 +int create_sb_for_urb(struct urb *urb, int mem_flags);
774 +int init_intr_urb(struct urb *urb, int mem_flags);
775 +
776 +static inline void etrax_epid_set(__u8 index, __u32 data);
777 +static inline void etrax_epid_clear_error(__u8 index);
778 +static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
779 + __u8 toggle);
780 +static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout);
781 +static inline __u32 etrax_epid_get(__u8 index);
782 +
783 +/* We're accessing the same register position in Etrax so
784 + when we do full access the internal difference doesn't matter */
785 +#define etrax_epid_iso_set(index, data) etrax_epid_set(index, data)
786 +#define etrax_epid_iso_get(index) etrax_epid_get(index)
787 +
788 +
789 +//static void tc_dma_process_isoc_urb(struct urb *urb);
790 +static void tc_dma_process_queue(int epid);
791 +static void tc_dma_unlink_intr_urb(struct urb *urb);
792 +static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc);
793 +static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc);
794 +
795 +static void tc_bulk_start_timer_func(unsigned long dummy);
796 +static void tc_bulk_eot_timer_func(unsigned long dummy);
797 +
798 +
799 +/*************************************************************/
800 +/*************************************************************/
801 +/* Host Controler Driver block */
802 +/*************************************************************/
803 +/*************************************************************/
804 +
805 +/* HCD operations */
806 +static irqreturn_t crisv10_hcd_top_irq(int irq, void*);
807 +static int crisv10_hcd_reset(struct usb_hcd *);
808 +static int crisv10_hcd_start(struct usb_hcd *);
809 +static void crisv10_hcd_stop(struct usb_hcd *);
810 +#ifdef CONFIG_PM
811 +static int crisv10_hcd_suspend(struct device *, u32, u32);
812 +static int crisv10_hcd_resume(struct device *, u32);
813 +#endif /* CONFIG_PM */
814 +static int crisv10_hcd_get_frame(struct usb_hcd *);
815 +
816 +//static int tc_urb_enqueue(struct usb_hcd *, struct usb_host_endpoint *ep, struct urb *, gfp_t mem_flags);
817 +static int tc_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags);
818 +//static int tc_urb_dequeue(struct usb_hcd *, struct urb *);
819 +static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status);
820 +static void tc_endpoint_disable(struct usb_hcd *, struct usb_host_endpoint *ep);
821 +
822 +static int rh_status_data_request(struct usb_hcd *, char *);
823 +static int rh_control_request(struct usb_hcd *, u16, u16, u16, char*, u16);
824 +
825 +#ifdef CONFIG_PM
826 +static int crisv10_hcd_hub_suspend(struct usb_hcd *);
827 +static int crisv10_hcd_hub_resume(struct usb_hcd *);
828 +#endif /* CONFIG_PM */
829 +#ifdef CONFIG_USB_OTG
830 +static int crisv10_hcd_start_port_reset(struct usb_hcd *, unsigned);
831 +#endif /* CONFIG_USB_OTG */
832 +
833 +/* host controller driver interface */
834 +static const struct hc_driver crisv10_hc_driver =
835 + {
836 + .description = hc_name,
837 + .product_desc = product_desc,
838 + .hcd_priv_size = sizeof(struct crisv10_hcd),
839 +
840 + /* Attaching IRQ handler manualy in probe() */
841 + /* .irq = crisv10_hcd_irq, */
842 +
843 + .flags = HCD_USB11,
844 +
845 + /* called to init HCD and root hub */
846 + .reset = crisv10_hcd_reset,
847 + .start = crisv10_hcd_start,
848 +
849 + /* cleanly make HCD stop writing memory and doing I/O */
850 + .stop = crisv10_hcd_stop,
851 +
852 + /* return current frame number */
853 + .get_frame_number = crisv10_hcd_get_frame,
854 +
855 +
856 + /* Manage i/o requests via the Transfer Controller */
857 + .urb_enqueue = tc_urb_enqueue,
858 + .urb_dequeue = tc_urb_dequeue,
859 +
860 + /* hw synch, freeing endpoint resources that urb_dequeue can't */
861 + .endpoint_disable = tc_endpoint_disable,
862 +
863 +
864 + /* Root Hub support */
865 + .hub_status_data = rh_status_data_request,
866 + .hub_control = rh_control_request,
867 +#ifdef CONFIG_PM
868 + .hub_suspend = rh_suspend_request,
869 + .hub_resume = rh_resume_request,
870 +#endif /* CONFIG_PM */
871 +#ifdef CONFIG_USB_OTG
872 + .start_port_reset = crisv10_hcd_start_port_reset,
873 +#endif /* CONFIG_USB_OTG */
874 + };
875 +
876 +
877 +/*
878 + * conversion between pointers to a hcd and the corresponding
879 + * crisv10_hcd
880 + */
881 +
882 +static inline struct crisv10_hcd *hcd_to_crisv10_hcd(struct usb_hcd *hcd)
883 +{
884 + return (struct crisv10_hcd *) hcd->hcd_priv;
885 +}
886 +
887 +static inline struct usb_hcd *crisv10_hcd_to_hcd(struct crisv10_hcd *hcd)
888 +{
889 + return container_of((void *) hcd, struct usb_hcd, hcd_priv);
890 +}
891 +
892 +/* check if specified port is in use */
893 +static inline int port_in_use(unsigned int port)
894 +{
895 + return ports & (1 << port);
896 +}
897 +
898 +/* number of ports in use */
899 +static inline unsigned int num_ports(void)
900 +{
901 + unsigned int i, num = 0;
902 + for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
903 + if (port_in_use(i))
904 + num++;
905 + return num;
906 +}
907 +
908 +/* map hub port number to the port number used internally by the HC */
909 +static inline unsigned int map_port(unsigned int port)
910 +{
911 + unsigned int i, num = 0;
912 + for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
913 + if (port_in_use(i))
914 + if (++num == port)
915 + return i;
916 + return -1;
917 +}
918 +
919 +/* size of descriptors in slab cache */
920 +#ifndef MAX
921 +#define MAX(x, y) ((x) > (y) ? (x) : (y))
922 +#endif
923 +
924 +
925 +/******************************************************************/
926 +/* Hardware Interrupt functions */
927 +/******************************************************************/
928 +
929 +/* Fast interrupt handler for HC */
930 +static irqreturn_t crisv10_hcd_top_irq(int irq, void *vcd)
931 +{
932 + struct usb_hcd *hcd = vcd;
933 + struct crisv10_irq_reg reg;
934 + __u32 irq_mask;
935 + unsigned long flags;
936 +
937 + DBFENTER;
938 +
939 + ASSERT(hcd != NULL);
940 + reg.hcd = hcd;
941 +
942 + /* Turn of other interrupts while handling these sensitive cases */
943 + local_irq_save(flags);
944 +
945 + /* Read out which interrupts that are flaged */
946 + irq_mask = *R_USB_IRQ_MASK_READ;
947 + reg.r_usb_irq_mask_read = irq_mask;
948 +
949 + /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that
950 + R_USB_STATUS must be read before R_USB_EPID_ATTN since reading the latter
951 + clears the ourun and perror fields of R_USB_STATUS. */
952 + reg.r_usb_status = *R_USB_STATUS;
953 +
954 + /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn
955 + interrupts. */
956 + reg.r_usb_epid_attn = *R_USB_EPID_ATTN;
957 +
958 + /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
959 + port_status interrupt. */
960 + reg.r_usb_rh_port_status_1 = *R_USB_RH_PORT_STATUS_1;
961 + reg.r_usb_rh_port_status_2 = *R_USB_RH_PORT_STATUS_2;
962 +
963 + /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
964 + /* Note: the lower 11 bits contain the actual frame number, sent with each
965 + sof. */
966 + reg.r_usb_fm_number = *R_USB_FM_NUMBER;
967 +
968 + /* Interrupts are handled in order of priority. */
969 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
970 + crisv10_hcd_port_status_irq(&reg);
971 + }
972 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
973 + crisv10_hcd_epid_attn_irq(&reg);
974 + }
975 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
976 + crisv10_hcd_ctl_status_irq(&reg);
977 + }
978 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
979 + crisv10_hcd_isoc_eof_irq(&reg);
980 + }
981 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
982 + /* Update/restart the bulk start timer since obviously the channel is
983 + running. */
984 + mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
985 + /* Update/restart the bulk eot timer since we just received an bulk eot
986 + interrupt. */
987 + mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
988 +
989 + /* Check for finished bulk transfers on epids */
990 + check_finished_bulk_tx_epids(hcd, 0);
991 + }
992 + local_irq_restore(flags);
993 +
994 + DBFEXIT;
995 + return IRQ_HANDLED;
996 +}
997 +
998 +
999 +void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg) {
1000 + struct usb_hcd *hcd = reg->hcd;
1001 + struct crisv10_urb_priv *urb_priv;
1002 + int epid;
1003 + DBFENTER;
1004 +
1005 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
1006 + if (test_bit(epid, (void *)&reg->r_usb_epid_attn)) {
1007 + struct urb *urb;
1008 + __u32 ept_data;
1009 + int error_code;
1010 +
1011 + if (epid == DUMMY_EPID || epid == INVALID_EPID) {
1012 + /* We definitely don't care about these ones. Besides, they are
1013 + always disabled, so any possible disabling caused by the
1014 + epid attention interrupt is irrelevant. */
1015 + warn("Got epid_attn for INVALID_EPID or DUMMY_EPID (%d).", epid);
1016 + continue;
1017 + }
1018 +
1019 + if(!epid_inuse(epid)) {
1020 + irq_err("Epid attention on epid:%d that isn't in use\n", epid);
1021 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1022 + debug_epid(epid);
1023 + continue;
1024 + }
1025 +
1026 + /* Note that although there are separate R_USB_EPT_DATA and
1027 + R_USB_EPT_DATA_ISO registers, they are located at the same address and
1028 + are of the same size. In other words, this read should be ok for isoc
1029 + also. */
1030 + ept_data = etrax_epid_get(epid);
1031 + error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, ept_data);
1032 +
1033 + /* Get the active URB for this epid. We blatantly assume
1034 + that only this URB could have caused the epid attention. */
1035 + urb = activeUrbList[epid];
1036 + if (urb == NULL) {
1037 + irq_err("Attention on epid:%d error:%d with no active URB.\n",
1038 + epid, error_code);
1039 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1040 + debug_epid(epid);
1041 + continue;
1042 + }
1043 +
1044 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
1045 + ASSERT(urb_priv);
1046 +
1047 + /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
1048 + if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
1049 +
1050 + /* Isoc traffic doesn't have error_count_in/error_count_out. */
1051 + if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
1052 + (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, ept_data) == 3 ||
1053 + IO_EXTRACT(R_USB_EPT_DATA, error_count_out, ept_data) == 3)) {
1054 + /* Check if URB allready is marked for late-finish, we can get
1055 + several 3rd error for Intr traffic when a device is unplugged */
1056 + if(urb_priv->later_data == NULL) {
1057 + /* 3rd error. */
1058 + irq_warn("3rd error for epid:%d (%s %s) URB:0x%x[%d]\n", epid,
1059 + str_dir(urb->pipe), str_type(urb->pipe),
1060 + (unsigned int)urb, urb_priv->urb_num);
1061 +
1062 + tc_finish_urb_later(hcd, urb, -EPROTO);
1063 + }
1064 +
1065 + } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
1066 + irq_warn("Perror for epid:%d\n", epid);
1067 + printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
1068 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1069 + __dump_urb(urb);
1070 + debug_epid(epid);
1071 +
1072 + if (!(ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
1073 + /* invalid ep_id */
1074 + panic("Perror because of invalid epid."
1075 + " Deconfigured too early?");
1076 + } else {
1077 + /* past eof1, near eof, zout transfer, setup transfer */
1078 + /* Dump the urb and the relevant EP descriptor. */
1079 + panic("Something wrong with DMA descriptor contents."
1080 + " Too much traffic inserted?");
1081 + }
1082 + } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
1083 + /* buffer ourun */
1084 + printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
1085 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1086 + __dump_urb(urb);
1087 + debug_epid(epid);
1088 +
1089 + panic("Buffer overrun/underrun for epid:%d. DMA too busy?", epid);
1090 + } else {
1091 + irq_warn("Attention on epid:%d (%s %s) with no error code\n", epid,
1092 + str_dir(urb->pipe), str_type(urb->pipe));
1093 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1094 + __dump_urb(urb);
1095 + debug_epid(epid);
1096 + }
1097 +
1098 + } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
1099 + stall)) {
1100 + /* Not really a protocol error, just says that the endpoint gave
1101 + a stall response. Note that error_code cannot be stall for isoc. */
1102 + if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
1103 + panic("Isoc traffic cannot stall");
1104 + }
1105 +
1106 + tc_dbg("Stall for epid:%d (%s %s) URB:0x%x\n", epid,
1107 + str_dir(urb->pipe), str_type(urb->pipe), (unsigned int)urb);
1108 + tc_finish_urb(hcd, urb, -EPIPE);
1109 +
1110 + } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
1111 + bus_error)) {
1112 + /* Two devices responded to a transaction request. Must be resolved
1113 + by software. FIXME: Reset ports? */
1114 + panic("Bus error for epid %d."
1115 + " Two devices responded to transaction request\n",
1116 + epid);
1117 +
1118 + } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
1119 + buffer_error)) {
1120 + /* DMA overrun or underrun. */
1121 + irq_warn("Buffer overrun/underrun for epid:%d (%s %s)\n", epid,
1122 + str_dir(urb->pipe), str_type(urb->pipe));
1123 +
1124 + /* It seems that error_code = buffer_error in
1125 + R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
1126 + are the same error. */
1127 + tc_finish_urb(hcd, urb, -EPROTO);
1128 + } else {
1129 + irq_warn("Unknown attention on epid:%d (%s %s)\n", epid,
1130 + str_dir(urb->pipe), str_type(urb->pipe));
1131 + dump_ept_data(epid);
1132 + }
1133 + }
1134 + }
1135 + DBFEXIT;
1136 +}
1137 +
1138 +void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg)
1139 +{
1140 + __u16 port_reg[USB_ROOT_HUB_PORTS];
1141 + DBFENTER;
1142 + port_reg[0] = reg->r_usb_rh_port_status_1;
1143 + port_reg[1] = reg->r_usb_rh_port_status_2;
1144 + rh_port_status_change(port_reg);
1145 + DBFEXIT;
1146 +}
1147 +
1148 +void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg)
1149 +{
1150 + int epid;
1151 + struct urb *urb;
1152 + struct crisv10_urb_priv *urb_priv;
1153 +
1154 + DBFENTER;
1155 +
1156 + for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
1157 +
1158 + /* Only check epids that are in use, is valid and has SB list */
1159 + if (!epid_inuse(epid) || epid == INVALID_EPID ||
1160 + TxIsocEPList[epid].sub == 0 || epid == DUMMY_EPID) {
1161 + /* Nothing here to see. */
1162 + continue;
1163 + }
1164 + ASSERT(epid_isoc(epid));
1165 +
1166 + /* Get the active URB for this epid (if any). */
1167 + urb = activeUrbList[epid];
1168 + if (urb == 0) {
1169 + isoc_warn("Ignoring NULL urb for epid:%d\n", epid);
1170 + continue;
1171 + }
1172 + if(!epid_out_traffic(epid)) {
1173 + /* Sanity check. */
1174 + ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
1175 +
1176 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
1177 + ASSERT(urb_priv);
1178 +
1179 + if (urb_priv->urb_state == NOT_STARTED) {
1180 + /* If ASAP is not set and urb->start_frame is the current frame,
1181 + start the transfer. */
1182 + if (!(urb->transfer_flags & URB_ISO_ASAP) &&
1183 + (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
1184 + /* EP should not be enabled if we're waiting for start_frame */
1185 + ASSERT((TxIsocEPList[epid].command &
1186 + IO_STATE(USB_EP_command, enable, yes)) == 0);
1187 +
1188 + isoc_warn("Enabling isoc IN EP descr for epid %d\n", epid);
1189 + TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
1190 +
1191 + /* This urb is now active. */
1192 + urb_priv->urb_state = STARTED;
1193 + continue;
1194 + }
1195 + }
1196 + }
1197 + }
1198 +
1199 + DBFEXIT;
1200 +}
1201 +
1202 +void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg)
1203 +{
1204 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(reg->hcd);
1205 +
1206 + DBFENTER;
1207 + ASSERT(crisv10_hcd);
1208 +
1209 + irq_dbg("ctr_status_irq, controller status: %s\n",
1210 + hcd_status_to_str(reg->r_usb_status));
1211 +
1212 + /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
1213 + list for the corresponding epid? */
1214 + if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
1215 + panic("USB controller got ourun.");
1216 + }
1217 + if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
1218 +
1219 + /* Before, etrax_usb_do_intr_recover was called on this epid if it was
1220 + an interrupt pipe. I don't see how re-enabling all EP descriptors
1221 + will help if there was a programming error. */
1222 + panic("USB controller got perror.");
1223 + }
1224 +
1225 + /* Keep track of USB Controller, if it's running or not */
1226 + if(reg->r_usb_status & IO_STATE(R_USB_STATUS, running, yes)) {
1227 + crisv10_hcd->running = 1;
1228 + } else {
1229 + crisv10_hcd->running = 0;
1230 + }
1231 +
1232 + if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
1233 + /* We should never operate in device mode. */
1234 + panic("USB controller in device mode.");
1235 + }
1236 +
1237 + /* Set the flag to avoid getting "Unlink after no-IRQ? Controller is probably
1238 + using the wrong IRQ" from hcd_unlink_urb() in drivers/usb/core/hcd.c */
1239 + set_bit(HCD_FLAG_SAW_IRQ, &reg->hcd->flags);
1240 +
1241 + DBFEXIT;
1242 +}
1243 +
1244 +
1245 +/******************************************************************/
1246 +/* Host Controller interface functions */
1247 +/******************************************************************/
1248 +
1249 +static inline void crisv10_ready_wait(void) {
1250 + volatile int timeout = 10000;
1251 + /* Check the busy bit of USB controller in Etrax */
1252 + while((*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy)) &&
1253 + (timeout-- > 0));
1254 + if(timeout == 0) {
1255 + warn("Timeout while waiting for USB controller to be idle\n");
1256 + }
1257 +}
1258 +
1259 +/* reset host controller */
1260 +static int crisv10_hcd_reset(struct usb_hcd *hcd)
1261 +{
1262 + DBFENTER;
1263 + hcd_dbg(hcd, "reset\n");
1264 +
1265 +
1266 + /* Reset the USB interface. */
1267 + /*
1268 + *R_USB_COMMAND =
1269 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
1270 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
1271 + IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
1272 + nop();
1273 + */
1274 + DBFEXIT;
1275 + return 0;
1276 +}
1277 +
1278 +/* start host controller */
1279 +static int crisv10_hcd_start(struct usb_hcd *hcd)
1280 +{
1281 + DBFENTER;
1282 + hcd_dbg(hcd, "start\n");
1283 +
1284 + crisv10_ready_wait();
1285 +
1286 + /* Start processing of USB traffic. */
1287 + *R_USB_COMMAND =
1288 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
1289 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
1290 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
1291 +
1292 + nop();
1293 +
1294 + hcd->state = HC_STATE_RUNNING;
1295 +
1296 + DBFEXIT;
1297 + return 0;
1298 +}
1299 +
1300 +/* stop host controller */
1301 +static void crisv10_hcd_stop(struct usb_hcd *hcd)
1302 +{
1303 + DBFENTER;
1304 + hcd_dbg(hcd, "stop\n");
1305 + crisv10_hcd_reset(hcd);
1306 + DBFEXIT;
1307 +}
1308 +
1309 +/* return the current frame number */
1310 +static int crisv10_hcd_get_frame(struct usb_hcd *hcd)
1311 +{
1312 + DBFENTER;
1313 + DBFEXIT;
1314 + return (*R_USB_FM_NUMBER & 0x7ff);
1315 +}
1316 +
1317 +#ifdef CONFIG_USB_OTG
1318 +
1319 +static int crisv10_hcd_start_port_reset(struct usb_hcd *hcd, unsigned port)
1320 +{
1321 + return 0; /* no-op for now */
1322 +}
1323 +
1324 +#endif /* CONFIG_USB_OTG */
1325 +
1326 +
1327 +/******************************************************************/
1328 +/* Root Hub functions */
1329 +/******************************************************************/
1330 +
1331 +/* root hub status */
1332 +static const struct usb_hub_status rh_hub_status =
1333 + {
1334 + .wHubStatus = 0,
1335 + .wHubChange = 0,
1336 + };
1337 +
1338 +/* root hub descriptor */
1339 +static const u8 rh_hub_descr[] =
1340 + {
1341 + 0x09, /* bDescLength */
1342 + 0x29, /* bDescriptorType */
1343 + USB_ROOT_HUB_PORTS, /* bNbrPorts */
1344 + 0x00, /* wHubCharacteristics */
1345 + 0x00,
1346 + 0x01, /* bPwrOn2pwrGood */
1347 + 0x00, /* bHubContrCurrent */
1348 + 0x00, /* DeviceRemovable */
1349 + 0xff /* PortPwrCtrlMask */
1350 + };
1351 +
1352 +/* Actual holder of root hub status*/
1353 +struct crisv10_rh rh;
1354 +
1355 +/* Initialize root hub data structures (called from dvdrv_hcd_probe()) */
1356 +int rh_init(void) {
1357 + int i;
1358 + /* Reset port status flags */
1359 + for (i = 0; i < USB_ROOT_HUB_PORTS; i++) {
1360 + rh.wPortChange[i] = 0;
1361 + rh.wPortStatusPrev[i] = 0;
1362 + }
1363 + return 0;
1364 +}
1365 +
1366 +#define RH_FEAT_MASK ((1<<USB_PORT_FEAT_CONNECTION)|\
1367 + (1<<USB_PORT_FEAT_ENABLE)|\
1368 + (1<<USB_PORT_FEAT_SUSPEND)|\
1369 + (1<<USB_PORT_FEAT_RESET))
1370 +
1371 +/* Handle port status change interrupt (called from bottom part interrupt) */
1372 +void rh_port_status_change(__u16 port_reg[]) {
1373 + int i;
1374 + __u16 wChange;
1375 +
1376 + for(i = 0; i < USB_ROOT_HUB_PORTS; i++) {
1377 + /* Xor out changes since last read, masked for important flags */
1378 + wChange = (port_reg[i] & RH_FEAT_MASK) ^ rh.wPortStatusPrev[i];
1379 + /* Or changes together with (if any) saved changes */
1380 + rh.wPortChange[i] |= wChange;
1381 + /* Save new status */
1382 + rh.wPortStatusPrev[i] = port_reg[i];
1383 +
1384 + if(wChange) {
1385 + rh_dbg("Interrupt port_status change port%d: %s Current-status:%s\n", i+1,
1386 + port_status_to_str(wChange),
1387 + port_status_to_str(port_reg[i]));
1388 + }
1389 + }
1390 +}
1391 +
1392 +/* Construct port status change bitmap for the root hub */
1393 +static int rh_status_data_request(struct usb_hcd *hcd, char *buf)
1394 +{
1395 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
1396 + unsigned int i;
1397 +
1398 +// DBFENTER;
1399 +
1400 + /*
1401 + * corresponds to hub status change EP (USB 2.0 spec section 11.13.4)
1402 + * return bitmap indicating ports with status change
1403 + */
1404 + *buf = 0;
1405 + spin_lock(&crisv10_hcd->lock);
1406 + for (i = 1; i <= crisv10_hcd->num_ports; i++) {
1407 + if (rh.wPortChange[map_port(i)]) {
1408 + *buf |= (1 << i);
1409 + rh_dbg("rh_status_data_request, change on port %d: %s Current Status: %s\n", i,
1410 + port_status_to_str(rh.wPortChange[map_port(i)]),
1411 + port_status_to_str(rh.wPortStatusPrev[map_port(i)]));
1412 + }
1413 + }
1414 + spin_unlock(&crisv10_hcd->lock);
1415 +
1416 +// DBFEXIT;
1417 +
1418 + return *buf == 0 ? 0 : 1;
1419 +}
1420 +
1421 +/* Handle a control request for the root hub (called from hcd_driver) */
1422 +static int rh_control_request(struct usb_hcd *hcd,
1423 + u16 typeReq,
1424 + u16 wValue,
1425 + u16 wIndex,
1426 + char *buf,
1427 + u16 wLength) {
1428 +
1429 + struct crisv10_hcd *crisv10_hcd = hcd_to_crisv10_hcd(hcd);
1430 + int retval = 0;
1431 + int len;
1432 + DBFENTER;
1433 +
1434 + switch (typeReq) {
1435 + case GetHubDescriptor:
1436 + rh_dbg("GetHubDescriptor\n");
1437 + len = min_t(unsigned int, sizeof rh_hub_descr, wLength);
1438 + memcpy(buf, rh_hub_descr, len);
1439 + buf[2] = crisv10_hcd->num_ports;
1440 + break;
1441 + case GetHubStatus:
1442 + rh_dbg("GetHubStatus\n");
1443 + len = min_t(unsigned int, sizeof rh_hub_status, wLength);
1444 + memcpy(buf, &rh_hub_status, len);
1445 + break;
1446 + case GetPortStatus:
1447 + if (!wIndex || wIndex > crisv10_hcd->num_ports)
1448 + goto error;
1449 + rh_dbg("GetportStatus, port:%d change:%s status:%s\n", wIndex,
1450 + port_status_to_str(rh.wPortChange[map_port(wIndex)]),
1451 + port_status_to_str(rh.wPortStatusPrev[map_port(wIndex)]));
1452 + *(u16 *) buf = cpu_to_le16(rh.wPortStatusPrev[map_port(wIndex)]);
1453 + *(u16 *) (buf + 2) = cpu_to_le16(rh.wPortChange[map_port(wIndex)]);
1454 + break;
1455 + case SetHubFeature:
1456 + rh_dbg("SetHubFeature\n");
1457 + case ClearHubFeature:
1458 + rh_dbg("ClearHubFeature\n");
1459 + switch (wValue) {
1460 + case C_HUB_OVER_CURRENT:
1461 + case C_HUB_LOCAL_POWER:
1462 + rh_warn("Not implemented hub request:%d \n", typeReq);
1463 + /* not implemented */
1464 + break;
1465 + default:
1466 + goto error;
1467 + }
1468 + break;
1469 + case SetPortFeature:
1470 + if (!wIndex || wIndex > crisv10_hcd->num_ports)
1471 + goto error;
1472 + if(rh_set_port_feature(map_port(wIndex), wValue))
1473 + goto error;
1474 + break;
1475 + case ClearPortFeature:
1476 + if (!wIndex || wIndex > crisv10_hcd->num_ports)
1477 + goto error;
1478 + if(rh_clear_port_feature(map_port(wIndex), wValue))
1479 + goto error;
1480 + break;
1481 + default:
1482 + rh_warn("Unknown hub request: %d\n", typeReq);
1483 + error:
1484 + retval = -EPIPE;
1485 + }
1486 + DBFEXIT;
1487 + return retval;
1488 +}
1489 +
1490 +int rh_set_port_feature(__u8 bPort, __u16 wFeature) {
1491 + __u8 bUsbCommand = 0;
1492 + switch(wFeature) {
1493 + case USB_PORT_FEAT_RESET:
1494 + rh_dbg("SetPortFeature: reset\n");
1495 + bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, reset);
1496 + goto set;
1497 + break;
1498 + case USB_PORT_FEAT_SUSPEND:
1499 + rh_dbg("SetPortFeature: suspend\n");
1500 + bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, suspend);
1501 + goto set;
1502 + break;
1503 + case USB_PORT_FEAT_POWER:
1504 + rh_dbg("SetPortFeature: power\n");
1505 + break;
1506 + case USB_PORT_FEAT_C_CONNECTION:
1507 + rh_dbg("SetPortFeature: c_connection\n");
1508 + break;
1509 + case USB_PORT_FEAT_C_RESET:
1510 + rh_dbg("SetPortFeature: c_reset\n");
1511 + break;
1512 + case USB_PORT_FEAT_C_OVER_CURRENT:
1513 + rh_dbg("SetPortFeature: c_over_current\n");
1514 + break;
1515 +
1516 + set:
1517 + /* Select which port via the port_sel field */
1518 + bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
1519 +
1520 + /* Make sure the controller isn't busy. */
1521 + crisv10_ready_wait();
1522 + /* Send out the actual command to the USB controller */
1523 + *R_USB_COMMAND = bUsbCommand;
1524 +
1525 + /* If port reset then also bring USB controller into running state */
1526 + if(wFeature == USB_PORT_FEAT_RESET) {
1527 + /* Wait a while for controller to first become started after port reset */
1528 + udelay(12000); /* 12ms blocking wait */
1529 +
1530 + /* Make sure the controller isn't busy. */
1531 + crisv10_ready_wait();
1532 +
1533 + /* If all enabled ports were disabled the host controller goes down into
1534 + started mode, so we need to bring it back into the running state.
1535 + (This is safe even if it's already in the running state.) */
1536 + *R_USB_COMMAND =
1537 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
1538 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
1539 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
1540 + }
1541 +
1542 + break;
1543 + default:
1544 + rh_dbg("SetPortFeature: unknown feature\n");
1545 + return -1;
1546 + }
1547 + return 0;
1548 +}
1549 +
1550 +int rh_clear_port_feature(__u8 bPort, __u16 wFeature) {
1551 + switch(wFeature) {
1552 + case USB_PORT_FEAT_ENABLE:
1553 + rh_dbg("ClearPortFeature: enable\n");
1554 + rh_disable_port(bPort);
1555 + break;
1556 + case USB_PORT_FEAT_SUSPEND:
1557 + rh_dbg("ClearPortFeature: suspend\n");
1558 + break;
1559 + case USB_PORT_FEAT_POWER:
1560 + rh_dbg("ClearPortFeature: power\n");
1561 + break;
1562 +
1563 + case USB_PORT_FEAT_C_ENABLE:
1564 + rh_dbg("ClearPortFeature: c_enable\n");
1565 + goto clear;
1566 + case USB_PORT_FEAT_C_SUSPEND:
1567 + rh_dbg("ClearPortFeature: c_suspend\n");
1568 + goto clear;
1569 + case USB_PORT_FEAT_C_CONNECTION:
1570 + rh_dbg("ClearPortFeature: c_connection\n");
1571 + goto clear;
1572 + case USB_PORT_FEAT_C_OVER_CURRENT:
1573 + rh_dbg("ClearPortFeature: c_over_current\n");
1574 + goto clear;
1575 + case USB_PORT_FEAT_C_RESET:
1576 + rh_dbg("ClearPortFeature: c_reset\n");
1577 + goto clear;
1578 + clear:
1579 + rh.wPortChange[bPort] &= ~(1 << (wFeature - 16));
1580 + break;
1581 + default:
1582 + rh_dbg("ClearPortFeature: unknown feature\n");
1583 + return -1;
1584 + }
1585 + return 0;
1586 +}
1587 +
1588 +
1589 +#ifdef CONFIG_PM
1590 +/* Handle a suspend request for the root hub (called from hcd_driver) */
1591 +static int rh_suspend_request(struct usb_hcd *hcd)
1592 +{
1593 + return 0; /* no-op for now */
1594 +}
1595 +
1596 +/* Handle a resume request for the root hub (called from hcd_driver) */
1597 +static int rh_resume_request(struct usb_hcd *hcd)
1598 +{
1599 + return 0; /* no-op for now */
1600 +}
1601 +#endif /* CONFIG_PM */
1602 +
1603 +
1604 +
1605 +/* Wrapper function for workaround port disable registers in USB controller */
1606 +static void rh_disable_port(unsigned int port) {
1607 + volatile int timeout = 10000;
1608 + volatile char* usb_portx_disable;
1609 + switch(port) {
1610 + case 0:
1611 + usb_portx_disable = R_USB_PORT1_DISABLE;
1612 + break;
1613 + case 1:
1614 + usb_portx_disable = R_USB_PORT2_DISABLE;
1615 + break;
1616 + default:
1617 + /* Invalid port index */
1618 + return;
1619 + }
1620 + /* Set disable flag in special register */
1621 + *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
1622 + /* Wait until not enabled anymore */
1623 + while((rh.wPortStatusPrev[port] &
1624 + IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
1625 + (timeout-- > 0));
1626 + if(timeout == 0) {
1627 + warn("Timeout while waiting for port %d to become disabled\n", port);
1628 + }
1629 + /* clear disable flag in special register */
1630 + *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
1631 + rh_info("Physical port %d disabled\n", port+1);
1632 +}
1633 +
1634 +
1635 +/******************************************************************/
1636 +/* Transfer Controller (TC) functions */
1637 +/******************************************************************/
1638 +
1639 +/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it
1640 + dynamically?
1641 + To adjust it dynamically we would have to get an interrupt when we reach
1642 + the end of the rx descriptor list, or when we get close to the end, and
1643 + then allocate more descriptors. */
1644 +#define NBR_OF_RX_DESC 512
1645 +#define RX_DESC_BUF_SIZE 1024
1646 +#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
1647 +
1648 +
1649 +/* Local variables for Transfer Controller */
1650 +/* --------------------------------------- */
1651 +
1652 +/* This is a circular (double-linked) list of the active urbs for each epid.
1653 + The head is never removed, and new urbs are linked onto the list as
1654 + urb_entry_t elements. Don't reference urb_list directly; use the wrapper
1655 + functions instead (which includes spin_locks) */
1656 +static struct list_head urb_list[NBR_OF_EPIDS];
1657 +
1658 +/* Read about the need and usage of this lock in submit_ctrl_urb. */
1659 +/* Lock for URB lists for each EPID */
1660 +static spinlock_t urb_list_lock;
1661 +
1662 +/* Lock for EPID array register (R_USB_EPT_x) in Etrax */
1663 +static spinlock_t etrax_epid_lock;
1664 +
1665 +/* Lock for dma8 sub0 handling */
1666 +static spinlock_t etrax_dma8_sub0_lock;
1667 +
1668 +/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
1669 + Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be
1670 + cache aligned. */
1671 +static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
1672 +static volatile struct USB_IN_Desc RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
1673 +
1674 +/* Pointers into RxDescList. */
1675 +static volatile struct USB_IN_Desc *myNextRxDesc;
1676 +static volatile struct USB_IN_Desc *myLastRxDesc;
1677 +
1678 +/* A zout transfer makes a memory access at the address of its buf pointer,
1679 + which means that setting this buf pointer to 0 will cause an access to the
1680 + flash. In addition to this, setting sw_len to 0 results in a 16/32 bytes
1681 + (depending on DMA burst size) transfer.
1682 + Instead, we set it to 1, and point it to this buffer. */
1683 +static int zout_buffer[4] __attribute__ ((aligned (4)));
1684 +
1685 +/* Cache for allocating new EP and SB descriptors. */
1686 +//static kmem_cache_t *usb_desc_cache;
1687 +static struct kmem_cache *usb_desc_cache;
1688 +
1689 +/* Cache for the data allocated in the isoc descr top half. */
1690 +//static kmem_cache_t *isoc_compl_cache;
1691 +static struct kmem_cache *isoc_compl_cache;
1692 +
1693 +/* Cache for the data allocated when delayed finishing of URBs */
1694 +//static kmem_cache_t *later_data_cache;
1695 +static struct kmem_cache *later_data_cache;
1696 +
1697 +/* Counter to keep track of how many Isoc EP we have sat up. Used to enable
1698 + and disable iso_eof interrupt. We only need these interrupts when we have
1699 + Isoc data endpoints (consumes CPU cycles).
1700 + FIXME: This could be more fine granular, so this interrupt is only enabled
1701 + when we have a In Isoc URB not URB_ISO_ASAP flaged queued. */
1702 +static int isoc_epid_counter;
1703 +
1704 +/* Protecting wrapper functions for R_USB_EPT_x */
1705 +/* -------------------------------------------- */
1706 +static inline void etrax_epid_set(__u8 index, __u32 data) {
1707 + unsigned long flags;
1708 + spin_lock_irqsave(&etrax_epid_lock, flags);
1709 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1710 + nop();
1711 + *R_USB_EPT_DATA = data;
1712 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1713 +}
1714 +
1715 +static inline void etrax_epid_clear_error(__u8 index) {
1716 + unsigned long flags;
1717 + spin_lock_irqsave(&etrax_epid_lock, flags);
1718 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1719 + nop();
1720 + *R_USB_EPT_DATA &=
1721 + ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
1722 + IO_MASK(R_USB_EPT_DATA, error_count_out) |
1723 + IO_MASK(R_USB_EPT_DATA, error_code));
1724 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1725 +}
1726 +
1727 +static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
1728 + __u8 toggle) {
1729 + unsigned long flags;
1730 + spin_lock_irqsave(&etrax_epid_lock, flags);
1731 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1732 + nop();
1733 + if(dirout) {
1734 + *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
1735 + *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
1736 + } else {
1737 + *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
1738 + *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
1739 + }
1740 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1741 +}
1742 +
1743 +static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout) {
1744 + unsigned long flags;
1745 + __u8 toggle;
1746 + spin_lock_irqsave(&etrax_epid_lock, flags);
1747 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1748 + nop();
1749 + if (dirout) {
1750 + toggle = IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
1751 + } else {
1752 + toggle = IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
1753 + }
1754 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1755 + return toggle;
1756 +}
1757 +
1758 +
1759 +static inline __u32 etrax_epid_get(__u8 index) {
1760 + unsigned long flags;
1761 + __u32 data;
1762 + spin_lock_irqsave(&etrax_epid_lock, flags);
1763 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1764 + nop();
1765 + data = *R_USB_EPT_DATA;
1766 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1767 + return data;
1768 +}
1769 +
1770 +
1771 +
1772 +
1773 +/* Main functions for Transfer Controller */
1774 +/* -------------------------------------- */
1775 +
1776 +/* Init structs, memories and lists used by Transfer Controller */
1777 +int tc_init(struct usb_hcd *hcd) {
1778 + int i;
1779 + /* Clear software state info for all epids */
1780 + memset(epid_state, 0, sizeof(struct etrax_epid) * NBR_OF_EPIDS);
1781 +
1782 + /* Set Invalid and Dummy as being in use and disabled */
1783 + epid_state[INVALID_EPID].inuse = 1;
1784 + epid_state[DUMMY_EPID].inuse = 1;
1785 + epid_state[INVALID_EPID].disabled = 1;
1786 + epid_state[DUMMY_EPID].disabled = 1;
1787 +
1788 + /* Clear counter for how many Isoc epids we have sat up */
1789 + isoc_epid_counter = 0;
1790 +
1791 + /* Initialize the urb list by initiating a head for each list.
1792 + Also reset list hodling active URB for each epid */
1793 + for (i = 0; i < NBR_OF_EPIDS; i++) {
1794 + INIT_LIST_HEAD(&urb_list[i]);
1795 + activeUrbList[i] = NULL;
1796 + }
1797 +
1798 + /* Init lock for URB lists */
1799 + spin_lock_init(&urb_list_lock);
1800 + /* Init lock for Etrax R_USB_EPT register */
1801 + spin_lock_init(&etrax_epid_lock);
1802 + /* Init lock for Etrax dma8 sub0 handling */
1803 + spin_lock_init(&etrax_dma8_sub0_lock);
1804 +
1805 + /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
1806 +
1807 + /* Note that we specify sizeof(struct USB_EP_Desc) as the size, but also
1808 + allocate SB descriptors from this cache. This is ok since
1809 + sizeof(struct USB_EP_Desc) == sizeof(struct USB_SB_Desc). */
1810 +// usb_desc_cache = kmem_cache_create("usb_desc_cache",
1811 +// sizeof(struct USB_EP_Desc), 0,
1812 +// SLAB_HWCACHE_ALIGN, 0, 0);
1813 + usb_desc_cache = kmem_cache_create(
1814 + "usb_desc_cache",
1815 + sizeof(struct USB_EP_Desc),
1816 + 0,
1817 + SLAB_HWCACHE_ALIGN,
1818 + NULL);
1819 + if(usb_desc_cache == NULL) {
1820 + return -ENOMEM;
1821 + }
1822 +
1823 + /* Create slab cache for speedy allocation of memory for isoc bottom-half
1824 + interrupt handling */
1825 +// isoc_compl_cache =
1826 +// kmem_cache_create("isoc_compl_cache",
1827 +// sizeof(struct crisv10_isoc_complete_data),
1828 +// 0, SLAB_HWCACHE_ALIGN, 0, 0);
1829 + isoc_compl_cache = kmem_cache_create(
1830 + "isoc_compl_cache",
1831 + sizeof(struct crisv10_isoc_complete_data),
1832 + 0,
1833 + SLAB_HWCACHE_ALIGN,
1834 + NULL
1835 + );
1836 +
1837 + if(isoc_compl_cache == NULL) {
1838 + return -ENOMEM;
1839 + }
1840 +
1841 + /* Create slab cache for speedy allocation of memory for later URB finish
1842 + struct */
1843 +// later_data_cache =
1844 +// kmem_cache_create("later_data_cache",
1845 +// sizeof(struct urb_later_data),
1846 +// 0, SLAB_HWCACHE_ALIGN, 0, 0);
1847 +
1848 + later_data_cache = kmem_cache_create(
1849 + "later_data_cache",
1850 + sizeof(struct urb_later_data),
1851 + 0,
1852 + SLAB_HWCACHE_ALIGN,
1853 + NULL
1854 + );
1855 +
1856 + if(later_data_cache == NULL) {
1857 + return -ENOMEM;
1858 + }
1859 +
1860 +
1861 + /* Initiate the bulk start timer. */
1862 + init_timer(&bulk_start_timer);
1863 + bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
1864 + bulk_start_timer.function = tc_bulk_start_timer_func;
1865 + add_timer(&bulk_start_timer);
1866 +
1867 +
1868 + /* Initiate the bulk eot timer. */
1869 + init_timer(&bulk_eot_timer);
1870 + bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
1871 + bulk_eot_timer.function = tc_bulk_eot_timer_func;
1872 + bulk_eot_timer.data = (unsigned long)hcd;
1873 + add_timer(&bulk_eot_timer);
1874 +
1875 + return 0;
1876 +}
1877 +
1878 +/* Uninitialize all resources used by Transfer Controller */
1879 +void tc_destroy(void) {
1880 +
1881 + /* Destroy all slab cache */
1882 + kmem_cache_destroy(usb_desc_cache);
1883 + kmem_cache_destroy(isoc_compl_cache);
1884 + kmem_cache_destroy(later_data_cache);
1885 +
1886 + /* Remove timers */
1887 + del_timer(&bulk_start_timer);
1888 + del_timer(&bulk_eot_timer);
1889 +}
1890 +
1891 +static void restart_dma8_sub0(void) {
1892 + unsigned long flags;
1893 + spin_lock_irqsave(&etrax_dma8_sub0_lock, flags);
1894 + /* Verify that the dma is not running */
1895 + if ((*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd)) == 0) {
1896 + struct USB_EP_Desc *ep = (struct USB_EP_Desc *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
1897 + while (DUMMY_EPID == IO_EXTRACT(USB_EP_command, epid, ep->command)) {
1898 + ep = (struct USB_EP_Desc *)phys_to_virt(ep->next);
1899 + }
1900 + /* Advance the DMA to the next EP descriptor that is not a DUMMY_EPID.
1901 + * ep->next is already a physical address. virt_to_phys is needed, see
1902 + * http://mhonarc.axis.se/dev-etrax/msg08630.html
1903 + */
1904 + //*R_DMA_CH8_SUB0_EP = ep->next;
1905 + *R_DMA_CH8_SUB0_EP = virt_to_phys(ep);
1906 + /* Restart the DMA */
1907 + *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
1908 + }
1909 + spin_unlock_irqrestore(&etrax_dma8_sub0_lock, flags);
1910 +}
1911 +
1912 +/* queue an URB with the transfer controller (called from hcd_driver) */
1913 +//static int tc_urb_enqueue(struct usb_hcd *hcd,
1914 +// struct usb_host_endpoint *ep,
1915 +// struct urb *urb,
1916 +// gfp_t mem_flags) {
1917 +static int tc_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1918 +{
1919 + int epid;
1920 + int retval;
1921 +// int bustime = 0;
1922 + int maxpacket;
1923 + unsigned long flags;
1924 + struct crisv10_urb_priv *urb_priv;
1925 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
1926 + DBFENTER;
1927 +
1928 + if(!(crisv10_hcd->running)) {
1929 + /* The USB Controller is not running, probably because no device is
1930 + attached. No idea to enqueue URBs then */
1931 + tc_warn("Rejected enqueueing of URB:0x%x because no dev attached\n",
1932 + (unsigned int)urb);
1933 + return -ENOENT;
1934 + }
1935 +
1936 + maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
1937 +
1938 + /* hinko ignore usb_pipeisoc */
1939 +#if 0
1940 + /* Special case check for In Isoc transfers. Specification states that each
1941 + In Isoc transfer consists of one packet and therefore it should fit into
1942 + the transfer-buffer of an URB.
1943 + We do the check here to be sure (an invalid scenario can be produced with
1944 + parameters to the usbtest suite) */
1945 + if(usb_pipeisoc(urb->pipe) && usb_pipein(urb->pipe) &&
1946 + (urb->transfer_buffer_length < maxpacket)) {
1947 + tc_err("Submit In Isoc URB with buffer length:%d to pipe with maxpacketlen: %d\n", urb->transfer_buffer_length, maxpacket);
1948 + return -EMSGSIZE;
1949 + }
1950 +
1951 + /* Check if there is enough bandwidth for periodic transfer */
1952 + if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe)) {
1953 + /* only check (and later claim) if not already claimed */
1954 + if (urb->bandwidth == 0) {
1955 + bustime = usb_check_bandwidth(urb->dev, urb);
1956 + if (bustime < 0) {
1957 + tc_err("Not enough periodic bandwidth\n");
1958 + return -ENOSPC;
1959 + }
1960 + }
1961 + }
1962 +#endif
1963 +
1964 + /* Check if there is a epid for URBs destination, if not this function
1965 + set up one. */
1966 + //epid = tc_setup_epid(ep, urb, mem_flags);
1967 + epid = tc_setup_epid(urb, mem_flags);
1968 + if (epid < 0) {
1969 + tc_err("Failed setup epid:%d for URB:0x%x\n", epid, (unsigned int)urb);
1970 + DBFEXIT;
1971 + return -ENOMEM;
1972 + }
1973 +
1974 + if(urb == activeUrbList[epid]) {
1975 + tc_err("Resubmition of allready active URB:0x%x\n", (unsigned int)urb);
1976 + return -ENXIO;
1977 + }
1978 +
1979 + if(urb_list_entry(urb, epid)) {
1980 + tc_err("Resubmition of allready queued URB:0x%x\n", (unsigned int)urb);
1981 + return -ENXIO;
1982 + }
1983 +
1984 + /* If we actively have flaged endpoint as disabled then refuse submition */
1985 + if(epid_state[epid].disabled) {
1986 + return -ENOENT;
1987 + }
1988 +
1989 + /* Allocate and init HC-private data for URB */
1990 + if(urb_priv_create(hcd, urb, epid, mem_flags) != 0) {
1991 + DBFEXIT;
1992 + return -ENOMEM;
1993 + }
1994 + urb_priv = urb->hcpriv;
1995 +
1996 + tc_dbg("Enqueue URB:0x%x[%d] epid:%d (%s) bufflen:%d\n",
1997 + (unsigned int)urb, urb_priv->urb_num, epid,
1998 + pipe_to_str(urb->pipe), urb->transfer_buffer_length);
1999 +
2000 + /* Create and link SBs required for this URB */
2001 + retval = create_sb_for_urb(urb, mem_flags);
2002 + if(retval != 0) {
2003 + tc_err("Failed to create SBs for URB:0x%x[%d]\n", (unsigned int)urb,
2004 + urb_priv->urb_num);
2005 + urb_priv_free(hcd, urb);
2006 + DBFEXIT;
2007 + return retval;
2008 + }
2009 +
2010 + /* Init intr EP pool if this URB is a INTR transfer. This pool is later
2011 + used when inserting EPs in the TxIntrEPList. We do the alloc here
2012 + so we can't run out of memory later */
2013 + if(usb_pipeint(urb->pipe)) {
2014 + retval = init_intr_urb(urb, mem_flags);
2015 + if(retval != 0) {
2016 + tc_warn("Failed to init Intr URB\n");
2017 + urb_priv_free(hcd, urb);
2018 + DBFEXIT;
2019 + return retval;
2020 + }
2021 + }
2022 +
2023 + /* Disable other access when inserting USB */
2024 +
2025 + /* BUG on sleeping inside int disabled if using local_irq_save/local_irq_restore
2026 + * her - because urb_list_add() and tc_dma_process_queue() save irqs again !??!
2027 + */
2028 +// local_irq_save(flags);
2029 +
2030 + /* hinko ignore usb_pipeisoc */
2031 +#if 0
2032 + /* Claim bandwidth, if needed */
2033 + if(bustime) {
2034 + usb_claim_bandwidth(urb->dev, urb, bustime, 0);
2035 + }
2036 +
2037 + /* Add URB to EP queue */
2038 + urb_list_add(urb, epid, mem_flags);
2039 +
2040 + if(usb_pipeisoc(urb->pipe)) {
2041 + /* Special processing of Isoc URBs. */
2042 + tc_dma_process_isoc_urb(urb);
2043 + } else {
2044 + /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
2045 + tc_dma_process_queue(epid);
2046 + }
2047 +#endif
2048 + /* Add URB to EP queue */
2049 + urb_list_add(urb, epid, mem_flags);
2050 +
2051 + /*hinko link/unlink urb -> ep */
2052 + spin_lock_irqsave(&crisv10_hcd->lock, flags);
2053 + //spin_lock(&crisv10_hcd->lock);
2054 + retval = usb_hcd_link_urb_to_ep(hcd, urb);
2055 + if (retval) {
2056 + spin_unlock_irqrestore(&crisv10_hcd->lock, flags);
2057 + tc_warn("Failed to link urb to ep\n");
2058 + urb_priv_free(hcd, urb);
2059 + DBFEXIT;
2060 + return retval;
2061 + }
2062 + spin_unlock_irqrestore(&crisv10_hcd->lock, flags);
2063 + //spin_unlock(&crisv10_hcd->lock);
2064 +
2065 + /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
2066 + tc_dma_process_queue(epid);
2067 +
2068 +// local_irq_restore(flags);
2069 +
2070 + DBFEXIT;
2071 + return 0;
2072 +}
2073 +
2074 +/* remove an URB from the transfer controller queues (called from hcd_driver)*/
2075 +//static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
2076 +static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2077 +{
2078 + struct crisv10_urb_priv *urb_priv;
2079 + unsigned long flags;
2080 + int epid;
2081 +
2082 + DBFENTER;
2083 + /* Disable interrupts here since a descriptor interrupt for the isoc epid
2084 + will modify the sb list. This could possibly be done more granular, but
2085 + urb_dequeue should not be used frequently anyway.
2086 + */
2087 + local_irq_save(flags);
2088 +
2089 + urb_priv = urb->hcpriv;
2090 +
2091 + if (!urb_priv) {
2092 + /* This happens if a device driver calls unlink on an urb that
2093 + was never submitted (lazy driver) or if the urb was completed
2094 + while dequeue was being called. */
2095 + tc_warn("Dequeing of not enqueued URB:0x%x\n", (unsigned int)urb);
2096 + local_irq_restore(flags);
2097 + return 0;
2098 + }
2099 + epid = urb_priv->epid;
2100 +
2101 + tc_warn("Dequeing %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
2102 + (urb == activeUrbList[epid]) ? "active" : "queued",
2103 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2104 + str_type(urb->pipe), epid, urb->status,
2105 + (urb_priv->later_data) ? "later-sched" : "");
2106 +
2107 + /* For Bulk, Ctrl and Intr are only one URB active at a time. So any URB
2108 + that isn't active can be dequeued by just removing it from the queue */
2109 + if(usb_pipebulk(urb->pipe) || usb_pipecontrol(urb->pipe) ||
2110 + usb_pipeint(urb->pipe)) {
2111 +
2112 + /* Check if URB haven't gone further than the queue */
2113 + if(urb != activeUrbList[epid]) {
2114 + ASSERT(urb_priv->later_data == NULL);
2115 + tc_warn("Dequeing URB:0x%x[%d] (%s %s epid:%d) from queue"
2116 + " (not active)\n", (unsigned int)urb, urb_priv->urb_num,
2117 + str_dir(urb->pipe), str_type(urb->pipe), epid);
2118 +
2119 + /* Finish the URB with error status from USB core */
2120 + tc_finish_urb(hcd, urb, urb->status);
2121 + local_irq_restore(flags);
2122 + return 0;
2123 + }
2124 + }
2125 +
2126 + /* Set URB status to Unlink for handling when interrupt comes. */
2127 + urb_priv->urb_state = UNLINK;
2128 +
2129 + /* Differentiate dequeing of Bulk and Ctrl from Isoc and Intr */
2130 + switch(usb_pipetype(urb->pipe)) {
2131 + case PIPE_BULK:
2132 + /* Check if EP still is enabled */
2133 + if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2134 + /* The EP was enabled, disable it. */
2135 + TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2136 + }
2137 + /* Kicking dummy list out of the party. */
2138 + TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
2139 + break;
2140 + case PIPE_CONTROL:
2141 + /* Check if EP still is enabled */
2142 + if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2143 + /* The EP was enabled, disable it. */
2144 + TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2145 + }
2146 + break;
2147 + case PIPE_ISOCHRONOUS:
2148 + /* Disabling, busy-wait and unlinking of Isoc SBs will be done in
2149 + finish_isoc_urb(). Because there might the case when URB is dequeued
2150 + but there are other valid URBs waiting */
2151 +
2152 + /* Check if In Isoc EP still is enabled */
2153 + if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2154 + /* The EP was enabled, disable it. */
2155 + TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2156 + }
2157 + break;
2158 + case PIPE_INTERRUPT:
2159 + /* Special care is taken for interrupt URBs. EPs are unlinked in
2160 + tc_finish_urb */
2161 + break;
2162 + default:
2163 + break;
2164 + }
2165 +
2166 + /* Asynchronous unlink, finish the URB later from scheduled or other
2167 + event (data finished, error) */
2168 + tc_finish_urb_later(hcd, urb, urb->status);
2169 +
2170 + local_irq_restore(flags);
2171 + DBFEXIT;
2172 + return 0;
2173 +}
2174 +
2175 +
2176 +static void tc_sync_finish_epid(struct usb_hcd *hcd, int epid) {
2177 + volatile int timeout = 10000;
2178 + struct urb* urb;
2179 + struct crisv10_urb_priv* urb_priv;
2180 + unsigned long flags;
2181 +
2182 + volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
2183 + volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
2184 + volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
2185 +
2186 + int type = epid_state[epid].type;
2187 +
2188 + /* Setting this flag will cause enqueue() to return -ENOENT for new
2189 + submitions on this endpoint and finish_urb() wont process queue further */
2190 + epid_state[epid].disabled = 1;
2191 +
2192 + switch(type) {
2193 + case PIPE_BULK:
2194 + /* Check if EP still is enabled */
2195 + if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2196 + /* The EP was enabled, disable it. */
2197 + TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2198 + tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
2199 +
2200 + /* Do busy-wait until DMA not using this EP descriptor anymore */
2201 + while((*R_DMA_CH8_SUB0_EP ==
2202 + virt_to_phys(&TxBulkEPList[epid])) &&
2203 + (timeout-- > 0));
2204 + if(timeout == 0) {
2205 + warn("Timeout while waiting for DMA-TX-Bulk to leave EP for"
2206 + " epid:%d\n", epid);
2207 + }
2208 + }
2209 + break;
2210 +
2211 + case PIPE_CONTROL:
2212 + /* Check if EP still is enabled */
2213 + if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2214 + /* The EP was enabled, disable it. */
2215 + TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2216 + tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
2217 +
2218 + /* Do busy-wait until DMA not using this EP descriptor anymore */
2219 + while((*R_DMA_CH8_SUB1_EP ==
2220 + virt_to_phys(&TxCtrlEPList[epid])) &&
2221 + (timeout-- > 0));
2222 + if(timeout == 0) {
2223 + warn("Timeout while waiting for DMA-TX-Ctrl to leave EP for"
2224 + " epid:%d\n", epid);
2225 + }
2226 + }
2227 + break;
2228 +
2229 + case PIPE_INTERRUPT:
2230 + local_irq_save(flags);
2231 + /* Disable all Intr EPs belonging to epid */
2232 + first_ep = &TxIntrEPList[0];
2233 + curr_ep = first_ep;
2234 + do {
2235 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
2236 + if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
2237 + /* Disable EP */
2238 + next_ep->command &= ~IO_MASK(USB_EP_command, enable);
2239 + }
2240 + curr_ep = phys_to_virt(curr_ep->next);
2241 + } while (curr_ep != first_ep);
2242 +
2243 + local_irq_restore(flags);
2244 + break;
2245 +
2246 + case PIPE_ISOCHRONOUS:
2247 + /* Check if EP still is enabled */
2248 + if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2249 + tc_warn("sync_finish: Disabling Isoc EP for epid:%d\n", epid);
2250 + /* The EP was enabled, disable it. */
2251 + TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2252 +
2253 + while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
2254 + (timeout-- > 0));
2255 + if(timeout == 0) {
2256 + warn("Timeout while waiting for DMA-TX-Isoc to leave EP for"
2257 + " epid:%d\n", epid);
2258 + }
2259 + }
2260 + break;
2261 + }
2262 +
2263 + local_irq_save(flags);
2264 +
2265 + /* Finish if there is active URB for this endpoint */
2266 + if(activeUrbList[epid] != NULL) {
2267 + urb = activeUrbList[epid];
2268 + urb_priv = urb->hcpriv;
2269 + ASSERT(urb_priv);
2270 + tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
2271 + (urb == activeUrbList[epid]) ? "active" : "queued",
2272 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2273 + str_type(urb->pipe), epid, urb->status,
2274 + (urb_priv->later_data) ? "later-sched" : "");
2275 +
2276 + tc_finish_urb(hcd, activeUrbList[epid], -ENOENT);
2277 + ASSERT(activeUrbList[epid] == NULL);
2278 + }
2279 +
2280 + /* Finish any queued URBs for this endpoint. There won't be any resubmitions
2281 + because epid_disabled causes enqueue() to fail for this endpoint */
2282 + while((urb = urb_list_first(epid)) != NULL) {
2283 + urb_priv = urb->hcpriv;
2284 + ASSERT(urb_priv);
2285 +
2286 + tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
2287 + (urb == activeUrbList[epid]) ? "active" : "queued",
2288 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2289 + str_type(urb->pipe), epid, urb->status,
2290 + (urb_priv->later_data) ? "later-sched" : "");
2291 +
2292 + tc_finish_urb(hcd, urb, -ENOENT);
2293 + }
2294 + epid_state[epid].disabled = 0;
2295 + local_irq_restore(flags);
2296 +}
2297 +
2298 +/* free resources associated with an endpoint (called from hcd_driver) */
2299 +static void tc_endpoint_disable(struct usb_hcd *hcd,
2300 + struct usb_host_endpoint *ep) {
2301 + DBFENTER;
2302 + /* Only free epid if it has been allocated. We get two endpoint_disable
2303 + requests for ctrl endpoints so ignore the second one */
2304 + if(ep->hcpriv != NULL) {
2305 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2306 + int epid = ep_priv->epid;
2307 + tc_warn("endpoint_disable ep:0x%x ep-priv:0x%x (%s) (epid:%d freed)\n",
2308 + (unsigned int)ep, (unsigned int)ep->hcpriv,
2309 + endpoint_to_str(&(ep->desc)), epid);
2310 +
2311 + tc_sync_finish_epid(hcd, epid);
2312 +
2313 + ASSERT(activeUrbList[epid] == NULL);
2314 + ASSERT(list_empty(&urb_list[epid]));
2315 +
2316 + tc_free_epid(ep);
2317 + } else {
2318 + tc_dbg("endpoint_disable ep:0x%x ep-priv:0x%x (%s)\n", (unsigned int)ep,
2319 + (unsigned int)ep->hcpriv, endpoint_to_str(&(ep->desc)));
2320 + }
2321 + DBFEXIT;
2322 +}
2323 +
2324 +//static void tc_finish_urb_later_proc(void *data) {
2325 +static void tc_finish_urb_later_proc(struct work_struct *work) {
2326 + unsigned long flags;
2327 + //struct urb_later_data* uld = (struct urb_later_data*)data;
2328 + struct urb_later_data* uld = container_of(work, struct urb_later_data, ws.work);
2329 + local_irq_save(flags);
2330 + if(uld->urb == NULL) {
2331 + late_dbg("Later finish of URB = NULL (allready finished)\n");
2332 + } else {
2333 + struct crisv10_urb_priv* urb_priv = uld->urb->hcpriv;
2334 + ASSERT(urb_priv);
2335 + if(urb_priv->urb_num == uld->urb_num) {
2336 + late_dbg("Later finish of URB:0x%x[%d]\n", (unsigned int)(uld->urb),
2337 + urb_priv->urb_num);
2338 + if(uld->status != uld->urb->status) {
2339 + errno_dbg("Later-finish URB with status:%d, later-status:%d\n",
2340 + uld->urb->status, uld->status);
2341 + }
2342 + if(uld != urb_priv->later_data) {
2343 + panic("Scheduled uld not same as URBs uld\n");
2344 + }
2345 + tc_finish_urb(uld->hcd, uld->urb, uld->status);
2346 + } else {
2347 + late_warn("Ignoring later finish of URB:0x%x[%d]"
2348 + ", urb_num doesn't match current URB:0x%x[%d]",
2349 + (unsigned int)(uld->urb), uld->urb_num,
2350 + (unsigned int)(uld->urb), urb_priv->urb_num);
2351 + }
2352 + }
2353 + local_irq_restore(flags);
2354 + kmem_cache_free(later_data_cache, uld);
2355 +}
2356 +
2357 +static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
2358 + int status) {
2359 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2360 + struct urb_later_data* uld;
2361 +
2362 + ASSERT(urb_priv);
2363 +
2364 + if(urb_priv->later_data != NULL) {
2365 + /* Later-finish allready scheduled for this URB, just update status to
2366 + return when finishing later */
2367 + errno_dbg("Later-finish schedule change URB status:%d with new"
2368 + " status:%d\n", urb_priv->later_data->status, status);
2369 +
2370 + urb_priv->later_data->status = status;
2371 + return;
2372 + }
2373 +
2374 + uld = kmem_cache_alloc(later_data_cache, GFP_ATOMIC);
2375 + ASSERT(uld);
2376 +
2377 + uld->hcd = hcd;
2378 + uld->urb = urb;
2379 + uld->urb_num = urb_priv->urb_num;
2380 + uld->status = status;
2381 +
2382 + //INIT_WORK(&uld->ws, tc_finish_urb_later_proc, uld);
2383 + INIT_DELAYED_WORK(&uld->ws, tc_finish_urb_later_proc);
2384 + urb_priv->later_data = uld;
2385 +
2386 + /* Schedule the finishing of the URB to happen later */
2387 + schedule_delayed_work(&uld->ws, LATER_TIMER_DELAY);
2388 +}
2389 +
2390 + /* hinko ignore usb_pipeisoc */
2391 +#if 0
2392 +static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
2393 + int status);
2394 +#endif
2395 +
2396 +static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status) {
2397 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
2398 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2399 + int epid;
2400 + char toggle;
2401 + int urb_num;
2402 +
2403 + DBFENTER;
2404 + ASSERT(urb_priv != NULL);
2405 + epid = urb_priv->epid;
2406 + urb_num = urb_priv->urb_num;
2407 +
2408 + if(urb != activeUrbList[epid]) {
2409 + if(urb_list_entry(urb, epid)) {
2410 + /* Remove this URB from the list. Only happens when URB are finished
2411 + before having been processed (dequeing) */
2412 + urb_list_del(urb, epid);
2413 + } else {
2414 + tc_warn("Finishing of URB:0x%x[%d] neither active or in queue for"
2415 + " epid:%d\n", (unsigned int)urb, urb_num, epid);
2416 + }
2417 + }
2418 +
2419 + /* Cancel any pending later-finish of this URB */
2420 + if(urb_priv->later_data) {
2421 + urb_priv->later_data->urb = NULL;
2422 + }
2423 +
2424 + /* For an IN pipe, we always set the actual length, regardless of whether
2425 + there was an error or not (which means the device driver can use the data
2426 + if it wants to). */
2427 + if(usb_pipein(urb->pipe)) {
2428 + urb->actual_length = urb_priv->rx_offset;
2429 + } else {
2430 + /* Set actual_length for OUT urbs also; the USB mass storage driver seems
2431 + to want that. */
2432 + if (status == 0 && urb->status == -EINPROGRESS) {
2433 + urb->actual_length = urb->transfer_buffer_length;
2434 + } else {
2435 + /* We wouldn't know of any partial writes if there was an error. */
2436 + urb->actual_length = 0;
2437 + }
2438 + }
2439 +
2440 +
2441 + /* URB status mangling */
2442 + if(urb->status == -EINPROGRESS) {
2443 + /* The USB core hasn't changed the status, let's set our finish status */
2444 + urb->status = status;
2445 +
2446 + if ((status == 0) && (urb->transfer_flags & URB_SHORT_NOT_OK) &&
2447 + usb_pipein(urb->pipe) &&
2448 + (urb->actual_length != urb->transfer_buffer_length)) {
2449 + /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's
2450 + max length) is to be treated as an error. */
2451 + errno_dbg("Finishing URB:0x%x[%d] with SHORT_NOT_OK flag and short"
2452 + " data:%d\n", (unsigned int)urb, urb_num,
2453 + urb->actual_length);
2454 + urb->status = -EREMOTEIO;
2455 + }
2456 +
2457 + if(urb_priv->urb_state == UNLINK) {
2458 + /* URB has been requested to be unlinked asynchronously */
2459 + urb->status = -ECONNRESET;
2460 + errno_dbg("Fixing unlink status of URB:0x%x[%d] to:%d\n",
2461 + (unsigned int)urb, urb_num, urb->status);
2462 + }
2463 + } else {
2464 + /* The USB Core wants to signal some error via the URB, pass it through */
2465 + }
2466 +
2467 + /* hinko ignore usb_pipeisoc */
2468 +#if 0
2469 + /* use completely different finish function for Isoc URBs */
2470 + if(usb_pipeisoc(urb->pipe)) {
2471 + tc_finish_isoc_urb(hcd, urb, status);
2472 + return;
2473 + }
2474 +#endif
2475 +
2476 + /* Do special unlinking of EPs for Intr traffic */
2477 + if(usb_pipeint(urb->pipe)) {
2478 + tc_dma_unlink_intr_urb(urb);
2479 + }
2480 +
2481 + /* hinko ignore usb_pipeisoc */
2482 +#if 0
2483 + /* Release allocated bandwidth for periodic transfers */
2484 + if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe))
2485 + usb_release_bandwidth(urb->dev, urb, 0);
2486 +#endif
2487 +
2488 + /* This URB is active on EP */
2489 + if(urb == activeUrbList[epid]) {
2490 + /* We need to fiddle with the toggle bits because the hardware doesn't do
2491 + it for us. */
2492 + toggle = etrax_epid_get_toggle(epid, usb_pipeout(urb->pipe));
2493 + usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
2494 + usb_pipeout(urb->pipe), toggle);
2495 +
2496 + /* Checks for Ctrl and Bulk EPs */
2497 + switch(usb_pipetype(urb->pipe)) {
2498 + case PIPE_BULK:
2499 + /* Check so Bulk EP realy is disabled before finishing active URB */
2500 + ASSERT((TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
2501 + IO_STATE(USB_EP_command, enable, no));
2502 + /* Disable sub-pointer for EP to avoid next tx_interrupt() to
2503 + process Bulk EP. */
2504 + TxBulkEPList[epid].sub = 0;
2505 + /* No need to wait for the DMA before changing the next pointer.
2506 + The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
2507 + the last one (INVALID_EPID) for actual traffic. */
2508 + TxBulkEPList[epid].next =
2509 + virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
2510 + break;
2511 + case PIPE_CONTROL:
2512 + /* Check so Ctrl EP realy is disabled before finishing active URB */
2513 + ASSERT((TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
2514 + IO_STATE(USB_EP_command, enable, no));
2515 + /* Disable sub-pointer for EP to avoid next tx_interrupt() to
2516 + process Ctrl EP. */
2517 + TxCtrlEPList[epid].sub = 0;
2518 + break;
2519 + }
2520 + }
2521 +
2522 + /* Free HC-private URB data*/
2523 + urb_priv_free(hcd, urb);
2524 +
2525 + if(urb->status) {
2526 + errno_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
2527 + (unsigned int)urb, urb_num, str_dir(urb->pipe),
2528 + str_type(urb->pipe), urb->actual_length, urb->status);
2529 + } else {
2530 + tc_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
2531 + (unsigned int)urb, urb_num, str_dir(urb->pipe),
2532 + str_type(urb->pipe), urb->actual_length, urb->status);
2533 + }
2534 +
2535 + /* If we just finished an active URB, clear active pointer. */
2536 + if (urb == activeUrbList[epid]) {
2537 + /* Make URB not active on EP anymore */
2538 + activeUrbList[epid] = NULL;
2539 +
2540 + if(urb->status == 0) {
2541 + /* URB finished sucessfully, process queue to see if there are any more
2542 + URBs waiting before we call completion function.*/
2543 + if(crisv10_hcd->running) {
2544 + /* Only process queue if USB controller is running */
2545 + tc_dma_process_queue(epid);
2546 + } else {
2547 + tc_warn("No processing of queue for epid:%d, USB Controller not"
2548 + " running\n", epid);
2549 + }
2550 + }
2551 + }
2552 +
2553 + /* Hand the URB from HCD to its USB device driver, using its completion
2554 + functions */
2555 +// usb_hcd_giveback_urb (hcd, urb);
2556 + /**
2557 + * usb_hcd_unlink_urb_from_ep - remove an URB from its endpoint queue
2558 + * @hcd: host controller to which @urb was submitted
2559 + * @urb: URB being unlinked
2560 + *
2561 + * Host controller drivers should call this routine before calling
2562 + * usb_hcd_giveback_urb(). The HCD's private spinlock must be held and
2563 + * interrupts must be disabled. The actions carried out here are required
2564 + * for URB completion.
2565 + */
2566 +
2567 + /*hinko link/unlink urb -> ep */
2568 + //spin_lock(&crisv10_hcd->lock);
2569 + unsigned long flags;
2570 + spin_lock_irqsave(&crisv10_hcd->lock, flags);
2571 + usb_hcd_unlink_urb_from_ep(hcd, urb);
2572 + usb_hcd_giveback_urb(hcd, urb, status);
2573 + //spin_unlock(&crisv10_hcd->lock);
2574 + spin_unlock_irqrestore(&crisv10_hcd->lock, flags);
2575 +
2576 + /* Check the queue once more if the URB returned with error, because we
2577 + didn't do it before the completion function because the specification
2578 + states that the queue should not restart until all it's unlinked
2579 + URBs have been fully retired, with the completion functions run */
2580 + if(crisv10_hcd->running) {
2581 + /* Only process queue if USB controller is running */
2582 + tc_dma_process_queue(epid);
2583 + } else {
2584 + tc_warn("No processing of queue for epid:%d, USB Controller not running\n",
2585 + epid);
2586 + }
2587 +
2588 + DBFEXIT;
2589 +}
2590 +
2591 + /* hinko ignore usb_pipeisoc */
2592 +#if 0
2593 +static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
2594 + int status) {
2595 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2596 + int epid, i;
2597 + volatile int timeout = 10000;
2598 +
2599 + ASSERT(urb_priv);
2600 + epid = urb_priv->epid;
2601 +
2602 + ASSERT(usb_pipeisoc(urb->pipe));
2603 +
2604 + /* Set that all isoc packets have status and length set before
2605 + completing the urb. */
2606 + for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++){
2607 + urb->iso_frame_desc[i].actual_length = 0;
2608 + urb->iso_frame_desc[i].status = -EPROTO;
2609 + }
2610 +
2611 + /* Check if the URB is currently active (done or error) */
2612 + if(urb == activeUrbList[epid]) {
2613 + /* Check if there are another In Isoc URB queued for this epid */
2614 + if (!list_empty(&urb_list[epid])&& !epid_state[epid].disabled) {
2615 + /* Move it from queue to active and mark it started so Isoc transfers
2616 + won't be interrupted.
2617 + All Isoc URBs data transfers are already added to DMA lists so we
2618 + don't have to insert anything in DMA lists here. */
2619 + activeUrbList[epid] = urb_list_first(epid);
2620 + ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_state =
2621 + STARTED;
2622 + urb_list_del(activeUrbList[epid], epid);
2623 +
2624 + if(urb->status) {
2625 + errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
2626 + " status:%d, new waiting URB:0x%x[%d]\n",
2627 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2628 + str_type(urb->pipe), urb_priv->isoc_packet_counter,
2629 + urb->number_of_packets, urb->status,
2630 + (unsigned int)activeUrbList[epid],
2631 + ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_num);
2632 + }
2633 +
2634 + } else { /* No other URB queued for this epid */
2635 + if(urb->status) {
2636 + errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
2637 + " status:%d, no new URB waiting\n",
2638 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2639 + str_type(urb->pipe), urb_priv->isoc_packet_counter,
2640 + urb->number_of_packets, urb->status);
2641 + }
2642 +
2643 + /* Check if EP is still enabled, then shut it down. */
2644 + if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2645 + isoc_dbg("Isoc EP enabled for epid:%d, disabling it\n", epid);
2646 +
2647 + /* Should only occur for In Isoc EPs where SB isn't consumed. */
2648 + ASSERT(usb_pipein(urb->pipe));
2649 +
2650 + /* Disable it and wait for it to stop */
2651 + TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2652 +
2653 + /* Ah, the luxury of busy-wait. */
2654 + while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
2655 + (timeout-- > 0));
2656 + if(timeout == 0) {
2657 + warn("Timeout while waiting for DMA-TX-Isoc to leave EP for epid:%d\n", epid);
2658 + }
2659 + }
2660 +
2661 + /* Unlink SB to say that epid is finished. */
2662 + TxIsocEPList[epid].sub = 0;
2663 + TxIsocEPList[epid].hw_len = 0;
2664 +
2665 + /* No URB active for EP anymore */
2666 + activeUrbList[epid] = NULL;
2667 + }
2668 + } else { /* Finishing of not active URB (queued up with SBs thought) */
2669 + isoc_warn("finish_isoc_urb (URB:0x%x %s) (%d of %d packets) status:%d,"
2670 + " SB queued but not active\n",
2671 + (unsigned int)urb, str_dir(urb->pipe),
2672 + urb_priv->isoc_packet_counter, urb->number_of_packets,
2673 + urb->status);
2674 + if(usb_pipeout(urb->pipe)) {
2675 + /* Finishing of not yet active Out Isoc URB needs unlinking of SBs. */
2676 + struct USB_SB_Desc *iter_sb, *prev_sb, *next_sb;
2677 +
2678 + iter_sb = TxIsocEPList[epid].sub ?
2679 + phys_to_virt(TxIsocEPList[epid].sub) : 0;
2680 + prev_sb = 0;
2681 +
2682 + /* SB that is linked before this URBs first SB */
2683 + while (iter_sb && (iter_sb != urb_priv->first_sb)) {
2684 + prev_sb = iter_sb;
2685 + iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
2686 + }
2687 +
2688 + if (iter_sb == 0) {
2689 + /* Unlink of the URB currently being transmitted. */
2690 + prev_sb = 0;
2691 + iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
2692 + }
2693 +
2694 + while (iter_sb && (iter_sb != urb_priv->last_sb)) {
2695 + iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
2696 + }
2697 +
2698 + if (iter_sb) {
2699 + next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
2700 + } else {
2701 + /* This should only happen if the DMA has completed
2702 + processing the SB list for this EP while interrupts
2703 + are disabled. */
2704 + isoc_dbg("Isoc urb not found, already sent?\n");
2705 + next_sb = 0;
2706 + }
2707 + if (prev_sb) {
2708 + prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
2709 + } else {
2710 + TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
2711 + }
2712 + }
2713 + }
2714 +
2715 + /* Free HC-private URB data*/
2716 + urb_priv_free(hcd, urb);
2717 +
2718 + usb_release_bandwidth(urb->dev, urb, 0);
2719 +
2720 + /* Hand the URB from HCD to its USB device driver, using its completion
2721 + functions */
2722 + usb_hcd_giveback_urb (hcd, urb);
2723 +}
2724 +#endif
2725 +
2726 +static __u32 urb_num = 0;
2727 +
2728 +/* allocate and initialize URB private data */
2729 +static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
2730 + int mem_flags) {
2731 + struct crisv10_urb_priv *urb_priv;
2732 +
2733 + urb_priv = kmalloc(sizeof *urb_priv, mem_flags);
2734 + if (!urb_priv)
2735 + return -ENOMEM;
2736 + memset(urb_priv, 0, sizeof *urb_priv);
2737 +
2738 + urb_priv->epid = epid;
2739 + urb_priv->urb_state = NOT_STARTED;
2740 +
2741 + urb->hcpriv = urb_priv;
2742 + /* Assign URB a sequence number, and increment counter */
2743 + urb_priv->urb_num = urb_num;
2744 + urb_num++;
2745 + return 0;
2746 +}
2747 +
2748 +/* free URB private data */
2749 +static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb) {
2750 + int i;
2751 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2752 + ASSERT(urb_priv != 0);
2753 +
2754 + /* Check it has any SBs linked that needs to be freed*/
2755 + if(urb_priv->first_sb != NULL) {
2756 + struct USB_SB_Desc *next_sb, *first_sb, *last_sb;
2757 + int i = 0;
2758 + first_sb = urb_priv->first_sb;
2759 + last_sb = urb_priv->last_sb;
2760 + ASSERT(last_sb);
2761 + while(first_sb != last_sb) {
2762 + next_sb = (struct USB_SB_Desc *)phys_to_virt(first_sb->next);
2763 + kmem_cache_free(usb_desc_cache, first_sb);
2764 + first_sb = next_sb;
2765 + i++;
2766 + }
2767 + kmem_cache_free(usb_desc_cache, last_sb);
2768 + i++;
2769 + }
2770 +
2771 + /* Check if it has any EPs in its Intr pool that also needs to be freed */
2772 + if(urb_priv->intr_ep_pool_length > 0) {
2773 + for(i = 0; i < urb_priv->intr_ep_pool_length; i++) {
2774 + kfree(urb_priv->intr_ep_pool[i]);
2775 + }
2776 + /*
2777 + tc_dbg("Freed %d EPs from URB:0x%x EP pool\n",
2778 + urb_priv->intr_ep_pool_length, (unsigned int)urb);
2779 + */
2780 + }
2781 +
2782 + kfree(urb_priv);
2783 + urb->hcpriv = NULL;
2784 +}
2785 +
2786 +static int ep_priv_create(struct usb_host_endpoint *ep, int mem_flags) {
2787 + struct crisv10_ep_priv *ep_priv;
2788 +
2789 + ep_priv = kmalloc(sizeof *ep_priv, mem_flags);
2790 + if (!ep_priv)
2791 + return -ENOMEM;
2792 + memset(ep_priv, 0, sizeof *ep_priv);
2793 +
2794 + ep->hcpriv = ep_priv;
2795 + return 0;
2796 +}
2797 +
2798 +static void ep_priv_free(struct usb_host_endpoint *ep) {
2799 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2800 + ASSERT(ep_priv);
2801 + kfree(ep_priv);
2802 + ep->hcpriv = NULL;
2803 +}
2804 +
2805 +/* EPID handling functions, managing EP-list in Etrax through wrappers */
2806 +/* ------------------------------------------------------------------- */
2807 +
2808 +/* Sets up a new EPID for an endpoint or returns existing if found */
2809 +//static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
2810 +// int mem_flags) {
2811 +static int tc_setup_epid(struct urb *urb, int mem_flags)
2812 +{
2813 + int epid;
2814 + char devnum, endpoint, out_traffic, slow;
2815 + int maxlen;
2816 + __u32 epid_data;
2817 + struct usb_host_endpoint *ep = urb->ep;
2818 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2819 +
2820 + DBFENTER;
2821 +
2822 + /* Check if a valid epid already is setup for this endpoint */
2823 + if(ep_priv != NULL) {
2824 + return ep_priv->epid;
2825 + }
2826 +
2827 + /* We must find and initiate a new epid for this urb. */
2828 + epid = tc_allocate_epid();
2829 +
2830 + if (epid == -1) {
2831 + /* Failed to allocate a new epid. */
2832 + DBFEXIT;
2833 + return epid;
2834 + }
2835 +
2836 + /* We now have a new epid to use. Claim it. */
2837 + epid_state[epid].inuse = 1;
2838 +
2839 + /* Init private data for new endpoint */
2840 + if(ep_priv_create(ep, mem_flags) != 0) {
2841 + return -ENOMEM;
2842 + }
2843 + ep_priv = ep->hcpriv;
2844 + ep_priv->epid = epid;
2845 +
2846 + devnum = usb_pipedevice(urb->pipe);
2847 + endpoint = usb_pipeendpoint(urb->pipe);
2848 + slow = (urb->dev->speed == USB_SPEED_LOW);
2849 + maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
2850 +
2851 + if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
2852 + /* We want both IN and OUT control traffic to be put on the same
2853 + EP/SB list. */
2854 + out_traffic = 1;
2855 + } else {
2856 + out_traffic = usb_pipeout(urb->pipe);
2857 + }
2858 +
2859 + if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
2860 + epid_data = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
2861 + /* FIXME: Change any to the actual port? */
2862 + IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
2863 + IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
2864 + IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
2865 + IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
2866 + etrax_epid_iso_set(epid, epid_data);
2867 + } else {
2868 + epid_data = IO_STATE(R_USB_EPT_DATA, valid, yes) |
2869 + IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
2870 + /* FIXME: Change any to the actual port? */
2871 + IO_STATE(R_USB_EPT_DATA, port, any) |
2872 + IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
2873 + IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
2874 + IO_FIELD(R_USB_EPT_DATA, dev, devnum);
2875 + etrax_epid_set(epid, epid_data);
2876 + }
2877 +
2878 + epid_state[epid].out_traffic = out_traffic;
2879 + epid_state[epid].type = usb_pipetype(urb->pipe);
2880 +
2881 + tc_warn("Setting up ep:0x%x epid:%d (addr:%d endp:%d max_len:%d %s %s %s)\n",
2882 + (unsigned int)ep, epid, devnum, endpoint, maxlen,
2883 + str_type(urb->pipe), out_traffic ? "out" : "in",
2884 + slow ? "low" : "full");
2885 +
2886 + /* Enable Isoc eof interrupt if we set up the first Isoc epid */
2887 + if(usb_pipeisoc(urb->pipe)) {
2888 + isoc_epid_counter++;
2889 + if(isoc_epid_counter == 1) {
2890 + isoc_warn("Enabled Isoc eof interrupt\n");
2891 + *R_USB_IRQ_MASK_SET |= IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
2892 + }
2893 + }
2894 +
2895 + DBFEXIT;
2896 + return epid;
2897 +}
2898 +
2899 +static void tc_free_epid(struct usb_host_endpoint *ep) {
2900 + unsigned long flags;
2901 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2902 + int epid;
2903 + volatile int timeout = 10000;
2904 +
2905 + DBFENTER;
2906 +
2907 + if (ep_priv == NULL) {
2908 + tc_warn("Trying to free unused epid on ep:0x%x\n", (unsigned int)ep);
2909 + DBFEXIT;
2910 + return;
2911 + }
2912 +
2913 + epid = ep_priv->epid;
2914 +
2915 + /* Disable Isoc eof interrupt if we free the last Isoc epid */
2916 + if(epid_isoc(epid)) {
2917 + ASSERT(isoc_epid_counter > 0);
2918 + isoc_epid_counter--;
2919 + if(isoc_epid_counter == 0) {
2920 + *R_USB_IRQ_MASK_SET &= ~IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
2921 + isoc_warn("Disabled Isoc eof interrupt\n");
2922 + }
2923 + }
2924 +
2925 + /* Take lock manualy instead of in epid_x_x wrappers,
2926 + because we need to be polling here */
2927 + spin_lock_irqsave(&etrax_epid_lock, flags);
2928 +
2929 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
2930 + nop();
2931 + while((*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) &&
2932 + (timeout-- > 0));
2933 + if(timeout == 0) {
2934 + warn("Timeout while waiting for epid:%d to drop hold\n", epid);
2935 + }
2936 + /* This will, among other things, set the valid field to 0. */
2937 + *R_USB_EPT_DATA = 0;
2938 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
2939 +
2940 + /* Free resource in software state info list */
2941 + epid_state[epid].inuse = 0;
2942 +
2943 + /* Free private endpoint data */
2944 + ep_priv_free(ep);
2945 +
2946 + DBFEXIT;
2947 +}
2948 +
2949 +static int tc_allocate_epid(void) {
2950 + int i;
2951 + DBFENTER;
2952 + for (i = 0; i < NBR_OF_EPIDS; i++) {
2953 + if (!epid_inuse(i)) {
2954 + DBFEXIT;
2955 + return i;
2956 + }
2957 + }
2958 +
2959 + tc_warn("Found no free epids\n");
2960 + DBFEXIT;
2961 + return -1;
2962 +}
2963 +
2964 +
2965 +/* Wrappers around the list functions (include/linux/list.h). */
2966 +/* ---------------------------------------------------------- */
2967 +static inline int __urb_list_empty(int epid) {
2968 + int retval;
2969 + retval = list_empty(&urb_list[epid]);
2970 + return retval;
2971 +}
2972 +
2973 +/* Returns first urb for this epid, or NULL if list is empty. */
2974 +static inline struct urb *urb_list_first(int epid) {
2975 + unsigned long flags;
2976 + struct urb *first_urb = 0;
2977 + spin_lock_irqsave(&urb_list_lock, flags);
2978 + if (!__urb_list_empty(epid)) {
2979 + /* Get the first urb (i.e. head->next). */
2980 + urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
2981 + first_urb = urb_entry->urb;
2982 + }
2983 + spin_unlock_irqrestore(&urb_list_lock, flags);
2984 + return first_urb;
2985 +}
2986 +
2987 +/* Adds an urb_entry last in the list for this epid. */
2988 +static inline void urb_list_add(struct urb *urb, int epid, int mem_flags) {
2989 + unsigned long flags;
2990 + urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), mem_flags);
2991 + ASSERT(urb_entry);
2992 +
2993 + urb_entry->urb = urb;
2994 + spin_lock_irqsave(&urb_list_lock, flags);
2995 + list_add_tail(&urb_entry->list, &urb_list[epid]);
2996 + spin_unlock_irqrestore(&urb_list_lock, flags);
2997 +}
2998 +
2999 +/* Search through the list for an element that contains this urb. (The list
3000 + is expected to be short and the one we are about to delete will often be
3001 + the first in the list.)
3002 + Should be protected by spin_locks in calling function */
3003 +static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid) {
3004 + struct list_head *entry;
3005 + struct list_head *tmp;
3006 + urb_entry_t *urb_entry;
3007 +
3008 + list_for_each_safe(entry, tmp, &urb_list[epid]) {
3009 + urb_entry = list_entry(entry, urb_entry_t, list);
3010 + ASSERT(urb_entry);
3011 + ASSERT(urb_entry->urb);
3012 +
3013 + if (urb_entry->urb == urb) {
3014 + return urb_entry;
3015 + }
3016 + }
3017 + return 0;
3018 +}
3019 +
3020 +/* Same function as above but for global use. Protects list by spinlock */
3021 +static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid) {
3022 + unsigned long flags;
3023 + urb_entry_t *urb_entry;
3024 + spin_lock_irqsave(&urb_list_lock, flags);
3025 + urb_entry = __urb_list_entry(urb, epid);
3026 + spin_unlock_irqrestore(&urb_list_lock, flags);
3027 + return (urb_entry);
3028 +}
3029 +
3030 +/* Delete an urb from the list. */
3031 +static inline void urb_list_del(struct urb *urb, int epid) {
3032 + unsigned long flags;
3033 + urb_entry_t *urb_entry;
3034 +
3035 + /* Delete entry and free. */
3036 + spin_lock_irqsave(&urb_list_lock, flags);
3037 + urb_entry = __urb_list_entry(urb, epid);
3038 + ASSERT(urb_entry);
3039 +
3040 + list_del(&urb_entry->list);
3041 + spin_unlock_irqrestore(&urb_list_lock, flags);
3042 + kfree(urb_entry);
3043 +}
3044 +
3045 +/* Move an urb to the end of the list. */
3046 +static inline void urb_list_move_last(struct urb *urb, int epid) {
3047 + unsigned long flags;
3048 + urb_entry_t *urb_entry;
3049 +
3050 + spin_lock_irqsave(&urb_list_lock, flags);
3051 + urb_entry = __urb_list_entry(urb, epid);
3052 + ASSERT(urb_entry);
3053 +
3054 + list_del(&urb_entry->list);
3055 + list_add_tail(&urb_entry->list, &urb_list[epid]);
3056 + spin_unlock_irqrestore(&urb_list_lock, flags);
3057 +}
3058 +
3059 +/* Get the next urb in the list. */
3060 +static inline struct urb *urb_list_next(struct urb *urb, int epid) {
3061 + unsigned long flags;
3062 + urb_entry_t *urb_entry;
3063 +
3064 + spin_lock_irqsave(&urb_list_lock, flags);
3065 + urb_entry = __urb_list_entry(urb, epid);
3066 + ASSERT(urb_entry);
3067 +
3068 + if (urb_entry->list.next != &urb_list[epid]) {
3069 + struct list_head *elem = urb_entry->list.next;
3070 + urb_entry = list_entry(elem, urb_entry_t, list);
3071 + spin_unlock_irqrestore(&urb_list_lock, flags);
3072 + return urb_entry->urb;
3073 + } else {
3074 + spin_unlock_irqrestore(&urb_list_lock, flags);
3075 + return NULL;
3076 + }
3077 +}
3078 +
3079 +struct USB_EP_Desc* create_ep(int epid, struct USB_SB_Desc* sb_desc,
3080 + int mem_flags) {
3081 + struct USB_EP_Desc *ep_desc;
3082 + ep_desc = (struct USB_EP_Desc *) kmem_cache_alloc(usb_desc_cache, mem_flags);
3083 + if(ep_desc == NULL)
3084 + return NULL;
3085 + memset(ep_desc, 0, sizeof(struct USB_EP_Desc));
3086 +
3087 + ep_desc->hw_len = 0;
3088 + ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
3089 + IO_STATE(USB_EP_command, enable, yes));
3090 + if(sb_desc == NULL) {
3091 + ep_desc->sub = 0;
3092 + } else {
3093 + ep_desc->sub = virt_to_phys(sb_desc);
3094 + }
3095 + return ep_desc;
3096 +}
3097 +
3098 +#define TT_ZOUT 0
3099 +#define TT_IN 1
3100 +#define TT_OUT 2
3101 +#define TT_SETUP 3
3102 +
3103 +#define CMD_EOL IO_STATE(USB_SB_command, eol, yes)
3104 +#define CMD_INTR IO_STATE(USB_SB_command, intr, yes)
3105 +#define CMD_FULL IO_STATE(USB_SB_command, full, yes)
3106 +
3107 +/* Allocation and setup of a generic SB. Used to create SETUP, OUT and ZOUT
3108 + SBs. Also used by create_sb_in() to avoid same allocation procedure at two
3109 + places */
3110 +struct USB_SB_Desc* create_sb(struct USB_SB_Desc* sb_prev, int tt, void* data,
3111 + int datalen, int mem_flags) {
3112 + struct USB_SB_Desc *sb_desc;
3113 + sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
3114 + if(sb_desc == NULL)
3115 + return NULL;
3116 + memset(sb_desc, 0, sizeof(struct USB_SB_Desc));
3117 +
3118 + sb_desc->command = IO_FIELD(USB_SB_command, tt, tt) |
3119 + IO_STATE(USB_SB_command, eot, yes);
3120 +
3121 + sb_desc->sw_len = datalen;
3122 + if(data != NULL) {
3123 + sb_desc->buf = virt_to_phys(data);
3124 + } else {
3125 + sb_desc->buf = 0;
3126 + }
3127 + if(sb_prev != NULL) {
3128 + sb_prev->next = virt_to_phys(sb_desc);
3129 + }
3130 + return sb_desc;
3131 +}
3132 +
3133 +/* Creates a copy of an existing SB by allocation space for it and copy
3134 + settings */
3135 +struct USB_SB_Desc* create_sb_copy(struct USB_SB_Desc* sb_orig, int mem_flags) {
3136 + struct USB_SB_Desc *sb_desc;
3137 + sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
3138 + if(sb_desc == NULL)
3139 + return NULL;
3140 +
3141 + memcpy(sb_desc, sb_orig, sizeof(struct USB_SB_Desc));
3142 + return sb_desc;
3143 +}
3144 +
3145 +/* A specific create_sb function for creation of in SBs. This is due to
3146 + that datalen in In SBs shows how many packets we are expecting. It also
3147 + sets up the rem field to show if how many bytes we expect in last packet
3148 + if it's not a full one */
3149 +struct USB_SB_Desc* create_sb_in(struct USB_SB_Desc* sb_prev, int datalen,
3150 + int maxlen, int mem_flags) {
3151 + struct USB_SB_Desc *sb_desc;
3152 + sb_desc = create_sb(sb_prev, TT_IN, NULL,
3153 + datalen ? (datalen - 1) / maxlen + 1 : 0, mem_flags);
3154 + if(sb_desc == NULL)
3155 + return NULL;
3156 + sb_desc->command |= IO_FIELD(USB_SB_command, rem, datalen % maxlen);
3157 + return sb_desc;
3158 +}
3159 +
3160 +void set_sb_cmds(struct USB_SB_Desc *sb_desc, __u16 flags) {
3161 + sb_desc->command |= flags;
3162 +}
3163 +
3164 +int create_sb_for_urb(struct urb *urb, int mem_flags) {
3165 + int is_out = !usb_pipein(urb->pipe);
3166 + int type = usb_pipetype(urb->pipe);
3167 + int maxlen = usb_maxpacket(urb->dev, urb->pipe, is_out);
3168 + int buf_len = urb->transfer_buffer_length;
3169 + void *buf = buf_len > 0 ? urb->transfer_buffer : NULL;
3170 + struct USB_SB_Desc *sb_desc = NULL;
3171 +
3172 + struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
3173 + ASSERT(urb_priv != NULL);
3174 +
3175 + switch(type) {
3176 + case PIPE_CONTROL:
3177 + /* Setup stage */
3178 + sb_desc = create_sb(NULL, TT_SETUP, urb->setup_packet, 8, mem_flags);
3179 + if(sb_desc == NULL)
3180 + return -ENOMEM;
3181 + set_sb_cmds(sb_desc, CMD_FULL);
3182 +
3183 + /* Attach first SB to URB */
3184 + urb_priv->first_sb = sb_desc;
3185 +
3186 + if (is_out) { /* Out Control URB */
3187 + /* If this Control OUT transfer has an optional data stage we add
3188 + an OUT token before the mandatory IN (status) token */
3189 + if ((buf_len > 0) && buf) {
3190 + sb_desc = create_sb(sb_desc, TT_OUT, buf, buf_len, mem_flags);
3191 + if(sb_desc == NULL)
3192 + return -ENOMEM;
3193 + set_sb_cmds(sb_desc, CMD_FULL);
3194 + }
3195 +
3196 + /* Status stage */
3197 + /* The data length has to be exactly 1. This is due to a requirement
3198 + of the USB specification that a host must be prepared to receive
3199 + data in the status phase */
3200 + sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
3201 + if(sb_desc == NULL)
3202 + return -ENOMEM;
3203 + } else { /* In control URB */
3204 + /* Data stage */
3205 + sb_desc = create_sb_in(sb_desc, buf_len, maxlen, mem_flags);
3206 + if(sb_desc == NULL)
3207 + return -ENOMEM;
3208 +
3209 + /* Status stage */
3210 + /* Read comment at zout_buffer declaration for an explanation to this. */
3211 + sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
3212 + if(sb_desc == NULL)
3213 + return -ENOMEM;
3214 + /* Set descriptor interrupt flag for in URBs so we can finish URB after
3215 + zout-packet has been sent */
3216 + set_sb_cmds(sb_desc, CMD_INTR | CMD_FULL);
3217 + }
3218 + /* Set end-of-list flag in last SB */
3219 + set_sb_cmds(sb_desc, CMD_EOL);
3220 + /* Attach last SB to URB */
3221 + urb_priv->last_sb = sb_desc;
3222 + break;
3223 +
3224 + case PIPE_BULK:
3225 + if (is_out) { /* Out Bulk URB */
3226 + sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
3227 + if(sb_desc == NULL)
3228 + return -ENOMEM;
3229 + /* The full field is set to yes, even if we don't actually check that
3230 + this is a full-length transfer (i.e., that transfer_buffer_length %
3231 + maxlen = 0).
3232 + Setting full prevents the USB controller from sending an empty packet
3233 + in that case. However, if URB_ZERO_PACKET was set we want that. */
3234 + if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
3235 + set_sb_cmds(sb_desc, CMD_FULL);
3236 + }
3237 + } else { /* In Bulk URB */
3238 + sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
3239 + if(sb_desc == NULL)
3240 + return -ENOMEM;
3241 + }
3242 + /* Set end-of-list flag for last SB */
3243 + set_sb_cmds(sb_desc, CMD_EOL);
3244 +
3245 + /* Attach SB to URB */
3246 + urb_priv->first_sb = sb_desc;
3247 + urb_priv->last_sb = sb_desc;
3248 + break;
3249 +
3250 + case PIPE_INTERRUPT:
3251 + if(is_out) { /* Out Intr URB */
3252 + sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
3253 + if(sb_desc == NULL)
3254 + return -ENOMEM;
3255 +
3256 + /* The full field is set to yes, even if we don't actually check that
3257 + this is a full-length transfer (i.e., that transfer_buffer_length %
3258 + maxlen = 0).
3259 + Setting full prevents the USB controller from sending an empty packet
3260 + in that case. However, if URB_ZERO_PACKET was set we want that. */
3261 + if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
3262 + set_sb_cmds(sb_desc, CMD_FULL);
3263 + }
3264 + /* Only generate TX interrupt if it's a Out URB*/
3265 + set_sb_cmds(sb_desc, CMD_INTR);
3266 +
3267 + } else { /* In Intr URB */
3268 + sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
3269 + if(sb_desc == NULL)
3270 + return -ENOMEM;
3271 + }
3272 + /* Set end-of-list flag for last SB */
3273 + set_sb_cmds(sb_desc, CMD_EOL);
3274 +
3275 + /* Attach SB to URB */
3276 + urb_priv->first_sb = sb_desc;
3277 + urb_priv->last_sb = sb_desc;
3278 +
3279 + break;
3280 + case PIPE_ISOCHRONOUS:
3281 + if(is_out) { /* Out Isoc URB */
3282 + int i;
3283 + if(urb->number_of_packets == 0) {
3284 + tc_err("Can't create SBs for Isoc URB with zero packets\n");
3285 + return -EPIPE;
3286 + }
3287 + /* Create one SB descriptor for each packet and link them together. */
3288 + for(i = 0; i < urb->number_of_packets; i++) {
3289 + if (urb->iso_frame_desc[i].length > 0) {
3290 +
3291 + sb_desc = create_sb(sb_desc, TT_OUT, urb->transfer_buffer +
3292 + urb->iso_frame_desc[i].offset,
3293 + urb->iso_frame_desc[i].length, mem_flags);
3294 + if(sb_desc == NULL)
3295 + return -ENOMEM;
3296 +
3297 + /* Check if it's a full length packet */
3298 + if (urb->iso_frame_desc[i].length ==
3299 + usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
3300 + set_sb_cmds(sb_desc, CMD_FULL);
3301 + }
3302 +
3303 + } else { /* zero length packet */
3304 + sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
3305 + if(sb_desc == NULL)
3306 + return -ENOMEM;
3307 + set_sb_cmds(sb_desc, CMD_FULL);
3308 + }
3309 + /* Attach first SB descriptor to URB */
3310 + if (i == 0) {
3311 + urb_priv->first_sb = sb_desc;
3312 + }
3313 + }
3314 + /* Set interrupt and end-of-list flags in last SB */
3315 + set_sb_cmds(sb_desc, CMD_INTR | CMD_EOL);
3316 + /* Attach last SB descriptor to URB */
3317 + urb_priv->last_sb = sb_desc;
3318 + tc_dbg("Created %d out SBs for Isoc URB:0x%x\n",
3319 + urb->number_of_packets, (unsigned int)urb);
3320 + } else { /* In Isoc URB */
3321 + /* Actual number of packets is not relevant for periodic in traffic as
3322 + long as it is more than zero. Set to 1 always. */
3323 + sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
3324 + if(sb_desc == NULL)
3325 + return -ENOMEM;
3326 + /* Set end-of-list flags for SB */
3327 + set_sb_cmds(sb_desc, CMD_EOL);
3328 +
3329 + /* Attach SB to URB */
3330 + urb_priv->first_sb = sb_desc;
3331 + urb_priv->last_sb = sb_desc;
3332 + }
3333 + break;
3334 + default:
3335 + tc_err("Unknown pipe-type\n");
3336 + return -EPIPE;
3337 + break;
3338 + }
3339 + return 0;
3340 +}
3341 +
3342 +int init_intr_urb(struct urb *urb, int mem_flags) {
3343 + struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
3344 + struct USB_EP_Desc* ep_desc;
3345 + int interval;
3346 + int i;
3347 + int ep_count;
3348 +
3349 + ASSERT(urb_priv != NULL);
3350 + ASSERT(usb_pipeint(urb->pipe));
3351 + /* We can't support interval longer than amount of eof descriptors in
3352 + TxIntrEPList */
3353 + if(urb->interval > MAX_INTR_INTERVAL) {
3354 + tc_err("Interrupt interval %dms too big (max: %dms)\n", urb->interval,
3355 + MAX_INTR_INTERVAL);
3356 + return -EINVAL;
3357 + }
3358 +
3359 + /* We assume that the SB descriptors already have been setup */
3360 + ASSERT(urb_priv->first_sb != NULL);
3361 +
3362 + /* Round of the interval to 2^n, it is obvious that this code favours
3363 + smaller numbers, but that is actually a good thing */
3364 + /* FIXME: The "rounding error" for larger intervals will be quite
3365 + large. For in traffic this shouldn't be a problem since it will only
3366 + mean that we "poll" more often. */
3367 + interval = urb->interval;
3368 + for (i = 0; interval; i++) {
3369 + interval = interval >> 1;
3370 + }
3371 + urb_priv->interval = 1 << (i - 1);
3372 +
3373 + /* We can only have max interval for Out Interrupt due to that we can only
3374 + handle one linked in EP for a certain epid in the Intr descr array at the
3375 + time. The USB Controller in the Etrax 100LX continues to process Intr EPs
3376 + so we have no way of knowing which one that caused the actual transfer if
3377 + we have several linked in. */
3378 + if(usb_pipeout(urb->pipe)) {
3379 + urb_priv->interval = MAX_INTR_INTERVAL;
3380 + }
3381 +
3382 + /* Calculate amount of EPs needed */
3383 + ep_count = MAX_INTR_INTERVAL / urb_priv->interval;
3384 +
3385 + for(i = 0; i < ep_count; i++) {
3386 + ep_desc = create_ep(urb_priv->epid, urb_priv->first_sb, mem_flags);
3387 + if(ep_desc == NULL) {
3388 + /* Free any descriptors that we may have allocated before failure */
3389 + while(i > 0) {
3390 + i--;
3391 + kfree(urb_priv->intr_ep_pool[i]);
3392 + }
3393 + return -ENOMEM;
3394 + }
3395 + urb_priv->intr_ep_pool[i] = ep_desc;
3396 + }
3397 + urb_priv->intr_ep_pool_length = ep_count;
3398 + return 0;
3399 +}
3400 +
3401 +/* DMA RX/TX functions */
3402 +/* ----------------------- */
3403 +
3404 +static void tc_dma_init_rx_list(void) {
3405 + int i;
3406 +
3407 + /* Setup descriptor list except last one */
3408 + for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
3409 + RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
3410 + RxDescList[i].command = 0;
3411 + RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
3412 + RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
3413 + RxDescList[i].hw_len = 0;
3414 + RxDescList[i].status = 0;
3415 +
3416 + /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as
3417 + USB_IN_Desc for the relevant fields.) */
3418 + prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
3419 +
3420 + }
3421 + /* Special handling of last descriptor */
3422 + RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
3423 + RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
3424 + RxDescList[i].next = virt_to_phys(&RxDescList[0]);
3425 + RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
3426 + RxDescList[i].hw_len = 0;
3427 + RxDescList[i].status = 0;
3428 +
3429 + /* Setup list pointers that show progress in list */
3430 + myNextRxDesc = &RxDescList[0];
3431 + myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
3432 +
3433 + flush_etrax_cache();
3434 + /* Point DMA to first descriptor in list and start it */
3435 + *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
3436 + *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
3437 +}
3438 +
3439 +
3440 +static void tc_dma_init_tx_bulk_list(void) {
3441 + int i;
3442 + volatile struct USB_EP_Desc *epDescr;
3443 +
3444 + for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
3445 + epDescr = &(TxBulkEPList[i]);
3446 + CHECK_ALIGN(epDescr);
3447 + epDescr->hw_len = 0;
3448 + epDescr->command = IO_FIELD(USB_EP_command, epid, i);
3449 + epDescr->sub = 0;
3450 + epDescr->next = virt_to_phys(&TxBulkEPList[i + 1]);
3451 +
3452 + /* Initiate two EPs, disabled and with the eol flag set. No need for any
3453 + preserved epid. */
3454 +
3455 + /* The first one has the intr flag set so we get an interrupt when the DMA
3456 + channel is about to become disabled. */
3457 + CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
3458 + TxBulkDummyEPList[i][0].hw_len = 0;
3459 + TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
3460 + IO_STATE(USB_EP_command, eol, yes) |
3461 + IO_STATE(USB_EP_command, intr, yes));
3462 + TxBulkDummyEPList[i][0].sub = 0;
3463 + TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
3464 +
3465 + /* The second one. */
3466 + CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
3467 + TxBulkDummyEPList[i][1].hw_len = 0;
3468 + TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
3469 + IO_STATE(USB_EP_command, eol, yes));
3470 + TxBulkDummyEPList[i][1].sub = 0;
3471 + /* The last dummy's next pointer is the same as the current EP's next pointer. */
3472 + TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
3473 + }
3474 +
3475 + /* Special handling of last descr in list, make list circular */
3476 + epDescr = &TxBulkEPList[i];
3477 + CHECK_ALIGN(epDescr);
3478 + epDescr->hw_len = 0;
3479 + epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
3480 + IO_FIELD(USB_EP_command, epid, i);
3481 + epDescr->sub = 0;
3482 + epDescr->next = virt_to_phys(&TxBulkEPList[0]);
3483 +
3484 + /* Init DMA sub-channel pointers to last item in each list */
3485 + *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
3486 + /* No point in starting the bulk channel yet.
3487 + *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
3488 +}
3489 +
3490 +static void tc_dma_init_tx_ctrl_list(void) {
3491 + int i;
3492 + volatile struct USB_EP_Desc *epDescr;
3493 +
3494 + for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
3495 + epDescr = &(TxCtrlEPList[i]);
3496 + CHECK_ALIGN(epDescr);
3497 + epDescr->hw_len = 0;
3498 + epDescr->command = IO_FIELD(USB_EP_command, epid, i);
3499 + epDescr->sub = 0;
3500 + epDescr->next = virt_to_phys(&TxCtrlEPList[i + 1]);
3501 + }
3502 + /* Special handling of last descr in list, make list circular */
3503 + epDescr = &TxCtrlEPList[i];
3504 + CHECK_ALIGN(epDescr);
3505 + epDescr->hw_len = 0;
3506 + epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
3507 + IO_FIELD(USB_EP_command, epid, i);
3508 + epDescr->sub = 0;
3509 + epDescr->next = virt_to_phys(&TxCtrlEPList[0]);
3510 +
3511 + /* Init DMA sub-channel pointers to last item in each list */
3512 + *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[i]);
3513 + /* No point in starting the ctrl channel yet.
3514 + *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
3515 +}
3516 +
3517 +
3518 +static void tc_dma_init_tx_intr_list(void) {
3519 + int i;
3520 +
3521 + TxIntrSB_zout.sw_len = 1;
3522 + TxIntrSB_zout.next = 0;
3523 + TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
3524 + TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
3525 + IO_STATE(USB_SB_command, tt, zout) |
3526 + IO_STATE(USB_SB_command, full, yes) |
3527 + IO_STATE(USB_SB_command, eot, yes) |
3528 + IO_STATE(USB_SB_command, eol, yes));
3529 +
3530 + for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
3531 + CHECK_ALIGN(&TxIntrEPList[i]);
3532 + TxIntrEPList[i].hw_len = 0;
3533 + TxIntrEPList[i].command =
3534 + (IO_STATE(USB_EP_command, eof, yes) |
3535 + IO_STATE(USB_EP_command, enable, yes) |
3536 + IO_FIELD(USB_EP_command, epid, INVALID_EPID));
3537 + TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
3538 + TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
3539 + }
3540 +
3541 + /* Special handling of last descr in list, make list circular */
3542 + CHECK_ALIGN(&TxIntrEPList[i]);
3543 + TxIntrEPList[i].hw_len = 0;
3544 + TxIntrEPList[i].command =
3545 + (IO_STATE(USB_EP_command, eof, yes) |
3546 + IO_STATE(USB_EP_command, eol, yes) |
3547 + IO_STATE(USB_EP_command, enable, yes) |
3548 + IO_FIELD(USB_EP_command, epid, INVALID_EPID));
3549 + TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
3550 + TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
3551 +
3552 + intr_dbg("Initiated Intr EP descriptor list\n");
3553 +
3554 +
3555 + /* Connect DMA 8 sub-channel 2 to first in list */
3556 + *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
3557 +}
3558 +
3559 +static void tc_dma_init_tx_isoc_list(void) {
3560 + int i;
3561 +
3562 + DBFENTER;
3563 +
3564 + /* Read comment at zout_buffer declaration for an explanation to this. */
3565 + TxIsocSB_zout.sw_len = 1;
3566 + TxIsocSB_zout.next = 0;
3567 + TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
3568 + TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
3569 + IO_STATE(USB_SB_command, tt, zout) |
3570 + IO_STATE(USB_SB_command, full, yes) |
3571 + IO_STATE(USB_SB_command, eot, yes) |
3572 + IO_STATE(USB_SB_command, eol, yes));
3573 +
3574 + /* The last isochronous EP descriptor is a dummy. */
3575 + for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
3576 + CHECK_ALIGN(&TxIsocEPList[i]);
3577 + TxIsocEPList[i].hw_len = 0;
3578 + TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
3579 + TxIsocEPList[i].sub = 0;
3580 + TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
3581 + }
3582 +
3583 + CHECK_ALIGN(&TxIsocEPList[i]);
3584 + TxIsocEPList[i].hw_len = 0;
3585 +
3586 + /* Must enable the last EP descr to get eof interrupt. */
3587 + TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
3588 + IO_STATE(USB_EP_command, eof, yes) |
3589 + IO_STATE(USB_EP_command, eol, yes) |
3590 + IO_FIELD(USB_EP_command, epid, INVALID_EPID));
3591 + TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
3592 + TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
3593 +
3594 + *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
3595 + *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
3596 +}
3597 +
3598 +static int tc_dma_init(struct usb_hcd *hcd) {
3599 + tc_dma_init_rx_list();
3600 + tc_dma_init_tx_bulk_list();
3601 + tc_dma_init_tx_ctrl_list();
3602 + tc_dma_init_tx_intr_list();
3603 + tc_dma_init_tx_isoc_list();
3604 +
3605 + if (cris_request_dma(USB_TX_DMA_NBR,
3606 + "ETRAX 100LX built-in USB (Tx)",
3607 + DMA_VERBOSE_ON_ERROR,
3608 + dma_usb)) {
3609 + err("Could not allocate DMA ch 8 for USB");
3610 + return -EBUSY;
3611 + }
3612 +
3613 + if (cris_request_dma(USB_RX_DMA_NBR,
3614 + "ETRAX 100LX built-in USB (Rx)",
3615 + DMA_VERBOSE_ON_ERROR,
3616 + dma_usb)) {
3617 + err("Could not allocate DMA ch 9 for USB");
3618 + return -EBUSY;
3619 + }
3620 +
3621 + *R_IRQ_MASK2_SET =
3622 + /* Note that these interrupts are not used. */
3623 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
3624 + /* Sub channel 1 (ctrl) descr. interrupts are used. */
3625 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
3626 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
3627 + /* Sub channel 3 (isoc) descr. interrupts are used. */
3628 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
3629 +
3630 + /* Note that the dma9_descr interrupt is not used. */
3631 + *R_IRQ_MASK2_SET =
3632 + IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
3633 + IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
3634 +
3635 + if (request_irq(ETRAX_USB_RX_IRQ, tc_dma_rx_interrupt, 0,
3636 + "ETRAX 100LX built-in USB (Rx)", hcd)) {
3637 + err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
3638 + return -EBUSY;
3639 + }
3640 +
3641 + if (request_irq(ETRAX_USB_TX_IRQ, tc_dma_tx_interrupt, 0,
3642 + "ETRAX 100LX built-in USB (Tx)", hcd)) {
3643 + err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
3644 + return -EBUSY;
3645 + }
3646 +
3647 + return 0;
3648 +}
3649 +
3650 +static void tc_dma_destroy(void) {
3651 + free_irq(ETRAX_USB_RX_IRQ, NULL);
3652 + free_irq(ETRAX_USB_TX_IRQ, NULL);
3653 +
3654 + cris_free_dma(USB_TX_DMA_NBR, "ETRAX 100LX built-in USB (Tx)");
3655 + cris_free_dma(USB_RX_DMA_NBR, "ETRAX 100LX built-in USB (Rx)");
3656 +
3657 +}
3658 +
3659 +static void tc_dma_link_intr_urb(struct urb *urb);
3660 +
3661 +/* Handle processing of Bulk, Ctrl and Intr queues */
3662 +static void tc_dma_process_queue(int epid) {
3663 + struct urb *urb;
3664 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3665 + unsigned long flags;
3666 + char toggle;
3667 +
3668 + if(epid_state[epid].disabled) {
3669 + /* Don't process any URBs on a disabled endpoint */
3670 + return;
3671 + }
3672 +
3673 + /* Do not disturb us while fiddling with EPs and epids */
3674 + local_irq_save(flags);
3675 +
3676 + /* For bulk, Ctrl and Intr can we only have one URB active at a time for
3677 + a specific EP. */
3678 + if(activeUrbList[epid] != NULL) {
3679 + /* An URB is already active on EP, skip checking queue */
3680 + local_irq_restore(flags);
3681 + return;
3682 + }
3683 +
3684 + urb = urb_list_first(epid);
3685 + if(urb == NULL) {
3686 + /* No URB waiting in EP queue. Nothing do to */
3687 + local_irq_restore(flags);
3688 + return;
3689 + }
3690 +
3691 + urb_priv = urb->hcpriv;
3692 + ASSERT(urb_priv != NULL);
3693 + ASSERT(urb_priv->urb_state == NOT_STARTED);
3694 + ASSERT(!usb_pipeisoc(urb->pipe));
3695 +
3696 + /* Remove this URB from the queue and move it to active */
3697 + activeUrbList[epid] = urb;
3698 + urb_list_del(urb, epid);
3699 +
3700 + urb_priv->urb_state = STARTED;
3701 +
3702 + /* Reset error counters (regardless of which direction this traffic is). */
3703 + etrax_epid_clear_error(epid);
3704 +
3705 + /* Special handling of Intr EP lists */
3706 + if(usb_pipeint(urb->pipe)) {
3707 + tc_dma_link_intr_urb(urb);
3708 + local_irq_restore(flags);
3709 + return;
3710 + }
3711 +
3712 + /* Software must preset the toggle bits for Bulk and Ctrl */
3713 + if(usb_pipecontrol(urb->pipe)) {
3714 + /* Toggle bits are initialized only during setup transaction in a
3715 + CTRL transfer */
3716 + etrax_epid_set_toggle(epid, 0, 0);
3717 + etrax_epid_set_toggle(epid, 1, 0);
3718 + } else {
3719 + toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
3720 + usb_pipeout(urb->pipe));
3721 + etrax_epid_set_toggle(epid, usb_pipeout(urb->pipe), toggle);
3722 + }
3723 +
3724 + tc_dbg("Added SBs from (URB:0x%x %s %s) to epid %d: %s\n",
3725 + (unsigned int)urb, str_dir(urb->pipe), str_type(urb->pipe), epid,
3726 + sblist_to_str(urb_priv->first_sb));
3727 +
3728 + /* We start the DMA sub channel without checking if it's running or not,
3729 + because:
3730 + 1) If it's already running, issuing the start command is a nop.
3731 + 2) We avoid a test-and-set race condition. */
3732 + switch(usb_pipetype(urb->pipe)) {
3733 + case PIPE_BULK:
3734 + /* Assert that the EP descriptor is disabled. */
3735 + ASSERT(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
3736 +
3737 + /* Set up and enable the EP descriptor. */
3738 + TxBulkEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3739 + TxBulkEPList[epid].hw_len = 0;
3740 + TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
3741 +
3742 + /* Check if the dummy list is already with us (if several urbs were queued). */
3743 + if (usb_pipein(urb->pipe) && (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0]))) {
3744 + tc_dbg("Inviting dummy list to the party for urb 0x%lx, epid %d",
3745 + (unsigned long)urb, epid);
3746 +
3747 + /* We don't need to check if the DMA is at this EP or not before changing the
3748 + next pointer, since we will do it in one 32-bit write (EP descriptors are
3749 + 32-bit aligned). */
3750 + TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
3751 + }
3752 +
3753 + restart_dma8_sub0();
3754 +
3755 + /* Update/restart the bulk start timer since we just started the channel.*/
3756 + mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
3757 + /* Update/restart the bulk eot timer since we just inserted traffic. */
3758 + mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
3759 + break;
3760 + case PIPE_CONTROL:
3761 + /* Assert that the EP descriptor is disabled. */
3762 + ASSERT(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
3763 +
3764 + /* Set up and enable the EP descriptor. */
3765 + TxCtrlEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3766 + TxCtrlEPList[epid].hw_len = 0;
3767 + TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
3768 +
3769 + *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
3770 + break;
3771 + }
3772 + local_irq_restore(flags);
3773 +}
3774 +
3775 +static void tc_dma_link_intr_urb(struct urb *urb) {
3776 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3777 + volatile struct USB_EP_Desc *tmp_ep;
3778 + struct USB_EP_Desc *ep_desc;
3779 + int i = 0, epid;
3780 + int pool_idx = 0;
3781 +
3782 + ASSERT(urb_priv != NULL);
3783 + epid = urb_priv->epid;
3784 + ASSERT(urb_priv->interval > 0);
3785 + ASSERT(urb_priv->intr_ep_pool_length > 0);
3786 +
3787 + tmp_ep = &TxIntrEPList[0];
3788 +
3789 + /* Only insert one EP descriptor in list for Out Intr URBs.
3790 + We can only handle Out Intr with interval of 128ms because
3791 + it's not possible to insert several Out Intr EPs because they
3792 + are not consumed by the DMA. */
3793 + if(usb_pipeout(urb->pipe)) {
3794 + ep_desc = urb_priv->intr_ep_pool[0];
3795 + ASSERT(ep_desc);
3796 + ep_desc->next = tmp_ep->next;
3797 + tmp_ep->next = virt_to_phys(ep_desc);
3798 + i++;
3799 + } else {
3800 + /* Loop through Intr EP descriptor list and insert EP for URB at
3801 + specified interval */
3802 + do {
3803 + /* Each EP descriptor with eof flag sat signals a new frame */
3804 + if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
3805 + /* Insert a EP from URBs EP pool at correct interval */
3806 + if ((i % urb_priv->interval) == 0) {
3807 + ep_desc = urb_priv->intr_ep_pool[pool_idx];
3808 + ASSERT(ep_desc);
3809 + ep_desc->next = tmp_ep->next;
3810 + tmp_ep->next = virt_to_phys(ep_desc);
3811 + pool_idx++;
3812 + ASSERT(pool_idx <= urb_priv->intr_ep_pool_length);
3813 + }
3814 + i++;
3815 + }
3816 + tmp_ep = (struct USB_EP_Desc *)phys_to_virt(tmp_ep->next);
3817 + } while(tmp_ep != &TxIntrEPList[0]);
3818 + }
3819 +
3820 + intr_dbg("Added SBs to intr epid %d: %s interval:%d (%d EP)\n", epid,
3821 + sblist_to_str(urb_priv->first_sb), urb_priv->interval, pool_idx);
3822 +
3823 + /* We start the DMA sub channel without checking if it's running or not,
3824 + because:
3825 + 1) If it's already running, issuing the start command is a nop.
3826 + 2) We avoid a test-and-set race condition. */
3827 + *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
3828 +}
3829 +
3830 + /* hinko ignore usb_pipeisoc */
3831 +#if 0
3832 +static void tc_dma_process_isoc_urb(struct urb *urb) {
3833 + unsigned long flags;
3834 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3835 + int epid;
3836 +
3837 + /* Do not disturb us while fiddling with EPs and epids */
3838 + local_irq_save(flags);
3839 +
3840 + ASSERT(urb_priv);
3841 + ASSERT(urb_priv->first_sb);
3842 + epid = urb_priv->epid;
3843 +
3844 + if(activeUrbList[epid] == NULL) {
3845 + /* EP is idle, so make this URB active */
3846 + activeUrbList[epid] = urb;
3847 + urb_list_del(urb, epid);
3848 + ASSERT(TxIsocEPList[epid].sub == 0);
3849 + ASSERT(!(TxIsocEPList[epid].command &
3850 + IO_STATE(USB_EP_command, enable, yes)));
3851 +
3852 + /* Differentiate between In and Out Isoc. Because In SBs are not consumed*/
3853 + if(usb_pipein(urb->pipe)) {
3854 + /* Each EP for In Isoc will have only one SB descriptor, setup when
3855 + submitting the first active urb. We do it here by copying from URBs
3856 + pre-allocated SB. */
3857 + memcpy((void *)&(TxIsocSBList[epid]), urb_priv->first_sb,
3858 + sizeof(TxIsocSBList[epid]));
3859 + TxIsocEPList[epid].hw_len = 0;
3860 + TxIsocEPList[epid].sub = virt_to_phys(&(TxIsocSBList[epid]));
3861 + } else {
3862 + /* For Out Isoc we attach the pre-allocated list of SBs for the URB */
3863 + TxIsocEPList[epid].hw_len = 0;
3864 + TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3865 +
3866 + isoc_dbg("Attached first URB:0x%x[%d] to epid:%d first_sb:0x%x"
3867 + " last_sb::0x%x\n",
3868 + (unsigned int)urb, urb_priv->urb_num, epid,
3869 + (unsigned int)(urb_priv->first_sb),
3870 + (unsigned int)(urb_priv->last_sb));
3871 + }
3872 +
3873 + if (urb->transfer_flags & URB_ISO_ASAP) {
3874 + /* The isoc transfer should be started as soon as possible. The
3875 + start_frame field is a return value if URB_ISO_ASAP was set. Comparing
3876 + R_USB_FM_NUMBER with a USB Chief trace shows that the first isoc IN
3877 + token is sent 2 frames later. I'm not sure how this affects usage of
3878 + the start_frame field by the device driver, or how it affects things
3879 + when USB_ISO_ASAP is not set, so therefore there's no compensation for
3880 + the 2 frame "lag" here. */
3881 + urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
3882 + TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
3883 + urb_priv->urb_state = STARTED;
3884 + isoc_dbg("URB_ISO_ASAP set, urb->start_frame set to %d\n",
3885 + urb->start_frame);
3886 + } else {
3887 + /* Not started yet. */
3888 + urb_priv->urb_state = NOT_STARTED;
3889 + isoc_warn("urb_priv->urb_state set to NOT_STARTED for URB:0x%x\n",
3890 + (unsigned int)urb);
3891 + }
3892 +
3893 + } else {
3894 + /* An URB is already active on the EP. Leave URB in queue and let
3895 + finish_isoc_urb process it after current active URB */
3896 + ASSERT(TxIsocEPList[epid].sub != 0);
3897 +
3898 + if(usb_pipein(urb->pipe)) {
3899 + /* Because there already is a active In URB on this epid we do nothing
3900 + and the finish_isoc_urb() function will handle switching to next URB*/
3901 +
3902 + } else { /* For Out Isoc, insert new URBs traffic last in SB-list. */
3903 + struct USB_SB_Desc *temp_sb_desc;
3904 +
3905 + /* Set state STARTED to all Out Isoc URBs added to SB list because we
3906 + don't know how many of them that are finished before descr interrupt*/
3907 + urb_priv->urb_state = STARTED;
3908 +
3909 + /* Find end of current SB list by looking for SB with eol flag sat */
3910 + temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
3911 + while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
3912 + IO_STATE(USB_SB_command, eol, yes)) {
3913 + ASSERT(temp_sb_desc->next);
3914 + temp_sb_desc = phys_to_virt(temp_sb_desc->next);
3915 + }
3916 +
3917 + isoc_dbg("Appended URB:0x%x[%d] (first:0x%x last:0x%x) to epid:%d"
3918 + " sub:0x%x eol:0x%x\n",
3919 + (unsigned int)urb, urb_priv->urb_num,
3920 + (unsigned int)(urb_priv->first_sb),
3921 + (unsigned int)(urb_priv->last_sb), epid,
3922 + (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
3923 + (unsigned int)temp_sb_desc);
3924 +
3925 + /* Next pointer must be set before eol is removed. */
3926 + temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
3927 + /* Clear the previous end of list flag since there is a new in the
3928 + added SB descriptor list. */
3929 + temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
3930 +
3931 + if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
3932 + __u32 epid_data;
3933 + /* 8.8.5 in Designer's Reference says we should check for and correct
3934 + any errors in the EP here. That should not be necessary if
3935 + epid_attn is handled correctly, so we assume all is ok. */
3936 + epid_data = etrax_epid_iso_get(epid);
3937 + if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) !=
3938 + IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
3939 + isoc_err("Disabled Isoc EP with error:%d on epid:%d when appending"
3940 + " URB:0x%x[%d]\n",
3941 + IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data), epid,
3942 + (unsigned int)urb, urb_priv->urb_num);
3943 + }
3944 +
3945 + /* The SB list was exhausted. */
3946 + if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
3947 + /* The new sublist did not get processed before the EP was
3948 + disabled. Setup the EP again. */
3949 +
3950 + if(virt_to_phys(temp_sb_desc) == TxIsocEPList[epid].sub) {
3951 + isoc_dbg("EP for epid:%d stoped at SB:0x%x before newly inserted"
3952 + ", restarting from this URBs SB:0x%x\n",
3953 + epid, (unsigned int)temp_sb_desc,
3954 + (unsigned int)(urb_priv->first_sb));
3955 + TxIsocEPList[epid].hw_len = 0;
3956 + TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3957 + urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
3958 + /* Enable the EP again so data gets processed this time */
3959 + TxIsocEPList[epid].command |=
3960 + IO_STATE(USB_EP_command, enable, yes);
3961 +
3962 + } else {
3963 + /* The EP has been disabled but not at end this URB (god knows
3964 + where). This should generate an epid_attn so we should not be
3965 + here */
3966 + isoc_warn("EP was disabled on sb:0x%x before SB list for"
3967 + " URB:0x%x[%d] got processed\n",
3968 + (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
3969 + (unsigned int)urb, urb_priv->urb_num);
3970 + }
3971 + } else {
3972 + /* This might happend if we are slow on this function and isn't
3973 + an error. */
3974 + isoc_dbg("EP was disabled and finished with SBs from appended"
3975 + " URB:0x%x[%d]\n", (unsigned int)urb, urb_priv->urb_num);
3976 + }
3977 + }
3978 + }
3979 + }
3980 +
3981 + /* Start the DMA sub channel */
3982 + *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
3983 +
3984 + local_irq_restore(flags);
3985 +}
3986 +#endif
3987 +
3988 +static void tc_dma_unlink_intr_urb(struct urb *urb) {
3989 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3990 + volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
3991 + volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
3992 + volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
3993 + volatile struct USB_EP_Desc *unlink_ep; /* The one we should remove from
3994 + the list. */
3995 + int count = 0;
3996 + volatile int timeout = 10000;
3997 + int epid;
3998 +
3999 + /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the
4000 + List". */
4001 + ASSERT(urb_priv);
4002 + ASSERT(urb_priv->intr_ep_pool_length > 0);
4003 + epid = urb_priv->epid;
4004 +
4005 + /* First disable all Intr EPs belonging to epid for this URB */
4006 + first_ep = &TxIntrEPList[0];
4007 + curr_ep = first_ep;
4008 + do {
4009 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
4010 + if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
4011 + /* Disable EP */
4012 + next_ep->command &= ~IO_MASK(USB_EP_command, enable);
4013 + }
4014 + curr_ep = phys_to_virt(curr_ep->next);
4015 + } while (curr_ep != first_ep);
4016 +
4017 +
4018 + /* Now unlink all EPs belonging to this epid from Descr list */
4019 + first_ep = &TxIntrEPList[0];
4020 + curr_ep = first_ep;
4021 + do {
4022 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
4023 + if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
4024 + /* This is the one we should unlink. */
4025 + unlink_ep = next_ep;
4026 +
4027 + /* Actually unlink the EP from the DMA list. */
4028 + curr_ep->next = unlink_ep->next;
4029 +
4030 + /* Wait until the DMA is no longer at this descriptor. */
4031 + while((*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep)) &&
4032 + (timeout-- > 0));
4033 + if(timeout == 0) {
4034 + warn("Timeout while waiting for DMA-TX-Intr to leave unlink EP\n");
4035 + }
4036 +
4037 + count++;
4038 + }
4039 + curr_ep = phys_to_virt(curr_ep->next);
4040 + } while (curr_ep != first_ep);
4041 +
4042 + if(count != urb_priv->intr_ep_pool_length) {
4043 + intr_warn("Unlinked %d of %d Intr EPs for URB:0x%x[%d]\n", count,
4044 + urb_priv->intr_ep_pool_length, (unsigned int)urb,
4045 + urb_priv->urb_num);
4046 + } else {
4047 + intr_dbg("Unlinked %d of %d interrupt EPs for URB:0x%x\n", count,
4048 + urb_priv->intr_ep_pool_length, (unsigned int)urb);
4049 + }
4050 +}
4051 +
4052 +static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
4053 + int timer) {
4054 + unsigned long flags;
4055 + int epid;
4056 + struct urb *urb;
4057 + struct crisv10_urb_priv * urb_priv;
4058 + __u32 epid_data;
4059 +
4060 + /* Protect TxEPList */
4061 + local_irq_save(flags);
4062 +
4063 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4064 + /* A finished EP descriptor is disabled and has a valid sub pointer */
4065 + if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
4066 + (TxBulkEPList[epid].sub != 0)) {
4067 +
4068 + /* Get the active URB for this epid */
4069 + urb = activeUrbList[epid];
4070 + /* Sanity checks */
4071 + ASSERT(urb);
4072 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4073 + ASSERT(urb_priv);
4074 +
4075 + /* Only handle finished out Bulk EPs here,
4076 + and let RX interrupt take care of the rest */
4077 + if(!epid_out_traffic(epid)) {
4078 + continue;
4079 + }
4080 +
4081 + if(timer) {
4082 + tc_warn("Found finished %s Bulk epid:%d URB:0x%x[%d] from timeout\n",
4083 + epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
4084 + urb_priv->urb_num);
4085 + } else {
4086 + tc_dbg("Found finished %s Bulk epid:%d URB:0x%x[%d] from interrupt\n",
4087 + epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
4088 + urb_priv->urb_num);
4089 + }
4090 +
4091 + if(urb_priv->urb_state == UNLINK) {
4092 + /* This Bulk URB is requested to be unlinked, that means that the EP
4093 + has been disabled and we might not have sent all data */
4094 + tc_finish_urb(hcd, urb, urb->status);
4095 + continue;
4096 + }
4097 +
4098 + ASSERT(urb_priv->urb_state == STARTED);
4099 + if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
4100 + tc_err("Endpoint got disabled before reaching last sb\n");
4101 + }
4102 +
4103 + epid_data = etrax_epid_get(epid);
4104 + if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
4105 + IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
4106 + /* This means that the endpoint has no error, is disabled
4107 + and had inserted traffic, i.e. transfer successfully completed. */
4108 + tc_finish_urb(hcd, urb, 0);
4109 + } else {
4110 + /* Shouldn't happen. We expect errors to be caught by epid
4111 + attention. */
4112 + tc_err("Found disabled bulk EP desc (epid:%d error:%d)\n",
4113 + epid, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
4114 + }
4115 + } else {
4116 + tc_dbg("Ignoring In Bulk epid:%d, let RX interrupt handle it\n", epid);
4117 + }
4118 + }
4119 +
4120 + local_irq_restore(flags);
4121 +}
4122 +
4123 +static void check_finished_ctrl_tx_epids(struct usb_hcd *hcd) {
4124 + unsigned long flags;
4125 + int epid;
4126 + struct urb *urb;
4127 + struct crisv10_urb_priv * urb_priv;
4128 + __u32 epid_data;
4129 +
4130 + /* Protect TxEPList */
4131 + local_irq_save(flags);
4132 +
4133 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4134 + if(epid == DUMMY_EPID)
4135 + continue;
4136 +
4137 + /* A finished EP descriptor is disabled and has a valid sub pointer */
4138 + if (!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
4139 + (TxCtrlEPList[epid].sub != 0)) {
4140 +
4141 + /* Get the active URB for this epid */
4142 + urb = activeUrbList[epid];
4143 +
4144 + if(urb == NULL) {
4145 + tc_warn("Found finished Ctrl epid:%d with no active URB\n", epid);
4146 + continue;
4147 + }
4148 +
4149 + /* Sanity checks */
4150 + ASSERT(usb_pipein(urb->pipe));
4151 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4152 + ASSERT(urb_priv);
4153 + if (phys_to_virt(TxCtrlEPList[epid].sub) != urb_priv->last_sb) {
4154 + tc_err("Endpoint got disabled before reaching last sb\n");
4155 + }
4156 +
4157 + epid_data = etrax_epid_get(epid);
4158 + if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
4159 + IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
4160 + /* This means that the endpoint has no error, is disabled
4161 + and had inserted traffic, i.e. transfer successfully completed. */
4162 +
4163 + /* Check if RX-interrupt for In Ctrl has been processed before
4164 + finishing the URB */
4165 + if(urb_priv->ctrl_rx_done) {
4166 + tc_dbg("Finishing In Ctrl URB:0x%x[%d] in tx_interrupt\n",
4167 + (unsigned int)urb, urb_priv->urb_num);
4168 + tc_finish_urb(hcd, urb, 0);
4169 + } else {
4170 + /* If we get zout descriptor interrupt before RX was done for a
4171 + In Ctrl transfer, then we flag that and it will be finished
4172 + in the RX-Interrupt */
4173 + urb_priv->ctrl_zout_done = 1;
4174 + tc_dbg("Got zout descr interrupt before RX interrupt\n");
4175 + }
4176 + } else {
4177 + /* Shouldn't happen. We expect errors to be caught by epid
4178 + attention. */
4179 + tc_err("Found disabled Ctrl EP desc (epid:%d URB:0x%x[%d]) error_code:%d\n", epid, (unsigned int)urb, urb_priv->urb_num, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
4180 + __dump_ep_desc(&(TxCtrlEPList[epid]));
4181 + __dump_ept_data(epid);
4182 + }
4183 + }
4184 + }
4185 + local_irq_restore(flags);
4186 +}
4187 +
4188 + /* hinko ignore usb_pipeisoc */
4189 +#if 0
4190 +/* This function goes through all epids that are setup for Out Isoc transfers
4191 + and marks (isoc_out_done) all queued URBs that the DMA has finished
4192 + transfer for.
4193 + No URB completetion is done here to make interrupt routine return quickly.
4194 + URBs are completed later with help of complete_isoc_bottom_half() that
4195 + becomes schedules when this functions is finished. */
4196 +static void check_finished_isoc_tx_epids(void) {
4197 + unsigned long flags;
4198 + int epid;
4199 + struct urb *urb;
4200 + struct crisv10_urb_priv * urb_priv;
4201 + struct USB_SB_Desc* sb_desc;
4202 + int epid_done;
4203 +
4204 + /* Protect TxIsocEPList */
4205 + local_irq_save(flags);
4206 +
4207 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4208 + if (TxIsocEPList[epid].sub == 0 || epid == INVALID_EPID ||
4209 + !epid_out_traffic(epid)) {
4210 + /* Nothing here to see. */
4211 + continue;
4212 + }
4213 + ASSERT(epid_inuse(epid));
4214 + ASSERT(epid_isoc(epid));
4215 +
4216 + sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
4217 + /* Find the last descriptor of the currently active URB for this ep.
4218 + This is the first descriptor in the sub list marked for a descriptor
4219 + interrupt. */
4220 + while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
4221 + sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
4222 + }
4223 + ASSERT(sb_desc);
4224 +
4225 + isoc_dbg("Descr IRQ checking epid:%d sub:0x%x intr:0x%x\n",
4226 + epid, (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
4227 + (unsigned int)sb_desc);
4228 +
4229 + urb = activeUrbList[epid];
4230 + if(urb == NULL) {
4231 + isoc_err("Isoc Descr irq on epid:%d with no active URB\n", epid);
4232 + continue;
4233 + }
4234 +
4235 + epid_done = 0;
4236 + while(urb && !epid_done) {
4237 + /* Sanity check. */
4238 + ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
4239 + ASSERT(usb_pipeout(urb->pipe));
4240 +
4241 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4242 + ASSERT(urb_priv);
4243 + ASSERT(urb_priv->urb_state == STARTED ||
4244 + urb_priv->urb_state == UNLINK);
4245 +
4246 + if (sb_desc != urb_priv->last_sb) {
4247 + /* This urb has been sent. */
4248 + urb_priv->isoc_out_done = 1;
4249 +
4250 + } else { /* Found URB that has last_sb as the interrupt reason */
4251 +
4252 + /* Check if EP has been disabled, meaning that all transfers are done*/
4253 + if(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
4254 + ASSERT((sb_desc->command & IO_MASK(USB_SB_command, eol)) ==
4255 + IO_STATE(USB_SB_command, eol, yes));
4256 + ASSERT(sb_desc->next == 0);
4257 + urb_priv->isoc_out_done = 1;
4258 + } else {
4259 + isoc_dbg("Skipping URB:0x%x[%d] because EP not disabled yet\n",
4260 + (unsigned int)urb, urb_priv->urb_num);
4261 + }
4262 + /* Stop looking any further in queue */
4263 + epid_done = 1;
4264 + }
4265 +
4266 + if (!epid_done) {
4267 + if(urb == activeUrbList[epid]) {
4268 + urb = urb_list_first(epid);
4269 + } else {
4270 + urb = urb_list_next(urb, epid);
4271 + }
4272 + }
4273 + } /* END: while(urb && !epid_done) */
4274 + }
4275 +
4276 + local_irq_restore(flags);
4277 +}
4278 +
4279 +
4280 +/* This is where the Out Isoc URBs are realy completed. This function is
4281 + scheduled from tc_dma_tx_interrupt() when one or more Out Isoc transfers
4282 + are done. This functions completes all URBs earlier marked with
4283 + isoc_out_done by fast interrupt routine check_finished_isoc_tx_epids() */
4284 +
4285 +static void complete_isoc_bottom_half(void *data) {
4286 + struct crisv10_isoc_complete_data *comp_data;
4287 + struct usb_iso_packet_descriptor *packet;
4288 + struct crisv10_urb_priv * urb_priv;
4289 + unsigned long flags;
4290 + struct urb* urb;
4291 + int epid_done;
4292 + int epid;
4293 + int i;
4294 +
4295 + comp_data = (struct crisv10_isoc_complete_data*)data;
4296 +
4297 + local_irq_save(flags);
4298 +
4299 + for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
4300 + if(!epid_inuse(epid) || !epid_isoc(epid) || !epid_out_traffic(epid) || epid == DUMMY_EPID) {
4301 + /* Only check valid Out Isoc epids */
4302 + continue;
4303 + }
4304 +
4305 + isoc_dbg("Isoc bottom-half checking epid:%d, sub:0x%x\n", epid,
4306 + (unsigned int)phys_to_virt(TxIsocEPList[epid].sub));
4307 +
4308 + /* The descriptor interrupt handler has marked all transmitted Out Isoc
4309 + URBs with isoc_out_done. Now we traverse all epids and for all that
4310 + have out Isoc traffic we traverse its URB list and complete the
4311 + transmitted URBs. */
4312 + epid_done = 0;
4313 + while (!epid_done) {
4314 +
4315 + /* Get the active urb (if any) */
4316 + urb = activeUrbList[epid];
4317 + if (urb == 0) {
4318 + isoc_dbg("No active URB on epid:%d anymore\n", epid);
4319 + epid_done = 1;
4320 + continue;
4321 + }
4322 +
4323 + /* Sanity check. */
4324 + ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
4325 + ASSERT(usb_pipeout(urb->pipe));
4326 +
4327 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4328 + ASSERT(urb_priv);
4329 +
4330 + if (!(urb_priv->isoc_out_done)) {
4331 + /* We have reached URB that isn't flaged done yet, stop traversing. */
4332 + isoc_dbg("Stoped traversing Out Isoc URBs on epid:%d"
4333 + " before not yet flaged URB:0x%x[%d]\n",
4334 + epid, (unsigned int)urb, urb_priv->urb_num);
4335 + epid_done = 1;
4336 + continue;
4337 + }
4338 +
4339 + /* This urb has been sent. */
4340 + isoc_dbg("Found URB:0x%x[%d] that is flaged isoc_out_done\n",
4341 + (unsigned int)urb, urb_priv->urb_num);
4342 +
4343 + /* Set ok on transfered packets for this URB and finish it */
4344 + for (i = 0; i < urb->number_of_packets; i++) {
4345 + packet = &urb->iso_frame_desc[i];
4346 + packet->status = 0;
4347 + packet->actual_length = packet->length;
4348 + }
4349 + urb_priv->isoc_packet_counter = urb->number_of_packets;
4350 + tc_finish_urb(comp_data->hcd, urb, 0);
4351 +
4352 + } /* END: while(!epid_done) */
4353 + } /* END: for(epid...) */
4354 +
4355 + local_irq_restore(flags);
4356 + kmem_cache_free(isoc_compl_cache, comp_data);
4357 +}
4358 +#endif
4359 +
4360 +static void check_finished_intr_tx_epids(struct usb_hcd *hcd) {
4361 + unsigned long flags;
4362 + int epid;
4363 + struct urb *urb;
4364 + struct crisv10_urb_priv * urb_priv;
4365 + volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
4366 + volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
4367 +
4368 + /* Protect TxintrEPList */
4369 + local_irq_save(flags);
4370 +
4371 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4372 + if(!epid_inuse(epid) || !epid_intr(epid) || !epid_out_traffic(epid)) {
4373 + /* Nothing to see on this epid. Only check valid Out Intr epids */
4374 + continue;
4375 + }
4376 +
4377 + urb = activeUrbList[epid];
4378 + if(urb == 0) {
4379 + intr_warn("Found Out Intr epid:%d with no active URB\n", epid);
4380 + continue;
4381 + }
4382 +
4383 + /* Sanity check. */
4384 + ASSERT(usb_pipetype(urb->pipe) == PIPE_INTERRUPT);
4385 + ASSERT(usb_pipeout(urb->pipe));
4386 +
4387 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4388 + ASSERT(urb_priv);
4389 +
4390 + /* Go through EPs between first and second sof-EP. It's here Out Intr EPs
4391 + are inserted.*/
4392 + curr_ep = &TxIntrEPList[0];
4393 + do {
4394 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
4395 + if(next_ep == urb_priv->intr_ep_pool[0]) {
4396 + /* We found the Out Intr EP for this epid */
4397 +
4398 + /* Disable it so it doesn't get processed again */
4399 + next_ep->command &= ~IO_MASK(USB_EP_command, enable);
4400 +
4401 + /* Finish the active Out Intr URB with status OK */
4402 + tc_finish_urb(hcd, urb, 0);
4403 + }
4404 + curr_ep = phys_to_virt(curr_ep->next);
4405 + } while (curr_ep != &TxIntrEPList[1]);
4406 +
4407 + }
4408 + local_irq_restore(flags);
4409 +}
4410 +
4411 +/* Interrupt handler for DMA8/IRQ24 with subchannels (called from hardware intr) */
4412 +static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc) {
4413 + struct usb_hcd *hcd = (struct usb_hcd*)vhc;
4414 + ASSERT(hcd);
4415 +
4416 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
4417 + /* Clear this interrupt */
4418 + *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
4419 + restart_dma8_sub0();
4420 + }
4421 +
4422 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
4423 + /* Clear this interrupt */
4424 + *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
4425 + check_finished_ctrl_tx_epids(hcd);
4426 + }
4427 +
4428 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
4429 + /* Clear this interrupt */
4430 + *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
4431 + check_finished_intr_tx_epids(hcd);
4432 + }
4433 +
4434 + /* hinko ignore usb_pipeisoc */
4435 +#if 0
4436 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
4437 + struct crisv10_isoc_complete_data* comp_data;
4438 +
4439 + /* Flag done Out Isoc for later completion */
4440 + check_finished_isoc_tx_epids();
4441 +
4442 + /* Clear this interrupt */
4443 + *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
4444 + /* Schedule bottom half of Out Isoc completion function. This function
4445 + finishes the URBs marked with isoc_out_done */
4446 + comp_data = (struct crisv10_isoc_complete_data*)
4447 + kmem_cache_alloc(isoc_compl_cache, GFP_ATOMIC);
4448 + ASSERT(comp_data != NULL);
4449 + comp_data ->hcd = hcd;
4450 +
4451 + //INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half, comp_data);
4452 + INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half);
4453 + schedule_work(&comp_data->usb_bh);
4454 + }
4455 +#endif
4456 +
4457 + return IRQ_HANDLED;
4458 +}
4459 +
4460 +/* Interrupt handler for DMA9/IRQ25 (called from hardware intr) */
4461 +static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc) {
4462 + unsigned long flags;
4463 + struct urb *urb;
4464 + struct usb_hcd *hcd = (struct usb_hcd*)vhc;
4465 + struct crisv10_urb_priv *urb_priv;
4466 + int epid = 0;
4467 + int real_error;
4468 +
4469 + ASSERT(hcd);
4470 +
4471 + /* Clear this interrupt. */
4472 + *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
4473 +
4474 + /* Custom clear interrupt for this interrupt */
4475 + /* The reason we cli here is that we call the driver's callback functions. */
4476 + local_irq_save(flags);
4477 +
4478 + /* Note that this while loop assumes that all packets span only
4479 + one rx descriptor. */
4480 + while(myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
4481 + epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
4482 + /* Get the active URB for this epid */
4483 + urb = activeUrbList[epid];
4484 +
4485 + ASSERT(epid_inuse(epid));
4486 + if (!urb) {
4487 + dma_err("No urb for epid %d in rx interrupt\n", epid);
4488 + goto skip_out;
4489 + }
4490 +
4491 + /* Check if any errors on epid */
4492 + real_error = 0;
4493 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
4494 + __u32 r_usb_ept_data;
4495 +
4496 + if (usb_pipeisoc(urb->pipe)) {
4497 + r_usb_ept_data = etrax_epid_iso_get(epid);
4498 + if((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
4499 + (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
4500 + (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
4501 + /* Not an error, just a failure to receive an expected iso
4502 + in packet in this frame. This is not documented
4503 + in the designers reference. Continue processing.
4504 + */
4505 + } else real_error = 1;
4506 + } else real_error = 1;
4507 + }
4508 +
4509 + if(real_error) {
4510 + dma_err("Error in RX descr on epid:%d for URB 0x%x",
4511 + epid, (unsigned int)urb);
4512 + dump_ept_data(epid);
4513 + dump_in_desc(myNextRxDesc);
4514 + goto skip_out;
4515 + }
4516 +
4517 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4518 + ASSERT(urb_priv);
4519 + ASSERT(urb_priv->urb_state == STARTED ||
4520 + urb_priv->urb_state == UNLINK);
4521 +
4522 + if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
4523 + (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
4524 + (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
4525 +
4526 + /* We get nodata for empty data transactions, and the rx descriptor's
4527 + hw_len field is not valid in that case. No data to copy in other
4528 + words. */
4529 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
4530 + /* No data to copy */
4531 + } else {
4532 + /*
4533 + dma_dbg("Processing RX for URB:0x%x epid:%d (data:%d ofs:%d)\n",
4534 + (unsigned int)urb, epid, myNextRxDesc->hw_len,
4535 + urb_priv->rx_offset);
4536 + */
4537 + /* Only copy data if URB isn't flaged to be unlinked*/
4538 + if(urb_priv->urb_state != UNLINK) {
4539 + /* Make sure the data fits in the buffer. */
4540 + if(urb_priv->rx_offset + myNextRxDesc->hw_len
4541 + <= urb->transfer_buffer_length) {
4542 +
4543 + /* Copy the data to URBs buffer */
4544 + memcpy(urb->transfer_buffer + urb_priv->rx_offset,
4545 + phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
4546 + urb_priv->rx_offset += myNextRxDesc->hw_len;
4547 + } else {
4548 + /* Signal overflow when returning URB */
4549 + urb->status = -EOVERFLOW;
4550 + tc_finish_urb_later(hcd, urb, urb->status);
4551 + }
4552 + }
4553 + }
4554 +
4555 + /* Check if it was the last packet in the transfer */
4556 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
4557 + /* Special handling for In Ctrl URBs. */
4558 + if(usb_pipecontrol(urb->pipe) && usb_pipein(urb->pipe) &&
4559 + !(urb_priv->ctrl_zout_done)) {
4560 + /* Flag that RX part of Ctrl transfer is done. Because zout descr
4561 + interrupt hasn't happend yet will the URB be finished in the
4562 + TX-Interrupt. */
4563 + urb_priv->ctrl_rx_done = 1;
4564 + tc_dbg("Not finishing In Ctrl URB:0x%x from rx_interrupt, waiting"
4565 + " for zout\n", (unsigned int)urb);
4566 + } else {
4567 + tc_finish_urb(hcd, urb, 0);
4568 + }
4569 + }
4570 + } else { /* ISOC RX */
4571 + /*
4572 + isoc_dbg("Processing RX for epid:%d (URB:0x%x) ISOC pipe\n",
4573 + epid, (unsigned int)urb);
4574 + */
4575 +
4576 + struct usb_iso_packet_descriptor *packet;
4577 +
4578 + if (urb_priv->urb_state == UNLINK) {
4579 + isoc_warn("Ignoring Isoc Rx data for urb being unlinked.\n");
4580 + goto skip_out;
4581 + } else if (urb_priv->urb_state == NOT_STARTED) {
4582 + isoc_err("What? Got Rx data for Isoc urb that isn't started?\n");
4583 + goto skip_out;
4584 + }
4585 +
4586 + packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
4587 + ASSERT(packet);
4588 + packet->status = 0;
4589 +
4590 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
4591 + /* We get nodata for empty data transactions, and the rx descriptor's
4592 + hw_len field is not valid in that case. We copy 0 bytes however to
4593 + stay in synch. */
4594 + packet->actual_length = 0;
4595 + } else {
4596 + packet->actual_length = myNextRxDesc->hw_len;
4597 + /* Make sure the data fits in the buffer. */
4598 + ASSERT(packet->actual_length <= packet->length);
4599 + memcpy(urb->transfer_buffer + packet->offset,
4600 + phys_to_virt(myNextRxDesc->buf), packet->actual_length);
4601 + if(packet->actual_length > 0)
4602 + isoc_dbg("Copied %d bytes, packet %d for URB:0x%x[%d]\n",
4603 + packet->actual_length, urb_priv->isoc_packet_counter,
4604 + (unsigned int)urb, urb_priv->urb_num);
4605 + }
4606 +
4607 + /* Increment the packet counter. */
4608 + urb_priv->isoc_packet_counter++;
4609 +
4610 + /* Note that we don't care about the eot field in the rx descriptor's
4611 + status. It will always be set for isoc traffic. */
4612 + if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
4613 + /* Complete the urb with status OK. */
4614 + tc_finish_urb(hcd, urb, 0);
4615 + }
4616 + }
4617 +
4618 + skip_out:
4619 + myNextRxDesc->status = 0;
4620 + myNextRxDesc->command |= IO_MASK(USB_IN_command, eol);
4621 + myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
4622 + myLastRxDesc = myNextRxDesc;
4623 + myNextRxDesc = phys_to_virt(myNextRxDesc->next);
4624 + flush_etrax_cache();
4625 + *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, restart);
4626 + }
4627 +
4628 + local_irq_restore(flags);
4629 +
4630 + return IRQ_HANDLED;
4631 +}
4632 +
4633 +static void tc_bulk_start_timer_func(unsigned long dummy) {
4634 + /* We might enable an EP descriptor behind the current DMA position when
4635 + it's about to decide that there are no more bulk traffic and it should
4636 + stop the bulk channel.
4637 + Therefore we periodically check if the bulk channel is stopped and there
4638 + is an enabled bulk EP descriptor, in which case we start the bulk
4639 + channel. */
4640 +
4641 + if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
4642 + int epid;
4643 +
4644 + timer_dbg("bulk_start_timer: Bulk DMA channel not running.\n");
4645 +
4646 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4647 + if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
4648 + timer_warn("Found enabled EP for epid %d, starting bulk channel.\n",
4649 + epid);
4650 + restart_dma8_sub0();
4651 +
4652 + /* Restart the bulk eot timer since we just started the bulk channel.*/
4653 + mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
4654 +
4655 + /* No need to search any further. */
4656 + break;
4657 + }
4658 + }
4659 + } else {
4660 + timer_dbg("bulk_start_timer: Bulk DMA channel running.\n");
4661 + }
4662 +}
4663 +
4664 +static void tc_bulk_eot_timer_func(unsigned long dummy) {
4665 + struct usb_hcd *hcd = (struct usb_hcd*)dummy;
4666 + ASSERT(hcd);
4667 + /* Because of a race condition in the top half, we might miss a bulk eot.
4668 + This timer "simulates" a bulk eot if we don't get one for a while,
4669 + hopefully correcting the situation. */
4670 + timer_dbg("bulk_eot_timer timed out.\n");
4671 + check_finished_bulk_tx_epids(hcd, 1);
4672 +}
4673 +
4674 +
4675 +/*************************************************************/
4676 +/*************************************************************/
4677 +/* Device driver block */
4678 +/*************************************************************/
4679 +/*************************************************************/
4680 +
4681 +/* Forward declarations for device driver functions */
4682 +static int devdrv_hcd_probe(struct device *);
4683 +static int devdrv_hcd_remove(struct device *);
4684 +#ifdef CONFIG_PM
4685 +static int devdrv_hcd_suspend(struct device *, u32, u32);
4686 +static int devdrv_hcd_resume(struct device *, u32);
4687 +#endif /* CONFIG_PM */
4688 +
4689 +/* the device */
4690 +static struct platform_device *devdrv_hc_platform_device;
4691 +
4692 +/* device driver interface */
4693 +static struct device_driver devdrv_hc_device_driver = {
4694 + .name = (char *) hc_name,
4695 + .bus = &platform_bus_type,
4696 +
4697 + .probe = devdrv_hcd_probe,
4698 + .remove = devdrv_hcd_remove,
4699 +
4700 +#ifdef CONFIG_PM
4701 + .suspend = devdrv_hcd_suspend,
4702 + .resume = devdrv_hcd_resume,
4703 +#endif /* CONFIG_PM */
4704 +};
4705 +
4706 +/* initialize the host controller and driver */
4707 +static int __init_or_module devdrv_hcd_probe(struct device *dev)
4708 +{
4709 + struct usb_hcd *hcd;
4710 + struct crisv10_hcd *crisv10_hcd;
4711 + int retval;
4712 +
4713 + /* Check DMA burst length */
4714 + if(IO_EXTRACT(R_BUS_CONFIG, dma_burst, *R_BUS_CONFIG) !=
4715 + IO_STATE(R_BUS_CONFIG, dma_burst, burst32)) {
4716 + devdrv_err("Invalid DMA burst length in Etrax 100LX,"
4717 + " needs to be 32\n");
4718 + return -EPERM;
4719 + }
4720 +
4721 + hcd = usb_create_hcd(&crisv10_hc_driver, dev, dev->bus_id);
4722 + if (!hcd)
4723 + return -ENOMEM;
4724 +
4725 + crisv10_hcd = hcd_to_crisv10_hcd(hcd);
4726 + spin_lock_init(&crisv10_hcd->lock);
4727 + crisv10_hcd->num_ports = num_ports();
4728 + crisv10_hcd->running = 0;
4729 +
4730 + dev_set_drvdata(dev, crisv10_hcd);
4731 +
4732 + devdrv_dbg("ETRAX USB IRQs HC:%d RX:%d TX:%d\n", ETRAX_USB_HC_IRQ,
4733 + ETRAX_USB_RX_IRQ, ETRAX_USB_TX_IRQ);
4734 +
4735 + /* Print out chip version read from registers */
4736 + int rev_maj = *R_USB_REVISION & IO_MASK(R_USB_REVISION, major);
4737 + int rev_min = *R_USB_REVISION & IO_MASK(R_USB_REVISION, minor);
4738 + if(rev_min == 0) {
4739 + devdrv_info("Etrax 100LX USB Revision %d v1,2\n", rev_maj);
4740 + } else {
4741 + devdrv_info("Etrax 100LX USB Revision %d v%d\n", rev_maj, rev_min);
4742 + }
4743 +
4744 + devdrv_info("Bulk timer interval, start:%d eot:%d\n",
4745 + BULK_START_TIMER_INTERVAL,
4746 + BULK_EOT_TIMER_INTERVAL);
4747 +
4748 +
4749 + /* Init root hub data structures */
4750 + if(rh_init()) {
4751 + devdrv_err("Failed init data for Root Hub\n");
4752 + retval = -ENOMEM;
4753 + }
4754 +
4755 + if(port_in_use(0)) {
4756 + if (cris_request_io_interface(if_usb_1, "ETRAX100LX USB-HCD")) {
4757 + printk(KERN_CRIT "usb-host: request IO interface usb1 failed");
4758 + retval = -EBUSY;
4759 + goto out;
4760 + }
4761 + devdrv_info("Claimed interface for USB physical port 1\n");
4762 + }
4763 + if(port_in_use(1)) {
4764 + if (cris_request_io_interface(if_usb_2, "ETRAX100LX USB-HCD")) {
4765 + /* Free first interface if second failed to be claimed */
4766 + if(port_in_use(0)) {
4767 + cris_free_io_interface(if_usb_1);
4768 + }
4769 + printk(KERN_CRIT "usb-host: request IO interface usb2 failed");
4770 + retval = -EBUSY;
4771 + goto out;
4772 + }
4773 + devdrv_info("Claimed interface for USB physical port 2\n");
4774 + }
4775 +
4776 + /* Init transfer controller structs and locks */
4777 + if((retval = tc_init(hcd)) != 0) {
4778 + goto out;
4779 + }
4780 +
4781 + /* Attach interrupt functions for DMA and init DMA controller */
4782 + if((retval = tc_dma_init(hcd)) != 0) {
4783 + goto out;
4784 + }
4785 +
4786 + /* Attach the top IRQ handler for USB controller interrupts */
4787 + if (request_irq(ETRAX_USB_HC_IRQ, crisv10_hcd_top_irq, 0,
4788 + "ETRAX 100LX built-in USB (HC)", hcd)) {
4789 + err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
4790 + retval = -EBUSY;
4791 + goto out;
4792 + }
4793 +
4794 + /* iso_eof is only enabled when isoc traffic is running. */
4795 + *R_USB_IRQ_MASK_SET =
4796 + /* IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) | */
4797 + IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
4798 + IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
4799 + IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
4800 + IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
4801 +
4802 +
4803 + crisv10_ready_wait();
4804 + /* Reset the USB interface. */
4805 + *R_USB_COMMAND =
4806 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
4807 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
4808 + IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
4809 +
4810 + /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to
4811 + 0x2A30 (10800), to guarantee that control traffic gets 10% of the
4812 + bandwidth, and periodic transfer may allocate the rest (90%).
4813 + This doesn't work though.
4814 + The value 11960 is chosen to be just after the SOF token, with a couple
4815 + of bit times extra for possible bit stuffing. */
4816 + *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
4817 +
4818 + crisv10_ready_wait();
4819 + /* Configure the USB interface as a host controller. */
4820 + *R_USB_COMMAND =
4821 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
4822 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
4823 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
4824 +
4825 +
4826 + /* Check so controller not busy before enabling ports */
4827 + crisv10_ready_wait();
4828 +
4829 + /* Enable selected USB ports */
4830 + if(port_in_use(0)) {
4831 + *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
4832 + } else {
4833 + *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
4834 + }
4835 + if(port_in_use(1)) {
4836 + *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
4837 + } else {
4838 + *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
4839 + }
4840 +
4841 + crisv10_ready_wait();
4842 + /* Start processing of USB traffic. */
4843 + *R_USB_COMMAND =
4844 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
4845 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
4846 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
4847 +
4848 + /* Do not continue probing initialization before USB interface is done */
4849 + crisv10_ready_wait();
4850 +
4851 + /* Register our Host Controller to USB Core
4852 + * Finish the remaining parts of generic HCD initialization: allocate the
4853 + * buffers of consistent memory, register the bus
4854 + * and call the driver's reset() and start() routines. */
4855 + retval = usb_add_hcd(hcd, ETRAX_USB_HC_IRQ, IRQF_DISABLED);
4856 + if (retval != 0) {
4857 + devdrv_err("Failed registering HCD driver\n");
4858 + goto out;
4859 + }
4860 +
4861 + return 0;
4862 +
4863 + out:
4864 + devdrv_hcd_remove(dev);
4865 + return retval;
4866 +}
4867 +
4868 +
4869 +/* cleanup after the host controller and driver */
4870 +static int __init_or_module devdrv_hcd_remove(struct device *dev)
4871 +{
4872 + struct crisv10_hcd *crisv10_hcd = dev_get_drvdata(dev);
4873 + struct usb_hcd *hcd;
4874 +
4875 + if (!crisv10_hcd)
4876 + return 0;
4877 + hcd = crisv10_hcd_to_hcd(crisv10_hcd);
4878 +
4879 +
4880 + /* Stop USB Controller in Etrax 100LX */
4881 + crisv10_hcd_reset(hcd);
4882 +
4883 + usb_remove_hcd(hcd);
4884 + devdrv_dbg("Removed HCD from USB Core\n");
4885 +
4886 + /* Free USB Controller IRQ */
4887 + free_irq(ETRAX_USB_HC_IRQ, NULL);
4888 +
4889 + /* Free resources */
4890 + tc_dma_destroy();
4891 + tc_destroy();
4892 +
4893 +
4894 + if(port_in_use(0)) {
4895 + cris_free_io_interface(if_usb_1);
4896 + }
4897 + if(port_in_use(1)) {
4898 + cris_free_io_interface(if_usb_2);
4899 + }
4900 +
4901 + devdrv_dbg("Freed all claimed resources\n");
4902 +
4903 + return 0;
4904 +}
4905 +
4906 +
4907 +#ifdef CONFIG_PM
4908 +
4909 +static int devdrv_hcd_suspend(struct usb_hcd *hcd, u32 state, u32 level)
4910 +{
4911 + return 0; /* no-op for now */
4912 +}
4913 +
4914 +static int devdrv_hcd_resume(struct usb_hcd *hcd, u32 level)
4915 +{
4916 + return 0; /* no-op for now */
4917 +}
4918 +
4919 +#endif /* CONFIG_PM */
4920 +
4921 +
4922 +
4923 +/*************************************************************/
4924 +/*************************************************************/
4925 +/* Module block */
4926 +/*************************************************************/
4927 +/*************************************************************/
4928 +
4929 +/* register driver */
4930 +static int __init module_hcd_init(void)
4931 +{
4932 +
4933 + if (usb_disabled())
4934 + return -ENODEV;
4935 +
4936 + /* Here we select enabled ports by following defines created from
4937 + menuconfig */
4938 +#ifndef CONFIG_ETRAX_USB_HOST_PORT1
4939 + ports &= ~(1<<0);
4940 +#endif
4941 +#ifndef CONFIG_ETRAX_USB_HOST_PORT2
4942 + ports &= ~(1<<1);
4943 +#endif
4944 +
4945 + printk(KERN_INFO "%s version "VERSION" "COPYRIGHT"\n", product_desc);
4946 +
4947 + devdrv_hc_platform_device =
4948 + platform_device_register_simple((char *) hc_name, 0, NULL, 0);
4949 +
4950 + if (IS_ERR(devdrv_hc_platform_device))
4951 + return PTR_ERR(devdrv_hc_platform_device);
4952 + return driver_register(&devdrv_hc_device_driver);
4953 + /*
4954 + * Note that we do not set the DMA mask for the device,
4955 + * i.e. we pretend that we will use PIO, since no specific
4956 + * allocation routines are needed for DMA buffers. This will
4957 + * cause the HCD buffer allocation routines to fall back to
4958 + * kmalloc().
4959 + */
4960 +}
4961 +
4962 +/* unregister driver */
4963 +static void __exit module_hcd_exit(void)
4964 +{
4965 + driver_unregister(&devdrv_hc_device_driver);
4966 +}
4967 +
4968 +
4969 +/* Module hooks */
4970 +module_init(module_hcd_init);
4971 +module_exit(module_hcd_exit);
4972 diff -x .org -x .orig -x '.c*' -x '.h*' -x .git -x .git -urN clean-2.6.25-rc8/drivers/usb/host/hc-crisv10.h source-2.6.25-rc8/drivers/usb/host/hc-crisv10.h
4973 --- clean-2.6.25-rc8/drivers/usb/host/hc-crisv10.h 1970-01-01 01:00:00.000000000 +0100
4974 +++ source-2.6.25-rc8/drivers/usb/host/hc-crisv10.h 2008-04-07 10:29:40.000000000 +0200
4975 @@ -0,0 +1,331 @@
4976 +#ifndef __LINUX_ETRAX_USB_H
4977 +#define __LINUX_ETRAX_USB_H
4978 +
4979 +#include <linux/types.h>
4980 +#include <linux/list.h>
4981 +
4982 +struct USB_IN_Desc {
4983 + volatile __u16 sw_len;
4984 + volatile __u16 command;
4985 + volatile unsigned long next;
4986 + volatile unsigned long buf;
4987 + volatile __u16 hw_len;
4988 + volatile __u16 status;
4989 +};
4990 +
4991 +struct USB_SB_Desc {
4992 + volatile __u16 sw_len;
4993 + volatile __u16 command;
4994 + volatile unsigned long next;
4995 + volatile unsigned long buf;
4996 +};
4997 +
4998 +struct USB_EP_Desc {
4999 + volatile __u16 hw_len;
5000 + volatile __u16 command;
5001 + volatile unsigned long sub;
5002 + volatile unsigned long next;
5003 +};
5004 +
5005 +
5006 +/* Root Hub port status struct */
5007 +struct crisv10_rh {
5008 + volatile __u16 wPortChange[2];
5009 + volatile __u16 wPortStatusPrev[2];
5010 +};
5011 +
5012 +/* HCD description */
5013 +struct crisv10_hcd {
5014 + spinlock_t lock;
5015 + __u8 num_ports;
5016 + __u8 running;
5017 +};
5018 +
5019 +
5020 +/* Endpoint HC private data description */
5021 +struct crisv10_ep_priv {
5022 + int epid;
5023 +};
5024 +
5025 +/* Additional software state info for a USB Controller epid */
5026 +struct etrax_epid {
5027 + __u8 inuse; /* !0 = setup in Etrax and used for a endpoint */
5028 + __u8 disabled; /* !0 = Temporarly disabled to avoid resubmission */
5029 + __u8 type; /* Setup as: PIPE_BULK, PIPE_CONTROL ... */
5030 + __u8 out_traffic; /* !0 = This epid is for out traffic */
5031 +};
5032 +
5033 +/* Struct to hold information of scheduled later URB completion */
5034 +struct urb_later_data {
5035 +// struct work_struct ws;
5036 + struct delayed_work ws;
5037 + struct usb_hcd *hcd;
5038 + struct urb *urb;
5039 + int urb_num;
5040 + int status;
5041 +};
5042 +
5043 +
5044 +typedef enum {
5045 + STARTED,
5046 + NOT_STARTED,
5047 + UNLINK,
5048 +} crisv10_urb_state_t;
5049 +
5050 +
5051 +struct crisv10_urb_priv {
5052 + /* Sequence number for this URB. Every new submited URB gets this from
5053 + a incrementing counter. Used when a URB is scheduled for later finish to
5054 + be sure that the intended URB hasn't already been completed (device
5055 + drivers has a tendency to reuse URBs once they are completed, causing us
5056 + to not be able to single old ones out only based on the URB pointer.) */
5057 + __u32 urb_num;
5058 +
5059 + /* The first_sb field is used for freeing all SB descriptors belonging
5060 + to an urb. The corresponding ep descriptor's sub pointer cannot be
5061 + used for this since the DMA advances the sub pointer as it processes
5062 + the sb list. */
5063 + struct USB_SB_Desc *first_sb;
5064 +
5065 + /* The last_sb field referes to the last SB descriptor that belongs to
5066 + this urb. This is important to know so we can free the SB descriptors
5067 + that ranges between first_sb and last_sb. */
5068 + struct USB_SB_Desc *last_sb;
5069 +
5070 + /* The rx_offset field is used in ctrl and bulk traffic to keep track
5071 + of the offset in the urb's transfer_buffer where incoming data should be
5072 + copied to. */
5073 + __u32 rx_offset;
5074 +
5075 + /* Counter used in isochronous transfers to keep track of the
5076 + number of packets received/transmitted. */
5077 + __u32 isoc_packet_counter;
5078 +
5079 + /* Flag that marks if this Isoc Out URB has finished it's transfer. Used
5080 + because several URBs can be finished before list is processed */
5081 + __u8 isoc_out_done;
5082 +
5083 + /* This field is used to pass information about the urb's current state
5084 + between the various interrupt handlers (thus marked volatile). */
5085 + volatile crisv10_urb_state_t urb_state;
5086 +
5087 + /* In Ctrl transfers consist of (at least) 3 packets: SETUP, IN and ZOUT.
5088 + When DMA8 sub-channel 2 has processed the SB list for this sequence we
5089 + get a interrupt. We also get a interrupt for In transfers and which
5090 + one of these interrupts that comes first depends of data size and device.
5091 + To be sure that we have got both interrupts before we complete the URB
5092 + we have these to flags that shows which part that has completed.
5093 + We can then check when we get one of the interrupts that if the other has
5094 + occured it's safe for us to complete the URB, otherwise we set appropriate
5095 + flag and do the completion when we get the other interrupt. */
5096 + volatile unsigned char ctrl_zout_done;
5097 + volatile unsigned char ctrl_rx_done;
5098 +
5099 + /* Connection between the submitted urb and ETRAX epid number */
5100 + __u8 epid;
5101 +
5102 + /* The rx_data_list field is used for periodic traffic, to hold
5103 + received data for later processing in the the complete_urb functions,
5104 + where the data us copied to the urb's transfer_buffer. Basically, we
5105 + use this intermediate storage because we don't know when it's safe to
5106 + reuse the transfer_buffer (FIXME?). */
5107 + struct list_head rx_data_list;
5108 +
5109 +
5110 + /* The interval time rounded up to closest 2^N */
5111 + int interval;
5112 +
5113 + /* Pool of EP descriptors needed if it's a INTR transfer.
5114 + Amount of EPs in pool correspons to how many INTR that should
5115 + be inserted in TxIntrEPList (max 128, defined by MAX_INTR_INTERVAL) */
5116 + struct USB_EP_Desc* intr_ep_pool[128];
5117 +
5118 + /* The mount of EPs allocated for this INTR URB */
5119 + int intr_ep_pool_length;
5120 +
5121 + /* Pointer to info struct if URB is scheduled to be finished later */
5122 + struct urb_later_data* later_data;
5123 +};
5124 +
5125 +
5126 +/* This struct is for passing data from the top half to the bottom half irq
5127 + handlers */
5128 +struct crisv10_irq_reg {
5129 + struct usb_hcd* hcd;
5130 + __u32 r_usb_epid_attn;
5131 + __u8 r_usb_status;
5132 + __u16 r_usb_rh_port_status_1;
5133 + __u16 r_usb_rh_port_status_2;
5134 + __u32 r_usb_irq_mask_read;
5135 + __u32 r_usb_fm_number;
5136 + struct work_struct usb_bh;
5137 +};
5138 +
5139 +
5140 +/* This struct is for passing data from the isoc top half to the isoc bottom
5141 + half. */
5142 +struct crisv10_isoc_complete_data {
5143 + struct usb_hcd *hcd;
5144 + struct urb *urb;
5145 + struct work_struct usb_bh;
5146 +};
5147 +
5148 +/* Entry item for URB lists for each endpint */
5149 +typedef struct urb_entry
5150 +{
5151 + struct urb *urb;
5152 + struct list_head list;
5153 +} urb_entry_t;
5154 +
5155 +/* ---------------------------------------------------------------------------
5156 + Virtual Root HUB
5157 + ------------------------------------------------------------------------- */
5158 +/* destination of request */
5159 +#define RH_INTERFACE 0x01
5160 +#define RH_ENDPOINT 0x02
5161 +#define RH_OTHER 0x03
5162 +
5163 +#define RH_CLASS 0x20
5164 +#define RH_VENDOR 0x40
5165 +
5166 +/* Requests: bRequest << 8 | bmRequestType */
5167 +#define RH_GET_STATUS 0x0080
5168 +#define RH_CLEAR_FEATURE 0x0100
5169 +#define RH_SET_FEATURE 0x0300
5170 +#define RH_SET_ADDRESS 0x0500
5171 +#define RH_GET_DESCRIPTOR 0x0680
5172 +#define RH_SET_DESCRIPTOR 0x0700
5173 +#define RH_GET_CONFIGURATION 0x0880
5174 +#define RH_SET_CONFIGURATION 0x0900
5175 +#define RH_GET_STATE 0x0280
5176 +#define RH_GET_INTERFACE 0x0A80
5177 +#define RH_SET_INTERFACE 0x0B00
5178 +#define RH_SYNC_FRAME 0x0C80
5179 +/* Our Vendor Specific Request */
5180 +#define RH_SET_EP 0x2000
5181 +
5182 +
5183 +/* Hub port features */
5184 +#define RH_PORT_CONNECTION 0x00
5185 +#define RH_PORT_ENABLE 0x01
5186 +#define RH_PORT_SUSPEND 0x02
5187 +#define RH_PORT_OVER_CURRENT 0x03
5188 +#define RH_PORT_RESET 0x04
5189 +#define RH_PORT_POWER 0x08
5190 +#define RH_PORT_LOW_SPEED 0x09
5191 +#define RH_C_PORT_CONNECTION 0x10
5192 +#define RH_C_PORT_ENABLE 0x11
5193 +#define RH_C_PORT_SUSPEND 0x12
5194 +#define RH_C_PORT_OVER_CURRENT 0x13
5195 +#define RH_C_PORT_RESET 0x14
5196 +
5197 +/* Hub features */
5198 +#define RH_C_HUB_LOCAL_POWER 0x00
5199 +#define RH_C_HUB_OVER_CURRENT 0x01
5200 +
5201 +#define RH_DEVICE_REMOTE_WAKEUP 0x00
5202 +#define RH_ENDPOINT_STALL 0x01
5203 +
5204 +/* Our Vendor Specific feature */
5205 +#define RH_REMOVE_EP 0x00
5206 +
5207 +
5208 +#define RH_ACK 0x01
5209 +#define RH_REQ_ERR -1
5210 +#define RH_NACK 0x00
5211 +
5212 +/* Field definitions for */
5213 +
5214 +#define USB_IN_command__eol__BITNR 0 /* command macros */
5215 +#define USB_IN_command__eol__WIDTH 1
5216 +#define USB_IN_command__eol__no 0
5217 +#define USB_IN_command__eol__yes 1
5218 +
5219 +#define USB_IN_command__intr__BITNR 3
5220 +#define USB_IN_command__intr__WIDTH 1
5221 +#define USB_IN_command__intr__no 0
5222 +#define USB_IN_command__intr__yes 1
5223 +
5224 +#define USB_IN_status__eop__BITNR 1 /* status macros. */
5225 +#define USB_IN_status__eop__WIDTH 1
5226 +#define USB_IN_status__eop__no 0
5227 +#define USB_IN_status__eop__yes 1
5228 +
5229 +#define USB_IN_status__eot__BITNR 5
5230 +#define USB_IN_status__eot__WIDTH 1
5231 +#define USB_IN_status__eot__no 0
5232 +#define USB_IN_status__eot__yes 1
5233 +
5234 +#define USB_IN_status__error__BITNR 6
5235 +#define USB_IN_status__error__WIDTH 1
5236 +#define USB_IN_status__error__no 0
5237 +#define USB_IN_status__error__yes 1
5238 +
5239 +#define USB_IN_status__nodata__BITNR 7
5240 +#define USB_IN_status__nodata__WIDTH 1
5241 +#define USB_IN_status__nodata__no 0
5242 +#define USB_IN_status__nodata__yes 1
5243 +
5244 +#define USB_IN_status__epid__BITNR 8
5245 +#define USB_IN_status__epid__WIDTH 5
5246 +
5247 +#define USB_EP_command__eol__BITNR 0
5248 +#define USB_EP_command__eol__WIDTH 1
5249 +#define USB_EP_command__eol__no 0
5250 +#define USB_EP_command__eol__yes 1
5251 +
5252 +#define USB_EP_command__eof__BITNR 1
5253 +#define USB_EP_command__eof__WIDTH 1
5254 +#define USB_EP_command__eof__no 0
5255 +#define USB_EP_command__eof__yes 1
5256 +
5257 +#define USB_EP_command__intr__BITNR 3
5258 +#define USB_EP_command__intr__WIDTH 1
5259 +#define USB_EP_command__intr__no 0
5260 +#define USB_EP_command__intr__yes 1
5261 +
5262 +#define USB_EP_command__enable__BITNR 4
5263 +#define USB_EP_command__enable__WIDTH 1
5264 +#define USB_EP_command__enable__no 0
5265 +#define USB_EP_command__enable__yes 1
5266 +
5267 +#define USB_EP_command__hw_valid__BITNR 5
5268 +#define USB_EP_command__hw_valid__WIDTH 1
5269 +#define USB_EP_command__hw_valid__no 0
5270 +#define USB_EP_command__hw_valid__yes 1
5271 +
5272 +#define USB_EP_command__epid__BITNR 8
5273 +#define USB_EP_command__epid__WIDTH 5
5274 +
5275 +#define USB_SB_command__eol__BITNR 0 /* command macros. */
5276 +#define USB_SB_command__eol__WIDTH 1
5277 +#define USB_SB_command__eol__no 0
5278 +#define USB_SB_command__eol__yes 1
5279 +
5280 +#define USB_SB_command__eot__BITNR 1
5281 +#define USB_SB_command__eot__WIDTH 1
5282 +#define USB_SB_command__eot__no 0
5283 +#define USB_SB_command__eot__yes 1
5284 +
5285 +#define USB_SB_command__intr__BITNR 3
5286 +#define USB_SB_command__intr__WIDTH 1
5287 +#define USB_SB_command__intr__no 0
5288 +#define USB_SB_command__intr__yes 1
5289 +
5290 +#define USB_SB_command__tt__BITNR 4
5291 +#define USB_SB_command__tt__WIDTH 2
5292 +#define USB_SB_command__tt__zout 0
5293 +#define USB_SB_command__tt__in 1
5294 +#define USB_SB_command__tt__out 2
5295 +#define USB_SB_command__tt__setup 3
5296 +
5297 +
5298 +#define USB_SB_command__rem__BITNR 8
5299 +#define USB_SB_command__rem__WIDTH 6
5300 +
5301 +#define USB_SB_command__full__BITNR 6
5302 +#define USB_SB_command__full__WIDTH 1
5303 +#define USB_SB_command__full__no 0
5304 +#define USB_SB_command__full__yes 1
5305 +
5306 +#endif
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