ar71xx: fix wireless mac address on the TL-WR741ND
[openwrt.git] / target / linux / pxa / patches / 003-gumstix_h_verdex_pro_support.patch
1 From adb6abbe4e3bc17c20cdc70e4a4357f1633d4970 Mon Sep 17 00:00:00 2001
2 From: Joseph Kortje <jpktech@rogers.com>
3 Date: Wed, 28 Oct 2009 21:49:11 -0400
4 Subject: [PATCH] [ARM] gumstix.h: Verdex Pro support
5
6 Added a bunch of ifdefs to support both original gumstix boards
7 as well as the Verdex Pro in gumstix.h
8
9 Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
10 ---
11 arch/arm/mach-pxa/include/mach/gumstix.h | 160 ++++++++++++++++++++++++------
12 1 files changed, 130 insertions(+), 30 deletions(-)
13
14 --- a/arch/arm/mach-pxa/include/mach/gumstix.h
15 +++ b/arch/arm/mach-pxa/include/mach/gumstix.h
16 @@ -6,6 +6,9 @@
17 * published by the Free Software Foundation.
18 */
19
20 +#if !defined(__ASM_ARCH_MFP_PXA27X_H) && !defined(__ASM_ARCH_MFP_PXA25X_H)
21 + #error You need to include either mfp-pxa27x.h or mfp-pxa25x.h
22 +#endif
23
24 /* BTRESET - Reset line to Bluetooth module, active low signal. */
25 #define GPIO_GUMSTIX_BTRESET 7
26 @@ -28,9 +31,18 @@ has detected a cable insertion; driven l
27
28 #else
29
30 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
31 +
32 #define GPIO_GUMSTIX_USB_GPIOn 35
33 #define GPIO_GUMSTIX_USB_GPIOx 41
34
35 +#else
36 +
37 +#define GPIO_GUMSTIX_USB_GPIOn 100
38 +#define GPIO_GUMSTIX_USB_GPIOx 27
39 +
40 +#endif
41 +
42 #endif
43
44 /* usb state change */
45 @@ -52,48 +64,136 @@ has detected a cable insertion; driven l
46 * ETH_RST provides a hardware reset line to the ethernet chip
47 * ETH is the IRQ line in from the ethernet chip to the PXA
48 */
49 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
50 #define GPIO_GUMSTIX_ETH0_RST 80
51 -#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
52 +#define GPIO_GUMSTIX_ETH0 36
53 +#else
54 +#define GPIO_GUMSTIX_ETH0_RST 107
55 +#define GPIO_GUMSTIX_ETH0 99
56 +#endif
57 #define GPIO_GUMSTIX_ETH1_RST 52
58 -#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
59 +#define GPIO_GUMSTIX_ETH1 27
60
61 -#define GPIO_GUMSTIX_ETH0 36
62 +#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
63 +#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
64 #define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
65 -#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
66 -#define GPIO_GUMSTIX_ETH1 27
67 #define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
68 -#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
69
70 +#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
71 +#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
72
73 /* CF reset line */
74 -#define GPIO8_RESET 8
75 +#define GPIO8_CF_RESET 8
76 +#define GPIO97_CF_RESET 97
77 +#define GPIO110_CF_RESET 110
78 +
79 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
80 +#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
81 +#else
82 +#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
83 +#endif
84 +
85 +#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
86 +
87 +/* CF signals shared by both sockets */
88 +#define GPIO_GUMSTIX_nPOE 48
89 +#define GPIO_GUMSTIX_nPWE 49
90 +#define GPIO_GUMSTIX_nPIOR 50
91 +#define GPIO_GUMSTIX_nPIOW 51
92 +
93 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
94 +#define GPIO_GUMSTIX_nPCE_1 52
95 +#define GPIO_GUMSTIX_nPCE_2 53
96 +#define GPIO_GUMSTIX_pSKTSEL 54
97 +#else
98 +#define GPIO_GUMSTIX_nPCE_1 102
99 +#define GPIO_GUMSTIX_nPCE_2 105
100 +#define GPIO_GUMSTIX_pSKTSEL 79
101 +#endif
102 +
103 +#define GPIO_GUMSTIX_nPREG 55
104 +#define GPIO_GUMSTIX_nPWAIT 56
105 +#define GPIO_GUMSTIX_nIOIS16 57
106 +
107 +/* Pin mode definitions correspond to mfp-pxa2[57]x.h */
108 +#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE
109 +#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE
110 +#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR
111 +#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW
112 +
113 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
114 +#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1
115 +#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2
116 +#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL
117 +#else
118 +#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1
119 +#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2
120 +#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL
121 +#endif
122 +
123 +#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG
124 +#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT
125 +#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16
126
127 /* CF slot 0 */
128 -#define GPIO4_nBVD1 4
129 -#define GPIO4_nSTSCHG GPIO4_nBVD1
130 -#define GPIO11_nCD 11
131 -#define GPIO26_PRDY_nBSY 26
132 -#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG)
133 -#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD)
134 -#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY)
135 +#define GPIO4_nBVD1_0 4
136 +#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
137 +#define GPIO11_nCD_0 11
138 +#define GPIO26_PRDY_nBSY_0 26
139 +
140 +#define GPIO111_nBVD1_0 111
141 +#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
142 +#define GPIO104_nCD_0 104
143 +#define GPIO96_PRDY_nBSY_0 96
144 +#define GPIO109_PRDY_nBSY_0 109
145 +
146 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
147 +#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
148 +#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
149 +#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
150 +#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
151 +#else
152 +#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
153 +#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
154 +#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
155 +#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
156 +#endif
157 +
158 +#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
159 +
160 +#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
161 +#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
162 +#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
163 +#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
164
165 /* CF slot 1 */
166 -#define GPIO18_nBVD1 18
167 -#define GPIO18_nSTSCHG GPIO18_nBVD1
168 -#define GPIO36_nCD 36
169 -#define GPIO27_PRDY_nBSY 27
170 -#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG)
171 -#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD)
172 -#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY)
173 -
174 -/* CF GPIO line modes */
175 -#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
176 -#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT)
177 -#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN)
178 -#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN)
179 -#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN)
180 -#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN)
181 -#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN)
182 +#define GPIO18_nBVD1_1 18
183 +#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
184 +#define GPIO36_nCD_1 36
185 +#define GPIO27_PRDY_nBSY_1 27
186 +
187 +#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
188 +#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
189 +#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
190 +#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
191 +
192 +#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
193 +#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
194 +#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
195 +
196 +/* CF GPIO line modes - correspond to mfp-pxa2[57]x.h */
197 +#define GPIO_GUMSTIX_CF_RESET_MD ( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
198 +#define GPIO_GUMSTIX_CF_OLD_RESET_MD ( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
199 +
200 +#define GPIO_GUMSTIX_nSTSCHG_0_MD GPIO111_GPIO
201 +#define GPIO_GUMSTIX_nCD_0_MD GPIO104_GPIO
202 +
203 +#define GPIO_GUMSTIX_PRDY_nBSY_0_MD GPIO96_GPIO
204 +#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD GPIO109_GPIO
205 +
206 +#define GPIO_GUMSTIX_nSTSCHG_1_MD GPIO18_GPIO
207 +#define GPIO_GUMSTIX_nCD_1_MD GPIO36_GPIO
208 +#define GPIO_GUMSTIX_PRDY_nBSY_1_MD GPIO27_GPIO
209
210 /* for expansion boards that can't be programatically detected */
211 extern int am200_init(void);
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