target/linux/ppc40x/patches-2.6.30/100-magicbox-ide-driver.patch

   1 --- a/drivers/ide/Kconfig
   2 +++ b/drivers/ide/Kconfig
   3 @@ -717,6 +717,11 @@ config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
   4         depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
   5  endchoice
   6
   7 +config BLK_DEV_IDE_MAGICBOX
   8 +       tristate "Magicbox CF card support"
   9 +       depends on MAGICBOX || OPENRB_LIGHT
  10 +       select IDE_XFER_MODE
  11 +
  12  config BLK_DEV_IDE_TX4938
  13         tristate "TX4938 internal IDE support"
  14         depends on SOC_TX4938
  15 --- a/drivers/ide/Makefile
  16 +++ b/drivers/ide/Makefile
  17 @@ -113,6 +113,7 @@ obj-$(CONFIG_BLK_DEV_IDE_RAPIDE)    += rapi
  18  obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710)  += palm_bk3710.o
  19
  20  obj-$(CONFIG_BLK_DEV_IDE_AU1XXX)       += au1xxx-ide.o
  21 +obj-$(CONFIG_BLK_DEV_IDE_MAGICBOX)     += magicbox_ide.o
  22
  23  obj-$(CONFIG_BLK_DEV_IDE_TX4938)       += tx4938ide.o
  24  obj-$(CONFIG_BLK_DEV_IDE_TX4939)       += tx4939ide.o
  25 --- /dev/null
  26 +++ b/drivers/ide/magicbox_ide.c
  27 @@ -0,0 +1,293 @@
  28 +/*
  29 + *  IDE driver for the MagicBox 2.0 onboard CompactFlash slot.
  30 + *
  31 + *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
  32 + *
  33 + *  Based on the original driver by Wojtek Kaniewski <wojtekka@toxygen.net>
  34 + *
  35 + *  This program is free software; you can redistribute it and/or modify it
  36 + *  under the terms of the GNU General Public License version 2 as published
  37 + *  by the Free Software Foundation.
  38 + */
  39 +
  40 +#include <linux/types.h>
  41 +#include <linux/ioport.h>
  42 +#include <linux/of.h>
  43 +#include <linux/of_device.h>
  44 +#include <linux/of_platform.h>
  45 +#include <linux/ide.h>
  46 +
  47 +#define DRV_DESC       "IDE driver for Magicbox 2.0 onboard CF slot"
  48 +#define DRV_NAME       "magicbox_cf"
  49 +
  50 +static inline u8 magicbox_ide_inb(unsigned long port)
  51 +{
  52 +       return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
  53 +}
  54 +
  55 +static inline void magicbox_ide_outb(u8 value, unsigned long port)
  56 +{
  57 +       writew(value << 8, (void __iomem *) port);
  58 +}
  59 +
  60 +static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
  61 +{
  62 +       u16 *ptr;
  63 +
  64 +       for (ptr = addr; count--; ptr++)
  65 +               *ptr = readw((void __iomem *) port);
  66 +}
  67 +
  68 +static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
  69 +{
  70 +       u32 *ptr;
  71 +
  72 +       for (ptr = addr; count--; ptr++)
  73 +               *ptr = readl((void __iomem *) port);
  74 +}
  75 +
  76 +static inline void magicbox_ide_outsw(unsigned long port, void *addr,
  77 +                                       u32 count)
  78 +{
  79 +       u16 *ptr;
  80 +
  81 +       for (ptr = addr; count--; ptr++)
  82 +               writew(*ptr, (void __iomem *) port);
  83 +}
  84 +
  85 +static inline void magicbox_ide_outsl(unsigned long port, void *addr,
  86 +                                       u32 count)
  87 +{
  88 +       u32 *ptr;
  89 +
  90 +       for (ptr = addr; count--; ptr++)
  91 +               writel(*ptr, (void __iomem *) port);
  92 +}
  93 +
  94 +static void magicbox_ide_exec_command(ide_hwif_t *hwif, u8 cmd)
  95 +{
  96 +       magicbox_ide_outb(cmd, hwif->io_ports.command_addr);
  97 +}
  98 +
  99 +static u8 magicbox_ide_read_status(ide_hwif_t *hwif)
 100 +{
 101 +       return magicbox_ide_inb(hwif->io_ports.status_addr);
 102 +}
 103 +
 104 +static u8 magicbox_ide_read_altstatus(ide_hwif_t *hwif)
 105 +{
 106 +       return magicbox_ide_inb(hwif->io_ports.ctl_addr);
 107 +}
 108 +
 109 +static void magicbox_ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
 110 +{
 111 +       magicbox_ide_outb(ctl, hwif->io_ports.ctl_addr);
 112 +}
 113 +
 114 +static void magicbox_ide_tf_load(ide_drive_t *drive, struct ide_taskfile *tf,
 115 +                                u8 valid)
 116 +{
 117 +       struct ide_io_ports *io_ports = &drive->hwif->io_ports;
 118 +
 119 +       if (valid & IDE_VALID_FEATURE)
 120 +               magicbox_ide_outb(tf->feature, io_ports->feature_addr);
 121 +       if (valid & IDE_VALID_NSECT)
 122 +               magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
 123 +       if (valid & IDE_VALID_LBAL)
 124 +               magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
 125 +       if (valid & IDE_VALID_LBAM)
 126 +               magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
 127 +       if (valid & IDE_VALID_LBAH)
 128 +               magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
 129 +
 130 +       if (valid & IDE_VALID_DEVICE)
 131 +               magicbox_ide_outb(tf->device, io_ports->device_addr);
 132 +}
 133 +
 134 +static void magicbox_ide_tf_read(ide_drive_t *drive, struct ide_taskfile *tf,
 135 +                                u8 valid)
 136 +{
 137 +       struct ide_io_ports *io_ports = &drive->hwif->io_ports;
 138 +
 139 +       if (valid & IDE_VALID_NSECT)
 140 +               tf->nsect  = magicbox_ide_inb(io_ports->nsect_addr);
 141 +       if (valid & IDE_VALID_LBAL)
 142 +               tf->lbal   = magicbox_ide_inb(io_ports->lbal_addr);
 143 +       if (valid & IDE_VALID_LBAM)
 144 +               tf->lbam   = magicbox_ide_inb(io_ports->lbam_addr);
 145 +       if (valid & IDE_VALID_LBAH)
 146 +               tf->lbah   = magicbox_ide_inb(io_ports->lbah_addr);
 147 +       if (valid & IDE_VALID_DEVICE)
 148 +               tf->device = magicbox_ide_inb(io_ports->device_addr);
 149 +}
 150 +
 151 +static void magicbox_ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd,
 152 +                          void *buf, unsigned int len)
 153 +{
 154 +       unsigned long port = drive->hwif->io_ports.data_addr;
 155 +
 156 +       len++;
 157 +
 158 +       if (drive->io_32bit) {
 159 +               magicbox_ide_insl(port, buf, len / 4);
 160 +
 161 +               if ((len & 3) >= 2)
 162 +                       magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
 163 +       } else {
 164 +               magicbox_ide_insw(port, buf, len / 2);
 165 +       }
 166 +}
 167 +
 168 +static void magicbox_ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd,
 169 +                           void *buf, unsigned int len)
 170 +{
 171 +       unsigned long port = drive->hwif->io_ports.data_addr;
 172 +
 173 +       len++;
 174 +
 175 +       if (drive->io_32bit) {
 176 +               magicbox_ide_outsl(port, buf, len / 4);
 177 +
 178 +               if ((len & 3) >= 2)
 179 +                       magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
 180 +       } else {
 181 +               magicbox_ide_outsw(port, buf, len / 2);
 182 +       }
 183 +}
 184 +
 185 +static void magicbox_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
 186 +{
 187 +}
 188 +
 189 +static u8 magicbox_ide_cable_detect(ide_hwif_t *hwif)
 190 +{
 191 +       return ATA_CBL_PATA40;
 192 +}
 193 +
 194 +static const struct ide_tp_ops magicbox_ide_tp_ops = {
 195 +       .exec_command   = magicbox_ide_exec_command,
 196 +       .read_status    = magicbox_ide_read_status,
 197 +       .read_altstatus = magicbox_ide_read_altstatus,
 198 +       .write_devctl   = magicbox_ide_write_devctl,
 199 +
 200 +       .dev_select     = ide_dev_select,
 201 +       .tf_load        = magicbox_ide_tf_load,
 202 +       .tf_read        = magicbox_ide_tf_read,
 203 +
 204 +       .input_data     = magicbox_ide_input_data,
 205 +       .output_data    = magicbox_ide_output_data,
 206 +};
 207 +
 208 +static const struct ide_port_ops magicbox_ide_port_ops = {
 209 +       .set_pio_mode   = magicbox_ide_set_pio_mode,
 210 +       .cable_detect   = magicbox_ide_cable_detect,
 211 +};
 212 +
 213 +static const struct ide_port_info magicbox_ide_port_info = {
 214 +       .name           = DRV_NAME,
 215 +       .chipset        = ide_generic,
 216 +       .tp_ops         = &magicbox_ide_tp_ops,
 217 +       .port_ops       = &magicbox_ide_port_ops,
 218 +       .host_flags     = IDE_HFLAG_SINGLE |
 219 +                         IDE_HFLAG_NO_DMA |
 220 +                         IDE_HFLAG_MMIO |
 221 +                         IDE_HFLAG_UNMASK_IRQS,
 222 +       .pio_mask       = ATA_PIO4,
 223 +};
 224 +
 225 +static inline void magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
 226 +                                        u16 __iomem *ctrl, int irq)
 227 +{
 228 +       unsigned long port = (unsigned long) base;
 229 +       int i;
 230 +
 231 +       memset(hw, 0, sizeof(*hw));
 232 +       for (i = 0; i <= 7; i++)
 233 +               hw->io_ports_array[i] = port + i * 2;
 234 +
 235 +       /*
 236 +        * the IDE control register is at ATA address 6,
 237 +        * with CS1 active instead of CS0
 238 +        */
 239 +       hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
 240 +       hw->irq = irq;
 241 +       hw->chipset = ide_generic;
 242 +       hw->ack_intr = NULL;
 243 +}
 244 +
 245 +static int __devinit magicbox_ide_of_probe(struct of_device *op,
 246 +                                          const struct of_device_id *match)
 247 +{
 248 +       hw_regs_t hw;
 249 +       hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
 250 +       struct ide_host *host;
 251 +       u16 __iomem *base;
 252 +       u16 __iomem *ctrl;
 253 +       int irq;
 254 +       int ret = 0;
 255 +
 256 +       irq = irq_of_parse_and_map(op->node, 0);
 257 +       if (irq < 0) {
 258 +               dev_err(&op->dev, "invalid irq\n");
 259 +               ret = -EINVAL;
 260 +               goto err_exit;
 261 +       }
 262 +
 263 +       base = of_iomap(op->node, 0);
 264 +       if (base == NULL) {
 265 +               ret = -ENOMEM;
 266 +               goto err_exit;
 267 +       }
 268 +
 269 +       ctrl = of_iomap(op->node, 1);
 270 +       if (ctrl == NULL) {
 271 +               ret = -ENOMEM;
 272 +               goto err_unmap_base;
 273 +       }
 274 +
 275 +       hw.dev = &op->dev;
 276 +       magicbox_ide_setup_hw(&hw, base, ctrl, irq);
 277 +
 278 +       ret = ide_host_add(&magicbox_ide_port_info, hws, &host);
 279 +       if (ret)
 280 +               goto err_unmap_ctrl;
 281 +
 282 +       dev_set_drvdata(&op->dev, host);
 283 +
 284 +       return 0;
 285 +
 286 + err_unmap_ctrl:
 287 +       iounmap(ctrl);
 288 + err_unmap_base:
 289 +       iounmap(base);
 290 + err_exit:
 291 +       return ret;
 292 +}
 293 +
 294 +static struct of_device_id magicbox_ide_of_match[] = {
 295 +       { .compatible = "magicbox-cf", },
 296 +       {},
 297 +};
 298 +
 299 +static struct of_platform_driver magicbox_ide_of_platform_driver = {
 300 +       .owner          = THIS_MODULE,
 301 +       .name           = DRV_NAME,
 302 +       .match_table    = magicbox_ide_of_match,
 303 +       .probe          = magicbox_ide_of_probe,
 304 +       .driver         = {
 305 +               .name   = DRV_NAME,
 306 +               .owner  = THIS_MODULE,
 307 +       },
 308 +};
 309 +
 310 +static int __init magicbox_ide_init(void)
 311 +{
 312 +       return of_register_platform_driver(&magicbox_ide_of_platform_driver);
 313 +}
 314 +
 315 +module_init(magicbox_ide_init);
 316 +
 317 +MODULE_DESCRIPTION(DRV_DESC);
 318 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 319 +MODULE_LICENSE("GPL v2");
 320 +MODULE_DEVICE_TABLE(of, magicbox_ide_of_match);