target/linux/s3c24xx/patches-2.6.31/001-s3c-cpu.patch

   1 diff --git a/arch/arm/plat-s3c/include/mach/cpu.h b/arch/arm/plat-s3c/include/mach/cpu.h
   2 new file mode 100644
   3 index 0000000..cd260b1
   4 --- /dev/null
   5 +++ b/arch/arm/plat-s3c/include/mach/cpu.h
   6 @@ -0,0 +1,165 @@
   7 +/*
   8 + * arch/arm/plat-s3c/include/mach/cpu.h
   9 + *
  10 + *  S3C cpu type detection
  11 + *
  12 + *  Copyright (C) 2008 Samsung Electronics
  13 + *  Kyungmin Park <kyungmin.park@samsung.com>
  14 + *
  15 + * Derived from OMAP cpu.h
  16 + *
  17 + * This program is free software; you can redistribute it and/or modify
  18 + * it under the terms of the GNU General Public License as published by
  19 + * the Free Software Foundation; either version 2 of the License, or
  20 + * (at your option) any later version.
  21 + *
  22 + * This program is distributed in the hope that it will be useful,
  23 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25 + * GNU General Public License for more details.
  26 + *
  27 + * You should have received a copy of the GNU General Public License
  28 + * along with this program; if not, write to the Free Software
  29 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30 + */
  31 +
  32 +#ifndef __ASM_ARCH_S3C_CPU_H
  33 +#define __ASM_ARCH_S3C_CPU_H
  34 +
  35 +extern unsigned int system_rev;
  36 +
  37 +#define S3C_SYSTEM_REV_ATAG (system_rev & 0xffff)
  38 +#define S3C_SYSTEM_REV_CPU (system_rev & 0xffff0000)
  39 +
  40 +/*
  41 + * cpu_is_s3c24xx():   True for s3c2400, s3c2410, s3c2440 and so on
  42 + * cpu_is_s3c241x():   True fro s3c2410, s3c2412
  43 + * cpu_is_s3c244x():   True fro s3c2440, s3c2442, s3c2443
  44 + * cpu_is_s3c64xx():   True for s3c6400, s3c6410
  45 + */
  46 +#define GET_S3C_CLASS  ((system_rev >> 24) & 0xff)
  47 +
  48 +#define IS_S3C_CLASS(class, id)                                                \
  49 +static inline int is_s3c ##class (void)                                        \
  50 +{                                                                      \
  51 +       return (GET_S3C_CLASS == (id)) ? 1 : 0;                         \
  52 +}
  53 +
  54 +#define GET_S3C_SUBCLASS       ((system_rev >> 20) & 0xfff)
  55 +
  56 +#define IS_S3C_SUBCLASS(subclass, id)                                  \
  57 +static inline int is_s3c ##subclass (void)                             \
  58 +{                                                                      \
  59 +       return (GET_S3C_SUBCLASS == (id)) ? 1 : 0;                      \
  60 +}
  61 +
  62 +IS_S3C_CLASS(24xx, 0x24)
  63 +IS_S3C_CLASS(64xx, 0x64)
  64 +
  65 +IS_S3C_SUBCLASS(241x, 0x241)
  66 +IS_S3C_SUBCLASS(244x, 0x244)
  67 +
  68 +#define cpu_is_s3c24xx()               0
  69 +#define cpu_is_s3c241x()               0
  70 +#define cpu_is_s3c244x()               0
  71 +#define cpu_is_s3c64xx()               0
  72 +
  73 +#if defined(CONFIG_ARCH_S3C2410)
  74 +# undef  cpu_is_s3c24xx
  75 +# undef  cpu_is_s3c241x
  76 +# undef  cpu_is_s3c244x
  77 +# define cpu_is_s3c24xx()              is_s3c24xx()
  78 +# define cpu_is_s3c241x()              is_s3c241x()
  79 +# define cpu_is_s3c244x()              is_s3c244x()
  80 +#endif
  81 +
  82 +#if defined(CONFIG_ARCH_S3C64XX)
  83 +# undef  cpu_is_s3c64xx
  84 +# define cpu_is_s3c64xx()              is_s3c64xx()
  85 +#endif
  86 +
  87 +/*
  88 + * Macros to detect individual cpu types.
  89 + * cpu_is_s3c2410():   True for s3c2410
  90 + * cpu_is_s3c2440():   True for s3c2440
  91 + * cpu_is_s3c6400():   True for s3c6400
  92 + * cpu_is_s3c6410():   True for s3c6410
  93 + *
  94 + * Exception:
  95 + * Store Revision A to 1
  96 + * s3c2410a -> s3c2411
  97 + * s3c2440a -> s3c2441
  98 + */
  99 +
 100 +#define GET_S3C_TYPE   ((system_rev >> 16) & 0xffff)
 101 +
 102 +#define IS_S3C_TYPE(type, id)                                          \
 103 +static inline int is_s3c ##type (void)                                 \
 104 +{                                                                      \
 105 +       return (GET_S3C_TYPE == (id)) ? 1 : 0;                          \
 106 +}
 107 +
 108 +IS_S3C_TYPE(2400, 0x2400)
 109 +IS_S3C_TYPE(2410, 0x2410)
 110 +IS_S3C_TYPE(2410a, 0x2411)
 111 +IS_S3C_TYPE(2412, 0x2412)
 112 +IS_S3C_TYPE(2440, 0x2440)
 113 +IS_S3C_TYPE(2440a, 0x2441)
 114 +IS_S3C_TYPE(2442, 0x2442)
 115 +IS_S3C_TYPE(2443, 0x2443)
 116 +IS_S3C_TYPE(6400, 0x6400)
 117 +IS_S3C_TYPE(6410, 0x6410)
 118 +
 119 +#define cpu_is_s3c2400()               0
 120 +#define cpu_is_s3c2410()               0
 121 +#define cpu_is_s3c2410a()              0
 122 +#define cpu_is_s3c2412()               0
 123 +#define cpu_is_s3c2440()               0
 124 +#define cpu_is_s3c2440a()              0
 125 +#define cpu_is_s3c2442()               0
 126 +#define cpu_is_s3c2443()               0
 127 +#define cpu_is_s3c6400()               0
 128 +#define cpu_is_s3c6410()               0
 129 +
 130 +#if defined(CONFIG_ARCH_S3C2410)
 131 +# undef  cpu_is_s3c2400
 132 +# define cpu_is_s3c2400()              is_s3c2400()
 133 +#endif
 134 +
 135 +#if defined(CONFIG_CPU_S3C2410)
 136 +# undef  cpu_is_s3c2410
 137 +# undef  cpu_is_s3c2410a
 138 +# define cpu_is_s3c2410()              is_s3c2410()
 139 +# define cpu_is_s3c2410a()             is_s3c2410a()
 140 +#endif
 141 +
 142 +#if defined(CONFIG_CPU_S3C2412)
 143 +# undef  cpu_is_s3c2412
 144 +# define cpu_is_s3c2412()              is_s3c2412()
 145 +#endif
 146 +
 147 +#if defined(CONFIG_CPU_S3C2440)
 148 +# undef  cpu_is_s3c2440
 149 +# undef  cpu_is_s3c2440a
 150 +# define cpu_is_s3c2440()              is_s3c2440()
 151 +# define cpu_is_s3c2440a()             is_s3c2440a()
 152 +#endif
 153 +
 154 +#if defined(CONFIG_CPU_S3C2442)
 155 +# undef  cpu_is_s3c2442
 156 +# define cpu_is_s3c2442()              is_s3c2442()
 157 +#endif
 158 +
 159 +#if defined(CONFIG_CPU_S3C2443)
 160 +# undef  cpu_is_s3c2443
 161 +# define cpu_is_s3c2443()              is_s3c2443()
 162 +#endif
 163 +
 164 +#if defined(CONFIG_ARCH_S3C64XX)
 165 +# undef  cpu_is_s3c6400
 166 +# undef  cpu_is_s3c6410
 167 +# define cpu_is_s3c6400()              is_s3c6400()
 168 +# define cpu_is_s3c6410()              is_s3c6410()
 169 +#endif
 170 +
 171 +#endif
 172 diff --git a/arch/arm/plat-s3c/init.c b/arch/arm/plat-s3c/init.c
 173 index 6790edf..c1ddac1 100644
 174 --- a/arch/arm/plat-s3c/init.c
 175 +++ b/arch/arm/plat-s3c/init.c
 176 @@ -31,6 +31,34 @@
 177
 178  static struct cpu_table *cpu;
 179
 180 +static void __init set_system_rev(unsigned int idcode)
 181 +{
 182 +       /*
 183 +        * system_rev encoding is as follows
 184 +        * system_rev & 0xff000000 -> S3C Class (24xx/64xx)
 185 +        * system_rev & 0xfff00000 -> S3C Sub Class (241x/244x)
 186 +        * system_rev & 0xffff0000 -> S3C Type (2410/2440/6400/6410)
 187 +        *
 188 +        * Remaining[15:0] are preserved from the value set by ATAG
 189 +        *
 190 +        * Exception:
 191 +        *  Store Revision A to 1 such as
 192 +        *  s3c2410A to s3c2411
 193 +        *  s3c2440A to s3c2441
 194 +        */
 195 +
 196 +       system_rev &= 0xffff;
 197 +       system_rev |= (idcode & 0x0ffff000) << 4;
 198 +
 199 +       if (idcode == 0x32410002 || idcode == 0x32440001)
 200 +               system_rev |= (0x1 << 16);
 201 +       if (idcode == 0x32440aaa        /* s3c2442 */
 202 +           || idcode == 0x32440aab)    /* s3c2442b */
 203 +               system_rev |= (0x2 << 16);
 204 +       if (idcode == 0x0)              /* s3c2400 */
 205 +               system_rev |= (0x2400 << 16);
 206 +}
 207 +
 208  static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
 209                                                 struct cpu_table *tab,
 210                                                 unsigned int count)
 211 @@ -53,6 +81,8 @@ void __init s3c_init_cpu(unsigned long idcode,
 212                 panic("Unknown S3C24XX CPU");
 213         }
 214
 215 +       set_system_rev(idcode);
 216 +
 217         printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
 218
 219         if (cpu->map_io == NULL || cpu->init == NULL) {
 220 diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
 221 index 1932b7e..ed4c19f 100644
 222 --- a/arch/arm/plat-s3c24xx/cpu.c
 223 +++ b/arch/arm/plat-s3c24xx/cpu.c
 224 @@ -61,6 +61,7 @@ static const char name_s3c2410[]  = "S3C2410";
 225  static const char name_s3c2412[]  = "S3C2412";
 226  static const char name_s3c2440[]  = "S3C2440";
 227  static const char name_s3c2442[]  = "S3C2442";
 228 +static const char name_s3c2442b[]  = "S3C2442B";
 229  static const char name_s3c2443[]  = "S3C2443";
 230  static const char name_s3c2410a[] = "S3C2410A";
 231  static const char name_s3c2440a[] = "S3C2440A";
 232 @@ -112,6 +113,15 @@ static struct cpu_table cpu_ids[] __initdata = {
 233                 .name           = name_s3c2442
 234         },
 235         {
 236 +               .idcode         = 0x32440aab,
 237 +               .idmask         = 0xffffffff,
 238 +               .map_io         = s3c244x_map_io,
 239 +               .init_clocks    = s3c244x_init_clocks,
 240 +               .init_uarts     = s3c244x_init_uarts,
 241 +               .init           = s3c2442_init,
 242 +               .name           = name_s3c2442b
 243 +       },
 244 +       {
 245                 .idcode         = 0x32412001,
 246                 .idmask         = 0xffffffff,
 247                 .map_io         = s3c2412_map_io,
 248