target/linux/generic/patches-2.6.39/050-linux-atm_nathan.patch

   1 From: Nathan Williams <nathan@traverse.com.au>
   2 To: netdev@vger.kernel.org
   3 Date: Wed, 05 Oct 2011 15:43:30 +1100
   4 Cc: linux-atm-general@lists.sourceforge.net,
   5         David Woodhouse <dwmw2@infradead.org>, linux-kernel@vger.kernel.org
   6 Subject: [Linux-ATM-General] [PATCH 1/4] atm: solos-pci: Add AnnexA/M
   7         capability attributes
   8
   9 BisACapability and BisMCapability allow users to
  10 force either Annex A or Annex M.
  11
  12 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
  13 ---
  14  drivers/atm/solos-attrlist.c |    2 ++
  15  1 files changed, 2 insertions(+), 0 deletions(-)
  16
  17 --- a/drivers/atm/solos-attrlist.c
  18 +++ b/drivers/atm/solos-attrlist.c
  19 @@ -71,6 +71,8 @@ SOLOS_ATTR_RW(BisAForceSNRMarginDn)
  20  SOLOS_ATTR_RW(BisMForceSNRMarginDn)
  21  SOLOS_ATTR_RW(BisAMaxMargin)
  22  SOLOS_ATTR_RW(BisMMaxMargin)
  23 +SOLOS_ATTR_RW(BisACapability)
  24 +SOLOS_ATTR_RW(BisMCapability)
  25  SOLOS_ATTR_RW(AnnexAForceSNRMarginDn)
  26  SOLOS_ATTR_RW(AnnexAMaxMargin)
  27  SOLOS_ATTR_RW(AnnexMMaxMargin)
  28 --- a/drivers/atm/solos-pci.c
  29 +++ b/drivers/atm/solos-pci.c
  30 @@ -42,7 +42,8 @@
  31  #include <linux/swab.h>
  32  #include <linux/slab.h>
  33
  34 -#define VERSION "0.07"
  35 +#define VERSION "1.0"
  36 +#define DRIVER_VERSION 0x01
  37  #define PTAG "solos-pci"
  38
  39  #define CONFIG_RAM_SIZE        128
  40 @@ -56,16 +57,21 @@
  41  #define FLASH_BUSY     0x60
  42  #define FPGA_MODE      0x5C
  43  #define FLASH_MODE     0x58
  44 +#define GPIO_STATUS    0x54
  45 +#define DRIVER_VER     0x50
  46  #define TX_DMA_ADDR(port)      (0x40 + (4 * (port)))
  47  #define RX_DMA_ADDR(port)      (0x30 + (4 * (port)))
  48
  49  #define DATA_RAM_SIZE  32768
  50  #define BUF_SIZE       2048
  51  #define OLD_BUF_SIZE   4096 /* For FPGA versions <= 2*/
  52 -#define FPGA_PAGE      528 /* FPGA flash page size*/
  53 -#define SOLOS_PAGE     512 /* Solos flash page size*/
  54 -#define FPGA_BLOCK     (FPGA_PAGE * 8) /* FPGA flash block size*/
  55 -#define SOLOS_BLOCK    (SOLOS_PAGE * 8) /* Solos flash block size*/
  56 +/* Old boards use ATMEL AD45DB161D flash */
  57 +#define ATMEL_FPGA_PAGE        528 /* FPGA flash page size*/
  58 +#define ATMEL_SOLOS_PAGE       512 /* Solos flash page size*/
  59 +#define ATMEL_FPGA_BLOCK       (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
  60 +#define ATMEL_SOLOS_BLOCK      (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
  61 +/* Current boards use M25P/M25PE SPI flash */
  62 +#define SPI_FLASH_BLOCK        (256 * 64)
  63
  64  #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
  65  #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
  66 @@ -127,6 +133,7 @@ struct solos_card {
  67         int using_dma;
  68         int fpga_version;
  69         int buffer_size;
  70 +       int atmel_flash;
  71  };
  72
  73
  74 @@ -452,7 +459,6 @@ static ssize_t console_show(struct devic
  75
  76         len = skb->len;
  77         memcpy(buf, skb->data, len);
  78 -       dev_dbg(&card->dev->dev, "len: %d\n", len);
  79
  80         kfree_skb(skb);
  81         return len;
  82 @@ -499,6 +505,87 @@ static ssize_t console_store(struct devi
  83         return err?:count;
  84  }
  85
  86 +struct geos_gpio {
  87 +       char *name;
  88 +       int offset;
  89 +};
  90 +
  91 +static struct geos_gpio geos_gpio_pins[] = {
  92 +       {"GPIO1", 9},
  93 +       {"GPIO2", 10},
  94 +       {"GPIO3", 11},
  95 +       {"GPIO4", 12},
  96 +       {"GPIO5", 13},
  97 +       {"PushButton", 14},
  98 +       {NULL, 0}
  99 +};
 100 +
 101 +static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
 102 +                              const char *buf, size_t count)
 103 +{
 104 +       struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
 105 +       struct solos_card *card = atmdev->dev_data;
 106 +       uint32_t data32;
 107 +
 108 +       struct geos_gpio *p = geos_gpio_pins;
 109 +       while(p->name){
 110 +               if(!strcmp(attr->attr.name, p->name)){
 111 +                       break;
 112 +               }
 113 +               p++;
 114 +       }
 115 +
 116 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
 117 +       if(buf[0] == '1'){
 118 +               data32 |= 1 << p->offset;
 119 +               iowrite32(data32, card->config_regs + GPIO_STATUS);
 120 +       } else if(buf[0] == '0') {
 121 +               data32 &= ~(1 << p->offset);
 122 +               iowrite32(data32, card->config_regs + GPIO_STATUS);
 123 +       }
 124 +       return count;
 125 +}
 126 +
 127 +static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
 128 +                             char *buf)
 129 +{
 130 +       struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
 131 +       struct solos_card *card = atmdev->dev_data;
 132 +       uint32_t data32;
 133 +
 134 +       struct geos_gpio *p = geos_gpio_pins;
 135 +       while(p->name){
 136 +               if(!strcmp(attr->attr.name, p->name)){
 137 +                       break;
 138 +               }
 139 +               p++;
 140 +       }
 141 +
 142 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
 143 +       data32 = (data32 >> p->offset) & 1;
 144 +
 145 +       return sprintf(buf, "%d\n", data32);
 146 +}
 147 +
 148 +static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
 149 +                            char *buf)
 150 +{
 151 +       struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
 152 +       struct solos_card *card = atmdev->dev_data;
 153 +       uint32_t data32;
 154 +
 155 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
 156 +       if(!strcmp(attr->attr.name, "HardwareVersion")){
 157 +               data32 = data32 & 0x1F;
 158 +               return sprintf(buf, "%d\n", data32);
 159 +       } else if(!strcmp(attr->attr.name, "HardwareVariant")){
 160 +               data32 = (data32 >> 5) & 0x0F;
 161 +               return sprintf(buf, "%d\n", data32);
 162 +       }
 163 +
 164 +       return sprintf(buf, "Error\n");
 165 +}
 166 +
 167  static DEVICE_ATTR(console, 0644, console_show, console_store);
 168
 169
 170 @@ -507,6 +594,14 @@ static DEVICE_ATTR(console, 0644, consol
 171
 172  #include "solos-attrlist.c"
 173
 174 +static DEVICE_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store);
 175 +static DEVICE_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store);
 176 +static DEVICE_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store);
 177 +static DEVICE_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store);
 178 +static DEVICE_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store);
 179 +static DEVICE_ATTR(PushButton, 0444, geos_gpio_show, NULL);
 180 +static DEVICE_ATTR(HardwareVersion, 0444, hardware_show, NULL);
 181 +static DEVICE_ATTR(HardwareVariant, 0444, hardware_show, NULL);
 182  #undef SOLOS_ATTR_RO
 183  #undef SOLOS_ATTR_RW
 184
 185 @@ -515,6 +610,14 @@ static DEVICE_ATTR(console, 0644, consol
 186
 187  static struct attribute *solos_attrs[] = {
 188  #include "solos-attrlist.c"
 189 +       &dev_attr_GPIO1.attr,
 190 +       &dev_attr_GPIO2.attr,
 191 +       &dev_attr_GPIO3.attr,
 192 +       &dev_attr_GPIO4.attr,
 193 +       &dev_attr_GPIO5.attr,
 194 +       &dev_attr_PushButton.attr,
 195 +       &dev_attr_HardwareVersion.attr,
 196 +       &dev_attr_HardwareVariant.attr,
 197         NULL
 198  };
 199
 200 @@ -535,16 +638,25 @@ static int flash_upgrade(struct solos_ca
 201         switch (chip) {
 202         case 0:
 203                 fw_name = "solos-FPGA.bin";
 204 -               blocksize = FPGA_BLOCK;
 205 +               if (card->atmel_flash)
 206 +                       blocksize = ATMEL_FPGA_BLOCK;
 207 +               else
 208 +                       blocksize = SPI_FLASH_BLOCK;
 209                 break;
 210         case 1:
 211                 fw_name = "solos-Firmware.bin";
 212 -               blocksize = SOLOS_BLOCK;
 213 +               if (card->atmel_flash)
 214 +                       blocksize = ATMEL_SOLOS_BLOCK;
 215 +               else
 216 +                       blocksize = SPI_FLASH_BLOCK;
 217                 break;
 218         case 2:
 219                 if (card->fpga_version > LEGACY_BUFFERS){
 220                         fw_name = "solos-db-FPGA.bin";
 221 -                       blocksize = FPGA_BLOCK;
 222 +                       if (card->atmel_flash)
 223 +                               blocksize = ATMEL_FPGA_BLOCK;
 224 +                       else
 225 +                               blocksize = SPI_FLASH_BLOCK;
 226                 } else {
 227                         dev_info(&card->dev->dev, "FPGA version doesn't support"
 228                                         " daughter board upgrades\n");
 229 @@ -554,7 +666,10 @@ static int flash_upgrade(struct solos_ca
 230         case 3:
 231                 if (card->fpga_version > LEGACY_BUFFERS){
 232                         fw_name = "solos-Firmware.bin";
 233 -                       blocksize = SOLOS_BLOCK;
 234 +                       if (card->atmel_flash)
 235 +                               blocksize = ATMEL_SOLOS_BLOCK;
 236 +                       else
 237 +                               blocksize = SPI_FLASH_BLOCK;
 238                 } else {
 239                         dev_info(&card->dev->dev, "FPGA version doesn't support"
 240                                         " daughter board upgrades\n");
 241 @@ -599,9 +714,13 @@ static int flash_upgrade(struct solos_ca
 242                 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
 243                 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
 244
 245 -               /* Copy block to buffer, swapping each 16 bits */
 246 +               /* Copy block to buffer, swapping each 16 bits for Atmel flash */
 247                 for(i = 0; i < blocksize; i += 4) {
 248 -                       uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
 249 +                       uint32_t word;
 250 +                       if (card->atmel_flash)
 251 +                               word = swahb32p((uint32_t *)(fw->data + offset + i));
 252 +                       else
 253 +                               word = *(uint32_t *)(fw->data + offset + i);
 254                         if(card->fpga_version > LEGACY_BUFFERS)
 255                                 iowrite32(word, FLASH_BUF + i);
 256                         else
 257 @@ -1153,6 +1272,11 @@ static int fpga_probe(struct pci_dev *de
 258                 db_fpga_upgrade = db_firmware_upgrade = 0;
 259         }
 260
 261 +       /* Stopped using Atmel flash after 0.03-38 */
 262 +       if (fpga_ver < 39)
 263 +               card->atmel_flash = 1;
 264 +       else
 265 +               card->atmel_flash = 0;
 266         if (card->fpga_version >= DMA_SUPPORTED){
 267                 card->using_dma = 1;
 268         } else {
 269 @@ -1160,6 +1284,8 @@ static int fpga_probe(struct pci_dev *de
 270                 /* Set RX empty flag for all ports */
 271                 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
 272         }
 273 +       /* New FPGAs require driver version before permitting flash upgrades */
 274 +       iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
 275
 276         data32 = ioread32(card->config_regs + PORTS);
 277         card->nr_ports = (data32 & 0x000000FF);