package/mac80211/patches/830-b43-workaround-pcie-bcm4716.patch

   1 From 8a0e33bd81eafd86252acf7d7ff1bd5362208d7a Mon Sep 17 00:00:00 2001
   2 From: Hauke Mehrtens <hauke@hauke-m.de>
   3 Date: Sat, 21 Jan 2012 18:48:38 +0100
   4 Subject: [PATCH 33/34] b43: add workaround for b43 on pcie bus of bcm4716.
   5
   6 bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
   7 transactions. As a fix, a read after write is performed on certain
   8 places in the code. Older chips and the newer 5357 family don't require
   9 this fix.
  10 This code is based on the brcmsmac driver.
  11
  12 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
  13 ---
  14  drivers/net/wireless/b43/b43.h        |   25 +++++++++++++++++++++++++
  15  drivers/net/wireless/b43/bus.h        |   10 ++++++++++
  16  drivers/net/wireless/b43/phy_common.c |    6 ++++++
  17  drivers/net/wireless/b43/phy_n.c      |   10 +++++-----
  18  4 files changed, 46 insertions(+), 5 deletions(-)
  19
  20 --- a/drivers/net/wireless/b43/b43.h
  21 +++ b/drivers/net/wireless/b43/b43.h
  22 @@ -1016,6 +1016,31 @@ static inline bool b43_using_pio_transfe
  23         return dev->__using_pio_transfers;
  24  }
  25
  26 +/*
  27 + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
  28 + * transactions. As a fix, a read after write is performed on certain places
  29 + * in the code. Older chips and the newer 5357 family don't require this fix.
  30 + */
  31 +#ifdef CONFIG_BCM47XX
  32 +#include <asm/mach-bcm47xx/bcm47xx.h>
  33 +static inline void b43_wflush16(struct b43_wldev *dev, u16 offset, u16 value)
  34 +{
  35 +       if (b43_bus_host_is_pci(dev->dev) &&
  36 +           (bcm47xx_bus.bcma.bus.chipinfo.id == 0x4716 ||
  37 +            bcm47xx_bus.bcma.bus.chipinfo.id == 0x5300)) {
  38 +               b43_write16(dev, offset, value);
  39 +               b43_read16(dev, offset);
  40 +       } else {
  41 +               b43_write16(dev, offset, value);
  42 +       }
  43 +}
  44 +#else
  45 +static inline void b43_wflush16(struct b43_wldev *dev, u16 offset, u16 value)
  46 +{
  47 +       b43_write16(dev, offset, value);
  48 +}
  49 +#endif
  50 +
  51  /* Message printing */
  52  __printf(2, 3) void b43info(struct b43_wl *wl, const char *fmt, ...);
  53  __printf(2, 3) void b43err(struct b43_wl *wl, const char *fmt, ...);
  54 --- a/drivers/net/wireless/b43/bus.h
  55 +++ b/drivers/net/wireless/b43/bus.h
  56 @@ -60,6 +60,16 @@ static inline bool b43_bus_host_is_sdio(
  57         return (dev->bus_type == B43_BUS_SSB &&
  58                 dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO);
  59  }
  60 +static inline bool b43_bus_host_is_pci(struct b43_bus_dev *dev)
  61 +{
  62 +       if (dev->bus_type == B43_BUS_SSB)
  63 +               return (dev->sdev->bus->bustype == SSB_BUSTYPE_PCI);
  64 +#ifdef CONFIG_B43_BCMA
  65 +       if (dev->bus_type == B43_BUS_BCMA)
  66 +               return (dev->bdev->bus->hosttype == BCMA_HOSTTYPE_PCI);
  67 +#endif
  68 +       return false;
  69 +}
  70
  71  struct b43_bus_dev *b43_bus_dev_bcma_init(struct bcma_device *core);
  72  struct b43_bus_dev *b43_bus_dev_ssb_init(struct ssb_device *sdev);
  73 --- a/drivers/net/wireless/b43/phy_common.c
  74 +++ b/drivers/net/wireless/b43/phy_common.c
  75 @@ -251,6 +251,12 @@ void b43_phy_write(struct b43_wldev *dev
  76  {
  77         assert_mac_suspended(dev);
  78         dev->phy.ops->phy_write(dev, reg, value);
  79 +#ifdef CONFIG_BCM47XX
  80 +       if (b43_bus_host_is_pci(dev->dev) && reg == 0x72) {
  81 +               b43_read16(dev, B43_MMIO_PHY_VER);
  82 +               return;
  83 +       }
  84 +#endif
  85         if (++dev->phy.writes_counter == B43_MAX_WRITES_IN_ROW) {
  86                 b43_read16(dev, B43_MMIO_PHY_VER);
  87                 dev->phy.writes_counter = 0;
  88 --- a/drivers/net/wireless/b43/phy_n.c
  89 +++ b/drivers/net/wireless/b43/phy_n.c
  90 @@ -4104,14 +4104,14 @@ static inline void check_phyreg(struct b
  91  static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
  92  {
  93         check_phyreg(dev, reg);
  94 -       b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
  95 +       b43_wflush16(dev, B43_MMIO_PHY_CONTROL, reg);
  96         return b43_read16(dev, B43_MMIO_PHY_DATA);
  97  }
  98
  99  static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
 100  {
 101         check_phyreg(dev, reg);
 102 -       b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
 103 +       b43_wflush16(dev, B43_MMIO_PHY_CONTROL, reg);
 104         b43_write16(dev, B43_MMIO_PHY_DATA, value);
 105  }
 106
 107 @@ -4119,7 +4119,7 @@ static void b43_nphy_op_maskset(struct b
 108                                  u16 set)
 109  {
 110         check_phyreg(dev, reg);
 111 -       b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
 112 +       b43_wflush16(dev, B43_MMIO_PHY_CONTROL, reg);
 113         b43_write16(dev, B43_MMIO_PHY_DATA,
 114                     (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
 115  }
 116 @@ -4131,7 +4131,7 @@ static u16 b43_nphy_op_radio_read(struct
 117         /* N-PHY needs 0x100 for read access */
 118         reg |= 0x100;
 119
 120 -       b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
 121 +       b43_wflush16(dev, B43_MMIO_RADIO_CONTROL, reg);
 122         return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
 123  }
 124
 125 @@ -4140,7 +4140,7 @@ static void b43_nphy_op_radio_write(stru
 126         /* Register 1 is a 32-bit register. */
 127         B43_WARN_ON(reg == 1);
 128
 129 -       b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
 130 +       b43_wflush16(dev, B43_MMIO_RADIO_CONTROL, reg);
 131         b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
 132  }
 133