target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h

   1 /*
   2  * Ralink RT305x SoC specific definitions
   3  *
   4  * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * Parts of this file are based on Ralink's 2.6.21 BSP
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License version 2 as published
  10  * by the Free Software Foundation.
  11  */
  12
  13 #ifndef _RT305X_H_
  14 #define _RT305X_H_
  15
  16 #include <linux/init.h>
  17 #include <linux/io.h>
  18
  19 void rt305x_detect_sys_type(void) __init;
  20 void rt305x_detect_sys_freq(void) __init;
  21
  22 extern unsigned long rt305x_cpu_freq;
  23 extern unsigned long rt305x_sys_freq;
  24
  25 #define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
  26 #define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
  27
  28 #define RT305X_CPU_IRQ_BASE     0
  29 #define RT305X_INTC_IRQ_BASE    8
  30 #define RT305X_INTC_IRQ_COUNT   32
  31 #define RT305X_GPIO_IRQ_BASE    40
  32
  33 #define RT305X_CPU_IRQ_INTC     (RT305X_CPU_IRQ_BASE + 2)
  34 #define RT305X_CPU_IRQ_FE       (RT305X_CPU_IRQ_BASE + 5)
  35 #define RT305X_CPU_IRQ_WNIC     (RT305X_CPU_IRQ_BASE + 6)
  36 #define RT305X_CPU_IRQ_COUNTER  (RT305X_CPU_IRQ_BASE + 7)
  37
  38 #define RT305X_INTC_IRQ_SYSCTL  (RT305X_INTC_IRQ_BASE + 0)
  39 #define RT305X_INTC_IRQ_TIMER0  (RT305X_INTC_IRQ_BASE + 1)
  40 #define RT305X_INTC_IRQ_TIMER1  (RT305X_INTC_IRQ_BASE + 2)
  41 #define RT305X_INTC_IRQ_IA      (RT305X_INTC_IRQ_BASE + 3)
  42 #define RT305X_INTC_IRQ_PCM     (RT305X_INTC_IRQ_BASE + 4)
  43 #define RT305X_INTC_IRQ_UART0   (RT305X_INTC_IRQ_BASE + 5)
  44 #define RT305X_INTC_IRQ_PIO     (RT305X_INTC_IRQ_BASE + 6)
  45 #define RT305X_INTC_IRQ_DMA     (RT305X_INTC_IRQ_BASE + 7)
  46 #define RT305X_INTC_IRQ_NAND    (RT305X_INTC_IRQ_BASE + 8)
  47 #define RT305X_INTC_IRQ_PERFC   (RT305X_INTC_IRQ_BASE + 9)
  48 #define RT305X_INTC_IRQ_I2S     (RT305X_INTC_IRQ_BASE + 10)
  49 #define RT305X_INTC_IRQ_UART1   (RT305X_INTC_IRQ_BASE + 12)
  50 #define RT305X_INTC_IRQ_ESW     (RT305X_INTC_IRQ_BASE + 17)
  51 #define RT305X_INTC_IRQ_OTG     (RT305X_INTC_IRQ_BASE + 18)
  52
  53 extern void __iomem *rt305x_sysc_base;
  54 extern void __iomem *rt305x_memc_base;
  55
  56 static inline void rt305x_sysc_wr(u32 val, unsigned reg)
  57 {
  58         __raw_writel(val, rt305x_sysc_base + reg);
  59 }
  60
  61 static inline u32 rt305x_sysc_rr(unsigned reg)
  62 {
  63         return __raw_readl(rt305x_sysc_base + reg);
  64 }
  65
  66 static inline void rt305x_memc_wr(u32 val, unsigned reg)
  67 {
  68         __raw_writel(val, rt305x_memc_base + reg);
  69 }
  70
  71 static inline u32 rt305x_memc_rr(unsigned reg)
  72 {
  73         return __raw_readl(rt305x_memc_base + reg);
  74 }
  75
  76 #define RT305X_GPIO_I2C_SD      1
  77 #define RT305X_GPIO_I2C_SCLK    2
  78 #define RT305X_GPIO_SPI_EN      3
  79 #define RT305X_GPIO_SPI_CLK     4
  80 #define RT305X_GPIO_SPI_DOUT    5
  81 #define RT305X_GPIO_SPI_DIN     6
  82 /* GPIO 7-14 is shared between UART0, PCM  and I2S interfaces */
  83 #define RT305X_GPIO_7           7
  84 #define RT305X_GPIO_8           8
  85 #define RT305X_GPIO_9           9
  86 #define RT305X_GPIO_10          10
  87 #define RT305X_GPIO_11          11
  88 #define RT305X_GPIO_12          12
  89 #define RT305X_GPIO_13          13
  90 #define RT305X_GPIO_14          14
  91 #define RT305X_GPIO_UART1_TXD   15
  92 #define RT305X_GPIO_UART1_RXD   16
  93 #define RT305X_GPIO_JTAG_TDO    17
  94 #define RT305X_GPIO_JTAG_TDI    18
  95 #define RT305X_GPIO_JTAG_TMS    19
  96 #define RT305X_GPIO_JTAG_TCLK   20
  97 #define RT305X_GPIO_JTAG_TRST_N 21
  98 #define RT305X_GPIO_MDIO_MDC    22
  99 #define RT305X_GPIO_MDIO_MDIO   23
 100 #define RT305X_GPIO_SDRAM_MD16  24
 101 #define RT305X_GPIO_SDRAM_MD17  25
 102 #define RT305X_GPIO_SDRAM_MD18  26
 103 #define RT305X_GPIO_SDRAM_MD19  27
 104 #define RT305X_GPIO_SDRAM_MD20  28
 105 #define RT305X_GPIO_SDRAM_MD21  29
 106 #define RT305X_GPIO_SDRAM_MD22  30
 107 #define RT305X_GPIO_SDRAM_MD23  31
 108 #define RT305X_GPIO_SDRAM_MD24  32
 109 #define RT305X_GPIO_SDRAM_MD25  33
 110 #define RT305X_GPIO_SDRAM_MD26  34
 111 #define RT305X_GPIO_SDRAM_MD27  35
 112 #define RT305X_GPIO_SDRAM_MD28  36
 113 #define RT305X_GPIO_SDRAM_MD29  37
 114 #define RT305X_GPIO_SDRAM_MD30  38
 115 #define RT305X_GPIO_SDRAM_MD31  39
 116 #define RT305X_GPIO_GE0_TXD0    40
 117 #define RT305X_GPIO_GE0_TXD1    41
 118 #define RT305X_GPIO_GE0_TXD2    42
 119 #define RT305X_GPIO_GE0_TXD3    43
 120 #define RT305X_GPIO_GE0_TXEN    44
 121 #define RT305X_GPIO_GE0_TXCLK   45
 122 #define RT305X_GPIO_GE0_RXD0    46
 123 #define RT305X_GPIO_GE0_RXD1    47
 124 #define RT305X_GPIO_GE0_RXD2    48
 125 #define RT305X_GPIO_GE0_RXD3    49
 126 #define RT305X_GPIO_GE0_RXDV    50
 127 #define RT305X_GPIO_GE0_RXCLK   51
 128
 129 void rt305x_gpio_init(u32 mode) __init;
 130
 131 #endif /* _RT305X_H_ */