target/linux/ixp4xx/patches-2.6.26/030-ixp4xx_fsg_board_support.patch

   1 --- a/arch/arm/configs/ixp4xx_defconfig
   2 +++ b/arch/arm/configs/ixp4xx_defconfig
   3 @@ -165,6 +165,7 @@ CONFIG_ARCH_PRPMC1100=y
   4  CONFIG_MACH_NAS100D=y
   5  CONFIG_MACH_DSMG600=y
   6  CONFIG_ARCH_IXDP4XX=y
   7 +CONFIG_MACH_FSG=y
   8  CONFIG_CPU_IXP46X=y
   9  CONFIG_CPU_IXP43X=y
  10  CONFIG_MACH_GTWX5715=y
  11 @@ -770,7 +771,7 @@ CONFIG_ATA=y
  12  # CONFIG_SATA_SIL24 is not set
  13  # CONFIG_SATA_SIS is not set
  14  # CONFIG_SATA_ULI is not set
  15 -# CONFIG_SATA_VIA is not set
  16 +CONFIG_SATA_VIA=y
  17  # CONFIG_SATA_VITESSE is not set
  18  # CONFIG_SATA_INIC162X is not set
  19  # CONFIG_PATA_ALI is not set
  20 @@ -1143,7 +1144,7 @@ CONFIG_HWMON=y
  21  # CONFIG_SENSORS_VIA686A is not set
  22  # CONFIG_SENSORS_VT1211 is not set
  23  # CONFIG_SENSORS_VT8231 is not set
  24 -# CONFIG_SENSORS_W83781D is not set
  25 +CONFIG_SENSORS_W83781D=y
  26  # CONFIG_SENSORS_W83791D is not set
  27  # CONFIG_SENSORS_W83792D is not set
  28  # CONFIG_SENSORS_W83793 is not set
  29 @@ -1334,8 +1335,8 @@ CONFIG_LEDS_CLASS=y
  30  #
  31  # LED drivers
  32  #
  33 -# CONFIG_LEDS_IXP4XX is not set
  34  CONFIG_LEDS_GPIO=y
  35 +CONFIG_LEDS_FSG=y
  36
  37  #
  38  # LED Triggers
  39 @@ -1367,7 +1368,7 @@ CONFIG_RTC_INTF_DEV=y
  40  # CONFIG_RTC_DRV_DS1672 is not set
  41  # CONFIG_RTC_DRV_MAX6900 is not set
  42  # CONFIG_RTC_DRV_RS5C372 is not set
  43 -# CONFIG_RTC_DRV_ISL1208 is not set
  44 +CONFIG_RTC_DRV_ISL1208=y
  45  CONFIG_RTC_DRV_X1205=y
  46  CONFIG_RTC_DRV_PCF8563=y
  47  # CONFIG_RTC_DRV_PCF8583 is not set
  48 --- a/arch/arm/mach-ixp4xx/Kconfig
  49 +++ b/arch/arm/mach-ixp4xx/Kconfig
  50 @@ -125,6 +125,15 @@ config     ARCH_IXDP4XX
  51         depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
  52         default y
  53
  54 +config MACH_FSG
  55 +       bool
  56 +       prompt "Freecom FSG-3"
  57 +       select PCI
  58 +       help
  59 +         Say 'Y' here if you want your kernel to support Freecom's
  60 +         FSG-3 device. For more information on this platform,
  61 +         see http://www.nslu2-linux.org/wiki/FSG3/HomePage
  62 +
  63  #
  64  # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
  65  #
  66 --- a/arch/arm/mach-ixp4xx/Makefile
  67 +++ b/arch/arm/mach-ixp4xx/Makefile
  68 @@ -15,6 +15,7 @@ obj-pci-$(CONFIG_MACH_NAS100D)                += nas10
  69  obj-pci-$(CONFIG_MACH_DSMG600)         += dsmg600-pci.o
  70  obj-pci-$(CONFIG_MACH_GATEWAY7001)     += gateway7001-pci.o
  71  obj-pci-$(CONFIG_MACH_WG302V2)         += wg302v2-pci.o
  72 +obj-pci-$(CONFIG_MACH_FSG)             += fsg-pci.o
  73
  74  obj-y  += common.o
  75
  76 @@ -28,6 +29,7 @@ obj-$(CONFIG_MACH_NAS100D)    += nas100d-se
  77  obj-$(CONFIG_MACH_DSMG600)      += dsmg600-setup.o
  78  obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
  79  obj-$(CONFIG_MACH_WG302V2)     += wg302v2-setup.o
  80 +obj-$(CONFIG_MACH_FSG)         += fsg-setup.o
  81
  82  obj-$(CONFIG_PCI)              += $(obj-pci-$(CONFIG_PCI)) common-pci.o
  83  obj-$(CONFIG_IXP4XX_QMGR)      += ixp4xx_qmgr.o
  84 --- /dev/null
  85 +++ b/arch/arm/mach-ixp4xx/fsg-pci.c
  86 @@ -0,0 +1,71 @@
  87 +/*
  88 + * arch/arch/mach-ixp4xx/fsg-pci.c
  89 + *
  90 + * FSG board-level PCI initialization
  91 + *
  92 + * Author: Rod Whitby <rod@whitby.id.au>
  93 + * Maintainer: http://www.nslu2-linux.org/
  94 + *
  95 + * based on ixdp425-pci.c:
  96 + *     Copyright (C) 2002 Intel Corporation.
  97 + *     Copyright (C) 2003-2004 MontaVista Software, Inc.
  98 + *
  99 + * This program is free software; you can redistribute it and/or modify
 100 + * it under the terms of the GNU General Public License version 2 as
 101 + * published by the Free Software Foundation.
 102 + *
 103 + */
 104 +
 105 +#include <linux/pci.h>
 106 +#include <linux/init.h>
 107 +#include <linux/irq.h>
 108 +
 109 +#include <asm/mach/pci.h>
 110 +#include <asm/mach-types.h>
 111 +
 112 +void __init fsg_pci_preinit(void)
 113 +{
 114 +       set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
 115 +       set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
 116 +       set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
 117 +
 118 +       ixp4xx_pci_preinit();
 119 +}
 120 +
 121 +static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 122 +{
 123 +       static int pci_irq_table[FSG_PCI_IRQ_LINES] = {
 124 +               IRQ_FSG_PCI_INTC,
 125 +               IRQ_FSG_PCI_INTB,
 126 +               IRQ_FSG_PCI_INTA,
 127 +       };
 128 +
 129 +       int irq = -1;
 130 +       slot = slot - 11;
 131 +
 132 +       if (slot >= 1 && slot <= FSG_PCI_MAX_DEV &&
 133 +           pin >= 1 && pin <= FSG_PCI_IRQ_LINES)
 134 +               irq = pci_irq_table[(slot - 1)];
 135 +       printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
 136 +              __func__, slot, pin, irq);
 137 +
 138 +       return irq;
 139 +}
 140 +
 141 +struct hw_pci fsg_pci __initdata = {
 142 +       .nr_controllers = 1,
 143 +       .preinit =        fsg_pci_preinit,
 144 +       .swizzle =        pci_std_swizzle,
 145 +       .setup =          ixp4xx_setup,
 146 +       .scan =           ixp4xx_scan_bus,
 147 +       .map_irq =        fsg_map_irq,
 148 +};
 149 +
 150 +int __init fsg_pci_init(void)
 151 +{
 152 +       if (machine_is_fsg())
 153 +               pci_common_init(&fsg_pci);
 154 +       return 0;
 155 +}
 156 +
 157 +subsys_initcall(fsg_pci_init);
 158 --- /dev/null
 159 +++ b/arch/arm/mach-ixp4xx/fsg-setup.c
 160 @@ -0,0 +1,276 @@
 161 +/*
 162 + * arch/arm/mach-ixp4xx/fsg-setup.c
 163 + *
 164 + * FSG board-setup
 165 + *
 166 + * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 167 + *
 168 + * based on ixdp425-setup.c:
 169 + *     Copyright (C) 2003-2004 MontaVista Software, Inc.
 170 + * based on nslu2-power.c
 171 + *     Copyright (C) 2005 Tower Technologies
 172 + *
 173 + * Author: Rod Whitby <rod@whitby.id.au>
 174 + * Maintainers: http://www.nslu2-linux.org/
 175 + *
 176 + */
 177 +
 178 +#include <linux/if_ether.h>
 179 +#include <linux/irq.h>
 180 +#include <linux/serial.h>
 181 +#include <linux/serial_8250.h>
 182 +#include <linux/leds.h>
 183 +#include <linux/reboot.h>
 184 +#include <linux/i2c.h>
 185 +#include <linux/i2c-gpio.h>
 186 +
 187 +#include <asm/mach-types.h>
 188 +#include <asm/mach/arch.h>
 189 +#include <asm/mach/flash.h>
 190 +#include <asm/io.h>
 191 +#include <asm/gpio.h>
 192 +
 193 +static struct flash_platform_data fsg_flash_data = {
 194 +       .map_name               = "cfi_probe",
 195 +       .width                  = 2,
 196 +};
 197 +
 198 +static struct resource fsg_flash_resource = {
 199 +       .flags                  = IORESOURCE_MEM,
 200 +};
 201 +
 202 +static struct platform_device fsg_flash = {
 203 +       .name                   = "IXP4XX-Flash",
 204 +       .id                     = 0,
 205 +       .dev = {
 206 +               .platform_data  = &fsg_flash_data,
 207 +       },
 208 +       .num_resources          = 1,
 209 +       .resource               = &fsg_flash_resource,
 210 +};
 211 +
 212 +static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
 213 +       .sda_pin                = FSG_SDA_PIN,
 214 +       .scl_pin                = FSG_SCL_PIN,
 215 +};
 216 +
 217 +static struct platform_device fsg_i2c_gpio = {
 218 +       .name                   = "i2c-gpio",
 219 +       .id                     = 0,
 220 +       .dev = {
 221 +               .platform_data  = &fsg_i2c_gpio_data,
 222 +       },
 223 +};
 224 +
 225 +static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
 226 +       {
 227 +               I2C_BOARD_INFO("isl1208", 0x6f),
 228 +       },
 229 +};
 230 +
 231 +static struct resource fsg_uart_resources[] = {
 232 +       {
 233 +               .start          = IXP4XX_UART1_BASE_PHYS,
 234 +               .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
 235 +               .flags          = IORESOURCE_MEM,
 236 +       },
 237 +       {
 238 +               .start          = IXP4XX_UART2_BASE_PHYS,
 239 +               .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
 240 +               .flags          = IORESOURCE_MEM,
 241 +       }
 242 +};
 243 +
 244 +static struct plat_serial8250_port fsg_uart_data[] = {
 245 +       {
 246 +               .mapbase        = IXP4XX_UART1_BASE_PHYS,
 247 +               .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 248 +               .irq            = IRQ_IXP4XX_UART1,
 249 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 250 +               .iotype         = UPIO_MEM,
 251 +               .regshift       = 2,
 252 +               .uartclk        = IXP4XX_UART_XTAL,
 253 +       },
 254 +       {
 255 +               .mapbase        = IXP4XX_UART2_BASE_PHYS,
 256 +               .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
 257 +               .irq            = IRQ_IXP4XX_UART2,
 258 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 259 +               .iotype         = UPIO_MEM,
 260 +               .regshift       = 2,
 261 +               .uartclk        = IXP4XX_UART_XTAL,
 262 +       },
 263 +       { }
 264 +};
 265 +
 266 +static struct platform_device fsg_uart = {
 267 +       .name                   = "serial8250",
 268 +       .id                     = PLAT8250_DEV_PLATFORM,
 269 +       .dev = {
 270 +               .platform_data  = fsg_uart_data,
 271 +       },
 272 +       .num_resources          = ARRAY_SIZE(fsg_uart_resources),
 273 +       .resource               = fsg_uart_resources,
 274 +};
 275 +
 276 +static struct platform_device fsg_leds = {
 277 +       .name           = "fsg-led",
 278 +       .id             = -1,
 279 +};
 280 +
 281 +/* Built-in 10/100 Ethernet MAC interfaces */
 282 +static struct eth_plat_info fsg_plat_eth[] = {
 283 +       {
 284 +               .phy            = 5,
 285 +               .rxq            = 3,
 286 +               .txreadyq       = 20,
 287 +       }, {
 288 +               .phy            = 4,
 289 +               .rxq            = 4,
 290 +               .txreadyq       = 21,
 291 +       }
 292 +};
 293 +
 294 +static struct platform_device fsg_eth[] = {
 295 +       {
 296 +               .name                   = "ixp4xx_eth",
 297 +               .id                     = IXP4XX_ETH_NPEB,
 298 +               .dev = {
 299 +                       .platform_data  = fsg_plat_eth,
 300 +               },
 301 +       }, {
 302 +               .name                   = "ixp4xx_eth",
 303 +               .id                     = IXP4XX_ETH_NPEC,
 304 +               .dev = {
 305 +                       .platform_data  = fsg_plat_eth + 1,
 306 +               },
 307 +       }
 308 +};
 309 +
 310 +static struct platform_device *fsg_devices[] __initdata = {
 311 +       &fsg_i2c_gpio,
 312 +       &fsg_flash,
 313 +       &fsg_leds,
 314 +       &fsg_eth[0],
 315 +       &fsg_eth[1],
 316 +};
 317 +
 318 +static irqreturn_t fsg_power_handler(int irq, void *dev_id)
 319 +{
 320 +       /* Signal init to do the ctrlaltdel action, this will bypass init if
 321 +        * it hasn't started and do a kernel_restart.
 322 +        */
 323 +       ctrl_alt_del();
 324 +
 325 +       return IRQ_HANDLED;
 326 +}
 327 +
 328 +static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
 329 +{
 330 +       /* This is the paper-clip reset which does an emergency reboot. */
 331 +       printk(KERN_INFO "Restarting system.\n");
 332 +       machine_restart(NULL);
 333 +
 334 +       /* This should never be reached. */
 335 +       return IRQ_HANDLED;
 336 +}
 337 +
 338 +static void __init fsg_init(void)
 339 +{
 340 +       DECLARE_MAC_BUF(mac_buf);
 341 +       uint8_t __iomem *f;
 342 +       int i;
 343 +
 344 +       ixp4xx_sys_init();
 345 +
 346 +       fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
 347 +       fsg_flash_resource.end =
 348 +               IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
 349 +
 350 +       *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
 351 +       *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
 352 +
 353 +       /* Configure CS2 for operation, 8bit and writable */
 354 +       *IXP4XX_EXP_CS2 = 0xbfff0002;
 355 +
 356 +       i2c_register_board_info(0, fsg_i2c_board_info,
 357 +                               ARRAY_SIZE(fsg_i2c_board_info));
 358 +
 359 +       /* This is only useful on a modified machine, but it is valuable
 360 +        * to have it first in order to see debug messages, and so that
 361 +        * it does *not* get removed if platform_add_devices fails!
 362 +        */
 363 +       (void)platform_device_register(&fsg_uart);
 364 +
 365 +       platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
 366 +
 367 +       if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
 368 +                       IRQF_DISABLED | IRQF_TRIGGER_LOW,
 369 +                       "FSG reset button", NULL) < 0) {
 370 +
 371 +               printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
 372 +                       gpio_to_irq(FSG_RB_GPIO));
 373 +       }
 374 +
 375 +       if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
 376 +                       IRQF_DISABLED | IRQF_TRIGGER_LOW,
 377 +                       "FSG power button", NULL) < 0) {
 378 +
 379 +               printk(KERN_DEBUG "Power Button IRQ %d not available\n",
 380 +                       gpio_to_irq(FSG_SB_GPIO));
 381 +       }
 382 +
 383 +       /*
 384 +        * Map in a portion of the flash and read the MAC addresses.
 385 +        * Since it is stored in BE in the flash itself, we need to
 386 +        * byteswap it if we're in LE mode.
 387 +        */
 388 +       f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
 389 +       if (f) {
 390 +#ifdef __ARMEB__
 391 +               for (i = 0; i < 6; i++) {
 392 +                       fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
 393 +                       fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
 394 +               }
 395 +#else
 396 +
 397 +               /*
 398 +                 Endian-swapped reads from unaligned addresses are
 399 +                 required to extract the two MACs from the big-endian
 400 +                 Redboot config area in flash.
 401 +               */
 402 +
 403 +               fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
 404 +               fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
 405 +               fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
 406 +               fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
 407 +               fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
 408 +               fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
 409 +
 410 +               fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
 411 +               fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
 412 +               fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
 413 +               fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
 414 +               fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
 415 +               fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
 416 +#endif
 417 +               iounmap(f);
 418 +       }
 419 +       printk(KERN_INFO "FSG: Using MAC address %s for port 0\n",
 420 +              print_mac(mac_buf, fsg_plat_eth[0].hwaddr));
 421 +       printk(KERN_INFO "FSG: Using MAC address %s for port 1\n",
 422 +              print_mac(mac_buf, fsg_plat_eth[1].hwaddr));
 423 +
 424 +}
 425 +
 426 +MACHINE_START(FSG, "Freecom FSG-3")
 427 +       /* Maintainer: www.nslu2-linux.org */
 428 +       .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
 429 +       .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
 430 +       .map_io         = ixp4xx_map_io,
 431 +       .init_irq       = ixp4xx_init_irq,
 432 +       .timer          = &ixp4xx_timer,
 433 +       .boot_params    = 0x0100,
 434 +       .init_machine   = fsg_init,
 435 +MACHINE_END
 436 +
 437 --- /dev/null
 438 +++ b/include/asm-arm/arch-ixp4xx/fsg.h
 439 @@ -0,0 +1,50 @@
 440 +/*
 441 + * include/asm-arm/arch-ixp4xx/fsg.h
 442 + *
 443 + * Freecom FSG-3 platform specific definitions
 444 + *
 445 + * Author: Rod Whitby <rod@whitby.id.au>
 446 + * Author: Tomasz Chmielewski <mangoo@wpkg.org>
 447 + * Maintainers: http://www.nslu2-linux.org
 448 + *
 449 + * Based on coyote.h by
 450 + * Copyright 2004 (c) MontaVista, Software, Inc.
 451 + *
 452 + * This file is licensed under  the terms of the GNU General Public
 453 + * License version 2. This program is licensed "as is" without any
 454 + * warranty of any kind, whether express or implied.
 455 + */
 456 +
 457 +#ifndef __ASM_ARCH_HARDWARE_H__
 458 +#error "Do not include this directly, instead #include <asm/hardware.h>"
 459 +#endif
 460 +
 461 +#define FSG_SDA_PIN            12
 462 +#define FSG_SCL_PIN            13
 463 +
 464 +/*
 465 + * FSG PCI IRQs
 466 + */
 467 +#define FSG_PCI_MAX_DEV                3
 468 +#define FSG_PCI_IRQ_LINES      3
 469 +
 470 +
 471 +/* PCI controller GPIO to IRQ pin mappings */
 472 +#define FSG_PCI_INTA_PIN       6
 473 +#define FSG_PCI_INTB_PIN       7
 474 +#define FSG_PCI_INTC_PIN       5
 475 +
 476 +/* Buttons */
 477 +
 478 +#define FSG_SB_GPIO            4       /* sync button */
 479 +#define FSG_RB_GPIO            9       /* reset button */
 480 +#define FSG_UB_GPIO            10      /* usb button */
 481 +
 482 +/* LEDs */
 483 +
 484 +#define FSG_LED_WLAN_BIT       0
 485 +#define FSG_LED_WAN_BIT                1
 486 +#define FSG_LED_SATA_BIT       2
 487 +#define FSG_LED_USB_BIT                4
 488 +#define FSG_LED_RING_BIT       5
 489 +#define FSG_LED_SYNC_BIT       7
 490 --- a/include/asm-arm/arch-ixp4xx/hardware.h
 491 +++ b/include/asm-arm/arch-ixp4xx/hardware.h
 492 @@ -45,5 +45,6 @@
 493  #include "nslu2.h"
 494  #include "nas100d.h"
 495  #include "dsmg600.h"
 496 +#include "fsg.h"
 497
 498  #endif  /* _ASM_ARCH_HARDWARE_H */
 499 --- a/include/asm-arm/arch-ixp4xx/irqs.h
 500 +++ b/include/asm-arm/arch-ixp4xx/irqs.h
 501 @@ -128,4 +128,11 @@
 502  #define        IRQ_DSMG600_PCI_INTE    IRQ_IXP4XX_GPIO7
 503  #define        IRQ_DSMG600_PCI_INTF    IRQ_IXP4XX_GPIO6
 504
 505 +/*
 506 + * Freecom FSG-3 Board IRQs
 507 + */
 508 +#define        IRQ_FSG_PCI_INTA        IRQ_IXP4XX_GPIO6
 509 +#define        IRQ_FSG_PCI_INTB        IRQ_IXP4XX_GPIO7
 510 +#define        IRQ_FSG_PCI_INTC        IRQ_IXP4XX_GPIO5
 511 +
 512  #endif