package/broadcom-diag/src/gpio.h

   1 #ifndef __DIAG_GPIO_H
   2 #define __DIAG_GPIO_H
   3 #include <linux/interrupt.h>
   4
   5 #ifndef BCMDRIVER
   6 #include <linux/ssb/ssb_embedded.h>
   7
   8 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
   9 #include <linux/gpio.h>
  10 #define ssb ssb_bcm47xx
  11 #endif
  12 extern struct ssb_bus ssb;
  13
  14
  15 static inline u32 gpio_in(void)
  16 {
  17         return ssb_gpio_in(&ssb, ~0);
  18 }
  19
  20 static inline u32 gpio_out(u32 mask, u32 value)
  21 {
  22         return ssb_gpio_out(&ssb, mask, value);
  23 }
  24
  25 static inline u32 gpio_outen(u32 mask, u32 value)
  26 {
  27         return ssb_gpio_outen(&ssb, mask, value);
  28 }
  29
  30 static inline u32 gpio_control(u32 mask, u32 value)
  31 {
  32         return ssb_gpio_control(&ssb, mask, value);
  33 }
  34
  35 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
  36 static inline u32 gpio_intmask(u32 mask, u32 value)
  37 {
  38         return ssb_gpio_intmask(&ssb, mask, value);
  39 }
  40 #endif
  41
  42 static inline u32 gpio_intpolarity(u32 mask, u32 value)
  43 {
  44         return ssb_gpio_polarity(&ssb, mask, value);
  45 }
  46
  47 static inline u32 __ssb_write32_masked(struct ssb_device *dev, u16 offset,
  48                                        u32 mask, u32 value)
  49 {
  50         value &= mask;
  51         value |= ssb_read32(dev, offset) & ~mask;
  52         ssb_write32(dev, offset, value);
  53         return value;
  54 }
  55
  56 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *))
  57 {
  58         int irq;
  59
  60 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
  61         irq = gpio_to_irq(0);
  62         if (irq == -EINVAL) return;
  63 #else
  64         if (ssb.chipco.dev)
  65                 irq = ssb_mips_irq(ssb.chipco.dev) + 2;
  66         else if (ssb.extif.dev)
  67                 irq = ssb_mips_irq(ssb.extif.dev) + 2;
  68         else return;
  69 #endif
  70
  71         if (enabled) {
  72                 if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler))
  73                         return;
  74         } else {
  75                 free_irq(irq, handler);
  76         }
  77
  78         if (ssb.chipco.dev)
  79                 __ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
  80 }
  81
  82 #else
  83
  84 #include <typedefs.h>
  85 #include <osl.h>
  86 #include <bcmdevs.h>
  87 #include <sbutils.h>
  88 #include <sbconfig.h>
  89 #include <sbchipc.h>
  90 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
  91 #include <sbmips.h>
  92 #else
  93 #include <hndcpu.h>
  94 #endif
  95
  96 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
  97 #define sbh bcm947xx_sbh
  98 #define sbh_lock bcm947xx_sbh_lock
  99 #endif
 100
 101 extern void *sbh;
 102 extern spinlock_t sbh_lock;
 103
 104 #define gpio_in()       sb_gpioin(sbh)
 105 #define gpio_out(mask, value)   sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY)
 106 #define gpio_outen(mask, value)         sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY)
 107 #define gpio_control(mask, value)       sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY)
 108 #define gpio_intmask(mask, value)       sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY)
 109 #define gpio_intpolarity(mask, value)   sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY)
 110
 111 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
 112 {
 113         unsigned int coreidx;
 114         unsigned long flags;
 115         chipcregs_t *cc;
 116         int irq;
 117
 118         spin_lock_irqsave(sbh_lock, flags);
 119         coreidx = sb_coreidx(sbh);
 120
 121         irq = sb_irq(sbh) + 2;
 122         if (enabled)
 123                 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
 124         else
 125                 free_irq(irq, handler);
 126
 127         if ((cc = sb_setcore(sbh, SB_CC, 0))) {
 128                 int intmask;
 129
 130                 intmask = readl(&cc->intmask);
 131                 if (enabled)
 132                         intmask |= CI_GPIO;
 133                 else
 134                         intmask &= ~CI_GPIO;
 135                 writel(intmask, &cc->intmask);
 136         }
 137         sb_setcoreidx(sbh, coreidx);
 138         spin_unlock_irqrestore(sbh_lock, flags);
 139 }
 140
 141 #endif /* BCMDRIVER */
 142
 143 #define EXTIF_ADDR 0x1f000000
 144 #define EXTIF_UART (EXTIF_ADDR + 0x00800000)
 145
 146 #define GPIO_TYPE_NORMAL        (0x0 << 24)
 147 #define GPIO_TYPE_EXTIF         (0x1 << 24)
 148 #define GPIO_TYPE_MASK          (0xf << 24)
 149
 150 static inline void gpio_set_extif(int gpio, int value)
 151 {
 152         volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
 153         if (value)
 154                 *addr = 0xFF;
 155         else
 156                 *addr;
 157 }
 158
 159 #endif /* __DIAG_GPIO_H */