linux/3.2: add missing NAND symbols
[openwrt.git] / target / linux / ar71xx / patches-3.2 / 205-spi-ath79-introduce-ath79_spi_-en-dis-able-helpers.patch
1 From 4518ae06e5fc953abfd9c2b66c6155fc2b2696ce Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Mon, 9 Jan 2012 15:00:46 +0100
4 Subject: [PATCH 5/7] spi/ath79: introduce ath79_spi_{en,dis}able helpers
5
6 ---
7 drivers/spi/spi-ath79.c | 41 +++++++++++++++++++++++++----------------
8 1 files changed, 25 insertions(+), 16 deletions(-)
9
10 --- a/drivers/spi/spi-ath79.c
11 +++ b/drivers/spi/spi-ath79.c
12 @@ -89,16 +89,8 @@ static void ath79_spi_chipselect(struct
13
14 }
15
16 -static int ath79_spi_setup_cs(struct spi_device *spi)
17 +static void ath79_spi_enable(struct ath79_spi *sp)
18 {
19 - struct ath79_spi *sp = ath79_spidev_to_sp(spi);
20 - struct ath79_spi_controller_data *cdata;
21 - int status;
22 -
23 - cdata = spi->controller_data;
24 - if (spi->chip_select && !cdata)
25 - return -EINVAL;
26 -
27 /* enable GPIO mode */
28 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
29
30 @@ -108,6 +100,24 @@ static int ath79_spi_setup_cs(struct spi
31
32 /* TODO: setup speed? */
33 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
34 +}
35 +
36 +static void ath79_spi_disable(struct ath79_spi *sp)
37 +{
38 + /* restore CTRL register */
39 + ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
40 + /* disable GPIO mode */
41 + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
42 +}
43 +
44 +static int ath79_spi_setup_cs(struct spi_device *spi)
45 +{
46 + struct ath79_spi_controller_data *cdata;
47 + int status;
48 +
49 + cdata = spi->controller_data;
50 + if (spi->chip_select && !cdata)
51 + return -EINVAL;
52
53 status = 0;
54 if (spi->chip_select) {
55 @@ -128,17 +138,10 @@ static int ath79_spi_setup_cs(struct spi
56
57 static void ath79_spi_cleanup_cs(struct spi_device *spi)
58 {
59 - struct ath79_spi *sp = ath79_spidev_to_sp(spi);
60 -
61 if (spi->chip_select) {
62 struct ath79_spi_controller_data *cdata = spi->controller_data;
63 gpio_free(cdata->gpio);
64 }
65 -
66 - /* restore CTRL register */
67 - ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
68 - /* disable GPIO mode */
69 - ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
70 }
71
72 static int ath79_spi_setup(struct spi_device *spi)
73 @@ -242,13 +245,15 @@ static __devinit int ath79_spi_probe(str
74 goto err_put_master;
75 }
76
77 + ath79_spi_enable(sp);
78 ret = spi_bitbang_start(&sp->bitbang);
79 if (ret)
80 - goto err_unmap;
81 + goto err_disable;
82
83 return 0;
84
85 -err_unmap:
86 +err_disable:
87 + ath79_spi_disable(sp);
88 iounmap(sp->base);
89 err_put_master:
90 platform_set_drvdata(pdev, NULL);
91 @@ -262,6 +267,7 @@ static __devexit int ath79_spi_remove(st
92 struct ath79_spi *sp = platform_get_drvdata(pdev);
93
94 spi_bitbang_stop(&sp->bitbang);
95 + ath79_spi_disable(sp);
96 iounmap(sp->base);
97 platform_set_drvdata(pdev, NULL);
98 spi_master_put(sp->bitbang.master);
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