target/linux/mpc83xx/patches/003-esdhc_wp-inverted_property.patch

   1 From 50dfe70fe9e216cf356830194630f9a39e498d76 Mon Sep 17 00:00:00 2001
   2 From: Anton Vorontsov <avorontsov@ru.mvista.com>
   3 Date: Tue, 22 Sep 2009 16:45:14 -0700
   4 Subject: [PATCH] powerpc: introduce and document sdhci,wp-inverted property for eSDHC
   5
   6 eSDHC block in MPC837x SOCs reports inverted write-protect state, soon
   7 sdhci-of driver will look for sdhci,wp-inverted properties to decide
   8 whether apply a specific quirk.
   9
  10 So, document the property and add it to device tree source files.
  11
  12 Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
  13 Cc: Pierre Ossman <pierre@ossman.eu>
  14 Cc: Kumar Gala <galak@kernel.crashing.org>
  15 Cc: David Vrabel <david.vrabel@csr.com>
  16 Cc: Ben Dooks <ben@fluff.org>
  17 Cc: Sascha Hauer <s.hauer@pengutronix.de>
  18 Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
  19 Cc: <linux-mmc@vger.kernel.org>
  20 Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  21 Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
  22 ---
  23  Documentation/powerpc/dts-bindings/fsl/esdhc.txt |    2 ++
  24  arch/powerpc/boot/dts/mpc8377_mds.dts            |    1 +
  25  arch/powerpc/boot/dts/mpc8377_rdb.dts            |    1 +
  26  arch/powerpc/boot/dts/mpc8377_wlan.dts           |    1 +
  27  arch/powerpc/boot/dts/mpc8378_mds.dts            |    1 +
  28  arch/powerpc/boot/dts/mpc8378_rdb.dts            |    1 +
  29  arch/powerpc/boot/dts/mpc8379_mds.dts            |    1 +
  30  arch/powerpc/boot/dts/mpc8379_rdb.dts            |    1 +
  31  8 files changed, 9 insertions(+), 0 deletions(-)
  32
  33 --- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
  34 +++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
  35 @@ -10,6 +10,8 @@ Required properties:
  36    - interrupts : should contain eSDHC interrupt.
  37    - interrupt-parent : interrupt source phandle.
  38    - clock-frequency : specifies eSDHC base clock frequency.
  39 +  - sdhci,wp-inverted : (optional) specifies that eSDHC controller
  40 +    reports inverted write-protect state;
  41    - sdhci,1-bit-only : (optional) specifies that a controller can
  42      only handle 1-bit data transfers.
  43
  44 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts
  45 +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
  46 @@ -159,6 +159,7 @@
  47                                 reg = <0x2e000 0x1000>;
  48                                 interrupts = <42 0x8>;
  49                                 interrupt-parent = <&ipic>;
  50 +                               sdhci,wp-inverted;
  51                                 /* Filled in by U-Boot */
  52                                 clock-frequency = <0>;
  53                         };
  54 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
  55 +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
  56 @@ -173,6 +173,7 @@
  57                                 reg = <0x2e000 0x1000>;
  58                                 interrupts = <42 0x8>;
  59                                 interrupt-parent = <&ipic>;
  60 +                               sdhci,wp-inverted;
  61                                 /* Filled in by U-Boot */
  62                                 clock-frequency = <0>;
  63                         };
  64 --- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
  65 +++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
  66 @@ -150,6 +150,7 @@
  67                                 reg = <0x2e000 0x1000>;
  68                                 interrupts = <42 0x8>;
  69                                 interrupt-parent = <&ipic>;
  70 +                               sdhci,wp-inverted;
  71                                 clock-frequency = <133333333>;
  72                         };
  73                 };
  74 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts
  75 +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
  76 @@ -159,6 +159,7 @@
  77                                 reg = <0x2e000 0x1000>;
  78                                 interrupts = <42 0x8>;
  79                                 interrupt-parent = <&ipic>;
  80 +                               sdhci,wp-inverted;
  81                                 /* Filled in by U-Boot */
  82                                 clock-frequency = <0>;
  83                         };
  84 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
  85 +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
  86 @@ -173,6 +173,7 @@
  87                                 reg = <0x2e000 0x1000>;
  88                                 interrupts = <42 0x8>;
  89                                 interrupt-parent = <&ipic>;
  90 +                               sdhci,wp-inverted;
  91                                 /* Filled in by U-Boot */
  92                                 clock-frequency = <0>;
  93                         };
  94 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts
  95 +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
  96 @@ -157,6 +157,7 @@
  97                                 reg = <0x2e000 0x1000>;
  98                                 interrupts = <42 0x8>;
  99                                 interrupt-parent = <&ipic>;
 100 +                               sdhci,wp-inverted;
 101                                 /* Filled in by U-Boot */
 102                                 clock-frequency = <0>;
 103                         };
 104 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
 105 +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
 106 @@ -171,6 +171,7 @@
 107                                 reg = <0x2e000 0x1000>;
 108                                 interrupts = <42 0x8>;
 109                                 interrupt-parent = <&ipic>;
 110 +                               sdhci,wp-inverted;
 111                                 /* Filled in by U-Boot */
 112                                 clock-frequency = <0>;
 113                         };