fix serial port warning on atheros
[openwrt.git] / tools / firmware-utils / src / zynos.h
1 /*
2 * $Id$
3 *
4 * Copyright (C) 2007 OpenWrt.org
5 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
6 *
7 * This code was based on the information of the ZyXEL's firmware
8 * image format written by Kolja Waschk, can be found at:
9 * http://www.ixo.de/info/zyxel_uclinux
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the
23 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
24 * Boston, MA 02110-1301, USA.
25 */
26
27 #ifndef _ZYNOS_H
28 #define _ZYNOS_H
29
30
31 #define BOOTBASE_NAME_LEN 32
32 #define BOOTBASE_MAC_LEN 6
33 #define BOOTBASE_FEAT_LEN 22
34
35 struct zyn_bootbase_info {
36 char vendor[BOOTBASE_NAME_LEN]; /* Vendor name */
37 char model[BOOTBASE_NAME_LEN]; /* Model name */
38 uint32_t bootext_addr; /* absolute address of the Boot Extension */
39 uint32_t res0;
40 uint16_t model_id; /* model id */
41 uint8_t feat_other[BOOTBASE_FEAT_LEN]; /* other feature bits */
42 uint8_t feat_main; /* main feature bits */
43 uint8_t res1; /* unknown/unused */
44 uint8_t mac[BOOTBASE_MAC_LEN]; /* mac address */
45 uint8_t country; /* default country code */
46 uint8_t dbgflag; /* debug flag */
47 } __attribute__((packed));
48
49 #define ROMBIN_SIG_LEN 3
50 #define ROMBIN_VER_LEN 15
51
52 struct zyn_rombin_hdr {
53 uint32_t addr; /* load address of the object */
54 uint16_t res0; /* unknown/unused */
55 char sig[ROMBIN_SIG_LEN]; /* magic, must be "SIG" */
56 uint8_t type; /* type of the object */
57 uint32_t osize; /* size of the uncompressed data */
58 uint32_t csize; /* size of the compressed data */
59 uint8_t flags; /* various flags */
60 uint8_t res1; /* unknown/unused */
61 uint16_t ocsum; /* csum of the uncompressed data */
62 uint16_t ccsum; /* csum of the compressed data */
63 char ver[ROMBIN_VER_LEN];
64 uint32_t mmap_addr; /* address of the Memory Map Table*/
65 uint32_t res2; /* unknown/unused*/
66 uint8_t res3; /* unknown/unused*/
67 } __attribute__((packed));
68
69 #define ROMBIN_SIGNATURE "SIG"
70
71 /* Rombin flag bits */
72 #define ROMBIN_FLAG_01 0x01
73 #define ROMBIN_FLAG_02 0x02
74 #define ROMBIN_FLAG_04 0x04
75 #define ROMBIN_FLAG_08 0x08
76 #define ROMBIN_FLAG_10 0x10
77 #define ROMBIN_FLAG_20 0x20
78 #define ROMBIN_FLAG_40 0x40
79 #define ROMBIN_FLAG_COMPRESSED 0x80 /* the binary is compressed */
80
81 /* Object types */
82 #define OBJECT_TYPE_ROMIMG 0x01
83 #define OBJECT_TYPE_ROMBOOT 0x02
84 #define OBJECT_TYPE_BOOTEXT 0x03
85 #define OBJECT_TYPE_ROMBIN 0x04
86 #define OBJECT_TYPE_ROMDIR 0x05
87 #define OBJECT_TYPE_6 0x06
88 #define OBJECT_TYPE_ROMMAP 0x07
89 #define OBJECT_TYPE_RAM 0x80
90 #define OBJECT_TYPE_RAMCODE 0x81
91 #define OBJECT_TYPE_RAMBOOT 0x82
92
93 /*
94 * Memory Map Table header
95 */
96 struct zyn_mmt_hdr {
97 uint16_t count;
98 uint32_t user_start;
99 uint32_t user_end;
100 uint16_t csum;
101 uint8_t res[12];
102 } __attribute__((packed));
103
104 #define OBJECT_NAME_LEN 8
105
106 struct zyn_mmt_item {
107 uint8_t type; /* type of the object */
108 uint8_t name[OBJECT_NAME_LEN]; /* name of the object */
109 uint8_t res0; /* unused/unknown */
110 uint32_t addr;
111 uint32_t size; /* size of the object */
112 uint8_t res1[3]; /* unused/unknown */
113 uint8_t type2;
114 } __attribute__((packed));
115
116 /*
117 * Board IDs (in big-endian format)
118 */
119 #define MID(x) (((x) & 0xFF) << 8) | (((x) & 0xFF00) >> 8)
120
121 /*
122 * Infineon/ADMtek ADM5120 based models
123 */
124 #define ZYNOS_MODEL_ES_2024A MID( 221)
125 #define ZYNOS_MODEL_ES_2024PWR MID( 4097)
126 #define ZYNOS_MODEL_ES_2108 MID(61952)
127 #define ZYNOS_MODEL_ES_2108_F MID(44801)
128 #define ZYNOS_MODEL_ES_2108_G MID(62208)
129 #define ZYNOS_MODEL_ES_2108_LC MID(64512)
130 #define ZYNOS_MODEL_ES_2108PWR MID(62464)
131 #define ZYNOS_MODEL_HS_100 MID(61855)
132 #define ZYNOS_MODEL_HS_100W ZYNOS_MODEL_HS_100
133 #define ZYNOS_MODEL_P_334 MID(62879)
134 #define ZYNOS_MODEL_P_334U MID(56735)
135 #define ZYNOS_MODEL_P_334W MID(62367)
136 #define ZYNOS_MODEL_P_334WH MID(57344)
137 #define ZYNOS_MODEL_P_334WHD MID(57600)
138 #define ZYNOS_MODEL_P_334WT MID(61343)
139 #define ZYNOS_MODEL_P_335 MID(60831)
140 #define ZYNOS_MODEL_P_335PLUS MID( 9472)
141 #define ZYNOS_MODEL_P_335U MID(56479)
142 #define ZYNOS_MODEL_P_335WT ZYNOS_MODEL_P_335
143
144 /*
145 * Texas Instruments AR7 based models
146 */
147 #define ZYNOS_MODEL_P_2602H_61C MID( 3229)
148 #define ZYNOS_MODEL_P_2602H_63C MID( 3485)
149 #define ZYNOS_MODEL_P_2602H_D1A /* n.a. */
150 #define ZYNOS_MODEL_P_2602H_D3A /* n.a. */
151 #define ZYNOS_MODEL_P_2602HW_61C /* n.a. */
152 #define ZYNOS_MODEL_P_2602HW_63 /* n.a. */
153 #define ZYNOS_MODEL_P_2602HW_63C ZYNOS_MODEL_P_2602H_63C
154 #define ZYNOS_MODEL_P_2602HW_D1A /* n.a. */
155 #define ZYNOS_MODEL_P_2602HW_D3A /* n.a. */
156 #define ZYNOS_MODEL_P_2602HWL_61 MID( 1181)
157 #define ZYNOS_MODEL_P_2602HWL_61C ZYNOS_MODEL_P_2602H_61C
158 #define ZYNOS_MODEL_P_2602HWL_63C ZYNOS_MODEL_P_2602H_63C
159 #define ZYNOS_MODEL_P_2602HWL_D1A MID( 6301)
160 #define ZYNOS_MODEL_P_2602HWL_D3A MID( 7581)
161 #define ZYNOS_MODEL_P_2602HWNLI_D7A MID( 6813)
162
163 #define ZYNOS_MODEL_P_2602R_61 MID( 2205)
164 #define ZYNOS_MODEL_P_2602R_63 MID( 3997)
165 #define ZYNOS_MODEL_P_2602R_D1A /* n.a. */
166 #define ZYNOS_MODEL_P_2602R_D3A /* n.a. */
167 #define ZYNOS_MODEL_P_2602RL_D1A MID( 6045)
168 #define ZYNOS_MODEL_P_2602RL_D3A MID( 7069)
169
170 #define ZYNOS_MODEL_P_660H_61 MID(19346)
171 #define ZYNOS_MODEL_P_660H_63 MID(22162)
172 #define ZYNOS_MODEL_P_660H_67 /* n.a. */
173 #define ZYNOS_MODEL_P_660H_D1 MID( 7066)
174 #define ZYNOS_MODEL_P_660H_D3 MID(13210)
175
176 #define ZYNOS_MODEL_P_660HW_61 ZYNOS_MODEL_P_660H_61
177 #define ZYNOS_MODEL_P_660HW_63 ZYNOS_MODEL_P_660H_63
178 #define ZYNOS_MODEL_P_660HW_67 ZYNOS_MODEL_P_660HW_63
179 #define ZYNOS_MODEL_P_660HW_D1 MID( 9114)
180 #define ZYNOS_MODEL_P_660HW_D3 MID(12698)
181
182 #define ZYNOS_MODEL_P_660R_61 MID(20882)
183 #define ZYNOS_MODEL_P_660R_61C MID( 1178)
184 #define ZYNOS_MODEL_P_660R_63 MID(21138)
185 #define ZYNOS_MODEL_P_660R_63C MID( 922)
186 #define ZYNOS_MODEL_P_660R_67 ZYNOS_MODEL_P_660R_63
187 #define ZYNOS_MODEL_P_660R_67C /* n.a. */
188 #define ZYNOS_MODEL_P_660R_D1 MID( 7322)
189 #define ZYNOS_MODEL_P_660R_D3 MID(10138)
190
191 #define ZYNOS_MODEL_P_661H_61 MID(19346)
192 #define ZYNOS_MODEL_P_661H_63 MID( 1946)
193 #define ZYNOS_MODEL_P_661H_D1 MID(10650)
194 #define ZYNOS_MODEL_P_661H_D3 MID(12442)
195
196 #define ZYNOS_MODEL_P_661HW_61 ZYNOS_MODEL_P_661H_61
197 #define ZYNOS_MODEL_P_661HW_63 ZYNOS_MODEL_P_661H_63
198 #define ZYNOS_MODEL_P_661HW_D1 MID(10906)
199 #define ZYNOS_MODEL_P_661HW_D3 MID(14746)
200
201 #define ZYNOS_MODEL_P_662H_61 MID(22418)
202 #define ZYNOS_MODEL_P_662H_63 /* n.a. */
203 #define ZYNOS_MODEL_P_662H_67 /* n.a. */
204 #define ZYNOS_MODEL_P_662H_D1 /* n.a. */
205 #define ZYNOS_MODEL_P_662H_D3 /* n.a. */
206
207 #define ZYNOS_MODEL_P_662HW_61 /* n.a. */
208 #define ZYNOS_MODEL_P_662HW_63 MID(22674)
209 #define ZYNOS_MODEL_P_662HW_67 /* n.a. */
210 #define ZYNOS_MODEL_P_662HW_D1 MID(10394)
211 #define ZYNOS_MODEL_P_662HW_D3 MID(12954)
212
213 #endif /* _ZYNOS_H */
This page took 0.046556 seconds and 5 git commands to generate.