adm5120 timing specific routines, was part of the IRQ handling rewritte
[openwrt.git] / target / linux / adm5120-2.6 / files / arch / mips / pci / ops-adm5120.c
1 /*
2 * $Id$
3 *
4 * ADM5120 specific PCI operations
5 *
6 * Copyright (C) ADMtek Incorporated.
7 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
8 * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
9 * Copyright (C) 2007 OpenWrt.org
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the
23 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
24 * Boston, MA 02110-1301, USA.
25 *
26 */
27
28 #include <linux/types.h>
29 #include <linux/pci.h>
30 #include <linux/kernel.h>
31 #include <linux/init.h>
32
33 #include <asm/mach-adm5120/adm5120_defs.h>
34
35 volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR);
36 volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA);
37
38 #define PCI_ENABLE 0x80000000
39
40 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
41 int size, uint32_t *val)
42 {
43 *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
44 ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
45 switch (size) {
46 case 1:
47 *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff;
48 break;
49 case 2:
50 *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff;
51 break;
52 default:
53 *val = (*pci_config_data_reg);
54 break;
55 }
56 return PCIBIOS_SUCCESSFUL;
57 }
58
59 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
60 int size, uint32_t val)
61 {
62 *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
63 ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
64 switch (size) {
65 case 1:
66 *(volatile u8 *)(((int)pci_config_data_reg) +
67 (where & 3)) = val;
68 break;
69 case 2:
70 *(volatile u16 *)(((int)pci_config_data_reg) +
71 (where & 2)) = (val);
72 break;
73 default:
74 *pci_config_data_reg = (val);
75 }
76
77 return PCIBIOS_SUCCESSFUL;
78 }
79
80 struct pci_ops adm5120_pci_ops = {
81 .read = pci_config_read,
82 .write = pci_config_write,
83 };
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