package/ltq-dsl/src/ifxmips_atm_ar9.c

   1 /******************************************************************************
   2 **
   3 ** FILE NAME    : ifxmips_atm_ar9.c
   4 ** PROJECT      : UEIP
   5 ** MODULES      : ATM
   6 **
   7 ** DATE         : 7 Jul 2009
   8 ** AUTHOR       : Xu Liang
   9 ** DESCRIPTION  : ATM driver common source file (core functions)
  10 ** COPYRIGHT    :       Copyright (c) 2006
  11 **                      Infineon Technologies AG
  12 **                      Am Campeon 1-12, 85579 Neubiberg, Germany
  13 **
  14 **    This program is free software; you can redistribute it and/or modify
  15 **    it under the terms of the GNU General Public License as published by
  16 **    the Free Software Foundation; either version 2 of the License, or
  17 **    (at your option) any later version.
  18 **
  19 ** HISTORY
  20 ** $Date        $Author         $Comment
  21 ** 07 JUL 2009  Xu Liang        Init Version
  22 *******************************************************************************/
  23
  24
  25
  26 /*
  27  * ####################################
  28  *              Head File
  29  * ####################################
  30  */
  31
  32 /*
  33  *  Common Head File
  34  */
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/version.h>
  38 #include <linux/types.h>
  39 #include <linux/errno.h>
  40 #include <linux/proc_fs.h>
  41 #include <linux/init.h>
  42 #include <linux/ioctl.h>
  43 #include <asm/delay.h>
  44
  45 /*
  46  *  Chip Specific Head File
  47  */
  48 #include <lantiq_soc.h>
  49 #include "ifxmips_compat.h"
  50 #define IFX_MEI_BSP 1
  51 #include "ifxmips_mei_interface.h"
  52 #include "ifxmips_atm_core.h"
  53 #include "ifxmips_atm_ppe_common.h"
  54  #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
  55   #include "ifxmips_atm_fw_ar9_retx.h"
  56 #else
  57   #include "ifxmips_atm_fw_ar9.h"
  58 #endif
  59
  60
  61
  62 /*
  63  * ####################################
  64  *              Definition
  65  * ####################################
  66  */
  67
  68 /*
  69  *  EMA Settings
  70  */
  71 #define EMA_CMD_BUF_LEN      0x0040
  72 #define EMA_CMD_BASE_ADDR    (0x00003B80 << 2)
  73 #define EMA_DATA_BUF_LEN     0x0100
  74 #define EMA_DATA_BASE_ADDR   (0x00003C00 << 2)
  75 #define EMA_WRITE_BURST      0x2
  76 #define EMA_READ_BURST       0x2
  77
  78
  79
  80 /*
  81  * ####################################
  82  *             Declaration
  83  * ####################################
  84  */
  85
  86 /*
  87  *  Hardware Init/Uninit Functions
  88  */
  89 static inline void init_pmu(void);
  90 static inline void uninit_pmu(void);
  91 static inline void reset_ppe(void);
  92 static inline void init_ema(void);
  93 static inline void init_mailbox(void);
  94 static inline void init_atm_tc(void);
  95 static inline void clear_share_buffer(void);
  96
  97
  98
  99 /*
 100  * ####################################
 101  *            Local Variable
 102  * ####################################
 103  */
 104
 105
 106
 107 /*
 108  * ####################################
 109  *            Local Function
 110  * ####################################
 111  */
 112
 113 static inline void init_pmu(void)
 114 {
 115     //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
 116     //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
 117     PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
 118     PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
 119     PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
 120     PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
 121     PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
 122     DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
 123 }
 124
 125 static inline void uninit_pmu(void)
 126 {
 127     PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
 128     PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
 129     PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
 130     PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
 131     PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
 132     DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
 133     //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
 134 }
 135
 136 static inline void reset_ppe(void)
 137 {
 138 #ifdef MODULE
 139     //  reset PPE
 140     //ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM);
 141 #endif
 142 }
 143
 144 static inline void init_ema(void)
 145 {
 146     IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
 147     IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
 148     IFX_REG_W32(0x000000FF, EMA_IER);
 149     IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
 150 }
 151
 152 static inline void init_mailbox(void)
 153 {
 154     IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
 155     IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
 156     IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
 157     IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
 158 }
 159
 160 static inline void init_atm_tc(void)
 161 {
 162 }
 163
 164 static inline void clear_share_buffer(void)
 165 {
 166     volatile u32 *p = SB_RAM0_ADDR(0);
 167     unsigned int i;
 168
 169     for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN + SB_RAM4_DWLEN; i++ )
 170         IFX_REG_W32(0, p++);
 171 }
 172
 173 /*
 174  *  Description:
 175  *    Download PPE firmware binary code.
 176  *  Input:
 177  *    src       --- u32 *, binary code buffer
 178  *    dword_len --- unsigned int, binary code length in DWORD (32-bit)
 179  *  Output:
 180  *    int       --- IFX_SUCCESS:    Success
 181  *                  else:           Error Code
 182  */
 183 static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
 184 {
 185     volatile u32 *dest;
 186
 187     if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
 188         || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
 189         return IFX_ERROR;
 190
 191     if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
 192         IFX_REG_W32(0x00, CDM_CFG);
 193     else
 194         IFX_REG_W32(0x04, CDM_CFG);
 195
 196     /*  copy code   */
 197     dest = CDM_CODE_MEMORY(0, 0);
 198     while ( code_dword_len-- > 0 )
 199         IFX_REG_W32(*code_src++, dest++);
 200
 201     /*  copy data   */
 202     dest = CDM_DATA_MEMORY(0, 0);
 203     while ( data_dword_len-- > 0 )
 204         IFX_REG_W32(*data_src++, dest++);
 205
 206     return IFX_SUCCESS;
 207 }
 208
 209
 210
 211 /*
 212  * ####################################
 213  *           Global Function
 214  * ####################################
 215  */
 216
 217 extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor)
 218 {
 219     ASSERT(major != NULL, "pointer is NULL");
 220     ASSERT(minor != NULL, "pointer is NULL");
 221
 222 #if (defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX) || defined(VER_IN_FIRMWARE)
 223     *major = FW_VER_ID->major;
 224     *minor = FW_VER_ID->minor;
 225 #else
 226     *major = ATM_FW_VER_MAJOR;
 227     *minor = ATM_FW_VER_MINOR;
 228 #endif
 229 }
 230
 231 void ifx_atm_init_chip(void)
 232 {
 233     init_pmu();
 234
 235     reset_ppe();
 236
 237     init_ema();
 238
 239     init_mailbox();
 240
 241     init_atm_tc();
 242
 243     clear_share_buffer();
 244 }
 245
 246 void ifx_atm_uninit_chip(void)
 247 {
 248     uninit_pmu();
 249 }
 250
 251 /*
 252  *  Description:
 253  *    Initialize and start up PP32.
 254  *  Input:
 255  *    none
 256  *  Output:
 257  *    int  --- IFX_SUCCESS: Success
 258  *             else:        Error Code
 259  */
 260 int ifx_pp32_start(int pp32)
 261 {
 262     int ret;
 263
 264     /*  download firmware   */
 265     ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
 266     if ( ret != IFX_SUCCESS )
 267         return ret;
 268
 269     /*  run PP32    */
 270     IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL(0));
 271
 272     /*  idle for a while to let PP32 init itself    */
 273     udelay(10);
 274
 275     return IFX_SUCCESS;
 276 }
 277
 278 /*
 279  *  Description:
 280  *    Halt PP32.
 281  *  Input:
 282  *    none
 283  *  Output:
 284  *    none
 285  */
 286 void ifx_pp32_stop(int pp32)
 287 {
 288     /*  halt PP32   */
 289     IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(0));
 290 }