package/uboot-ifxmips/files/cpu/mips/danube/au1x00_serial.c

   1 /*
   2  * AU1X00 UART support
   3  *
   4  * Hardcoded to UART 0 for now
   5  * Speed and options also hardcoded to 115200 8N1
   6  *
   7  *  Copyright (c) 2003  Thomas.Lange@corelatus.se
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #include <config.h>
  29
  30 #ifdef CONFIG_AU1X00
  31
  32 #include <common.h>
  33 #include <asm/au1x00.h>
  34
  35 /******************************************************************************
  36 *
  37 * serial_init - initialize a channel
  38 *
  39 * This routine initializes the number of data bits, parity
  40 * and set the selected baud rate. Interrupts are disabled.
  41 * Set the modem control signals if the option is selected.
  42 *
  43 * RETURNS: N/A
  44 */
  45
  46 int serial_init (void)
  47 {
  48         volatile u32 *uart_fifoctl = (volatile u32*)(UART0_ADDR+UART_FCR);
  49         volatile u32 *uart_enable = (volatile u32*)(UART0_ADDR+UART_ENABLE);
  50
  51         /* Enable clocks first */
  52         *uart_enable = UART_EN_CE;
  53
  54         /* Then release reset */
  55         /* Must release reset before setting other regs */
  56         *uart_enable = UART_EN_CE|UART_EN_E;
  57
  58         /* Activate fifos, reset tx and rx */
  59         /* Set tx trigger level to 12 */
  60         *uart_fifoctl = UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|
  61                 UART_FCR_CLEAR_XMIT|UART_FCR_T_TRIGGER_12;
  62
  63         serial_setbrg();
  64
  65         return 0;
  66 }
  67
  68
  69 void serial_setbrg (void)
  70 {
  71         volatile u32 *uart_clk = (volatile u32*)(UART0_ADDR+UART_CLK);
  72         volatile u32 *uart_lcr = (volatile u32*)(UART0_ADDR+UART_LCR);
  73         volatile u32 *sys_powerctrl = (u32 *)SYS_POWERCTRL;
  74         int sd;
  75         int divisorx2;
  76
  77         /* sd is system clock divisor                   */
  78         /* see section 10.4.5 in au1550 datasheet       */
  79         sd = (*sys_powerctrl & 0x03) + 2;
  80
  81         /* calulate 2x baudrate and round */
  82         divisorx2 = ((CFG_HZ/(sd * 16 * CONFIG_BAUDRATE)));
  83
  84         if (divisorx2 & 0x01)
  85                 divisorx2 = divisorx2 + 1;
  86
  87         *uart_clk = divisorx2 / 2;
  88
  89         /* Set parity, stop bits and word length to 8N1 */
  90         *uart_lcr = UART_LCR_WLEN8;
  91 }
  92
  93 void serial_putc (const char c)
  94 {
  95         volatile u32 *uart_lsr = (volatile u32*)(UART0_ADDR+UART_LSR);
  96         volatile u32 *uart_tx = (volatile u32*)(UART0_ADDR+UART_TX);
  97
  98         if (c == '\n') serial_putc ('\r');
  99
 100         /* Wait for fifo to shift out some bytes */
 101         while((*uart_lsr&UART_LSR_THRE)==0);
 102
 103         *uart_tx = (u32)c;
 104 }
 105
 106 void serial_puts (const char *s)
 107 {
 108         while (*s)
 109         {
 110                 serial_putc (*s++);
 111         }
 112 }
 113
 114 int serial_getc (void)
 115 {
 116         volatile u32 *uart_rx = (volatile u32*)(UART0_ADDR+UART_RX);
 117         char c;
 118
 119         while (!serial_tstc());
 120
 121         c = (*uart_rx&0xFF);
 122         return c;
 123 }
 124
 125 int serial_tstc (void)
 126 {
 127         volatile u32 *uart_lsr = (volatile u32*)(UART0_ADDR+UART_LSR);
 128
 129         if(*uart_lsr&UART_LSR_DR){
 130                 /* Data in rfifo */
 131                 return(1);
 132         }
 133         return 0;
 134 }
 135 #endif /* CONFIG_SERIAL_AU1X00 */