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ramips: ramips_esw: use a private structure for the functions
[openwrt.git] / target / linux / ramips / files / drivers / net / ramips.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
14 *
15 * Copyright (C) 2009 John Crispin <blogic@openwrt.org>
16 */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/init.h>
23 #include <linux/skbuff.h>
24 #include <linux/etherdevice.h>
25 #include <linux/ethtool.h>
26 #include <linux/platform_device.h>
27
28 #include <ramips_eth_platform.h>
29 #include "ramips_eth.h"
30
31 #define TX_TIMEOUT (20 * HZ / 100)
32 #define MAX_RX_LENGTH 1600
33
34 #ifdef CONFIG_RALINK_RT305X
35 #include "ramips_esw.c"
36 #endif
37
38 #define phys_to_bus(a) (a & 0x1FFFFFFF)
39
40 static struct net_device * ramips_dev;
41 static void __iomem *ramips_fe_base = 0;
42
43 static inline void
44 ramips_fe_wr(u32 val, unsigned reg)
45 {
46 __raw_writel(val, ramips_fe_base + reg);
47 }
48
49 static inline u32
50 ramips_fe_rr(unsigned reg)
51 {
52 return __raw_readl(ramips_fe_base + reg);
53 }
54
55 static inline void
56 ramips_fe_int_disable(u32 mask)
57 {
58 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask,
59 RAMIPS_FE_INT_ENABLE);
60 /* flush write */
61 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
62 }
63
64 static inline void
65 ramips_fe_int_enable(u32 mask)
66 {
67 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask,
68 RAMIPS_FE_INT_ENABLE);
69 /* flush write */
70 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
71 }
72
73 static inline void
74 ramips_hw_set_macaddr(unsigned char *mac)
75 {
76 ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
77 ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
78 RAMIPS_GDMA1_MAC_ADRL);
79 }
80
81 #ifdef CONFIG_RALINK_RT288X
82 static void
83 ramips_setup_mdio_cfg(struct raeth_priv *re)
84 {
85 unsigned int mdio_cfg;
86
87 mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
88 RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
89 RAMIPS_MDIO_CFG_GP1_FRC_EN;
90
91 if (re->duplex == DUPLEX_FULL)
92 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
93
94 if (re->tx_fc)
95 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
96
97 if (re->rx_fc)
98 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
99
100 switch (re->speed) {
101 case SPEED_10:
102 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
103 break;
104 case SPEED_100:
105 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
106 break;
107 case SPEED_1000:
108 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
109 break;
110 default:
111 BUG();
112 }
113
114 ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
115 }
116 #else
117 static inline void ramips_setup_mdio_cfg(struct raeth_priv *re)
118 {
119 }
120 #endif /* CONFIG_RALINK_RT288X */
121
122 static void
123 ramips_cleanup_dma(struct raeth_priv *re)
124 {
125 int i;
126
127 for (i = 0; i < NUM_RX_DESC; i++)
128 if (re->rx_skb[i])
129 dev_kfree_skb_any(re->rx_skb[i]);
130
131 if (re->rx)
132 dma_free_coherent(NULL,
133 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
134 re->rx, re->phy_rx);
135
136 if (re->tx)
137 dma_free_coherent(NULL,
138 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
139 re->tx, re->phy_tx);
140 }
141
142 static int
143 ramips_alloc_dma(struct raeth_priv *re)
144 {
145 int err = -ENOMEM;
146 int i;
147
148 re->skb_free_idx = 0;
149
150 /* setup tx ring */
151 re->tx = dma_alloc_coherent(NULL,
152 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
153 &re->phy_tx, GFP_ATOMIC);
154 if (!re->tx)
155 goto err_cleanup;
156
157 memset(re->tx, 0, NUM_TX_DESC * sizeof(struct ramips_tx_dma));
158 for (i = 0; i < NUM_TX_DESC; i++) {
159 re->tx[i].txd2 = TX_DMA_LSO | TX_DMA_DONE;
160 re->tx[i].txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
161 }
162
163 /* setup rx ring */
164 re->rx = dma_alloc_coherent(NULL,
165 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
166 &re->phy_rx, GFP_ATOMIC);
167 if (!re->rx)
168 goto err_cleanup;
169
170 memset(re->rx, 0, sizeof(struct ramips_rx_dma) * NUM_RX_DESC);
171 for (i = 0; i < NUM_RX_DESC; i++) {
172 struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_LENGTH +
173 NET_IP_ALIGN);
174
175 if (!new_skb)
176 goto err_cleanup;
177
178 skb_reserve(new_skb, NET_IP_ALIGN);
179 re->rx[i].rxd1 = dma_map_single(NULL,
180 new_skb->data,
181 MAX_RX_LENGTH,
182 DMA_FROM_DEVICE);
183 re->rx[i].rxd2 |= RX_DMA_LSO;
184 re->rx_skb[i] = new_skb;
185 }
186
187 return 0;
188
189 err_cleanup:
190 ramips_cleanup_dma(re);
191 return err;
192 }
193
194 static void
195 ramips_setup_dma(struct raeth_priv *re)
196 {
197 ramips_fe_wr(phys_to_bus(re->phy_tx), RAMIPS_TX_BASE_PTR0);
198 ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0);
199 ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0);
200 ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG);
201
202 ramips_fe_wr(phys_to_bus(re->phy_rx), RAMIPS_RX_BASE_PTR0);
203 ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0);
204 ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0);
205 ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG);
206 }
207
208 static int
209 ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
210 {
211 struct raeth_priv *priv = netdev_priv(dev);
212 unsigned long tx;
213 unsigned int tx_next;
214 unsigned int mapped_addr;
215 unsigned long flags;
216
217 if (priv->plat->min_pkt_len) {
218 if (skb->len < priv->plat->min_pkt_len) {
219 if (skb_padto(skb, priv->plat->min_pkt_len)) {
220 printk(KERN_ERR
221 "ramips_eth: skb_padto failed\n");
222 kfree_skb(skb);
223 return 0;
224 }
225 skb_put(skb, priv->plat->min_pkt_len - skb->len);
226 }
227 }
228
229 dev->trans_start = jiffies;
230 mapped_addr = (unsigned int) dma_map_single(NULL, skb->data, skb->len,
231 DMA_TO_DEVICE);
232 dma_sync_single_for_device(NULL, mapped_addr, skb->len, DMA_TO_DEVICE);
233 spin_lock_irqsave(&priv->page_lock, flags);
234 tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0);
235 tx_next = (tx + 1) % NUM_TX_DESC;
236
237 if ((priv->tx_skb[tx]) || (priv->tx_skb[tx_next]) ||
238 !(priv->tx[tx].txd2 & TX_DMA_DONE) ||
239 !(priv->tx[tx_next].txd2 & TX_DMA_DONE))
240 goto out;
241
242 priv->tx[tx].txd1 = mapped_addr;
243 priv->tx[tx].txd2 &= ~(TX_DMA_PLEN0_MASK | TX_DMA_DONE);
244 priv->tx[tx].txd2 |= TX_DMA_PLEN0(skb->len);
245 dev->stats.tx_packets++;
246 dev->stats.tx_bytes += skb->len;
247 priv->tx_skb[tx] = skb;
248 wmb();
249 ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0);
250 spin_unlock_irqrestore(&priv->page_lock, flags);
251 return NETDEV_TX_OK;
252
253 out:
254 spin_unlock_irqrestore(&priv->page_lock, flags);
255 dev->stats.tx_dropped++;
256 kfree_skb(skb);
257 return NETDEV_TX_OK;
258 }
259
260 static void
261 ramips_eth_rx_hw(unsigned long ptr)
262 {
263 struct net_device *dev = (struct net_device *) ptr;
264 struct raeth_priv *priv = netdev_priv(dev);
265 int rx;
266 int max_rx = 16;
267
268 while (max_rx) {
269 struct sk_buff *rx_skb, *new_skb;
270
271 rx = (ramips_fe_rr(RAMIPS_RX_CALC_IDX0) + 1) % NUM_RX_DESC;
272 if (!(priv->rx[rx].rxd2 & RX_DMA_DONE))
273 break;
274 max_rx--;
275
276 new_skb = netdev_alloc_skb(dev, MAX_RX_LENGTH + NET_IP_ALIGN);
277 /* Reuse the buffer on allocation failures */
278 if (new_skb) {
279 rx_skb = priv->rx_skb[rx];
280 skb_put(rx_skb, RX_DMA_PLEN0(priv->rx[rx].rxd2));
281 rx_skb->dev = dev;
282 rx_skb->protocol = eth_type_trans(rx_skb, dev);
283 rx_skb->ip_summed = CHECKSUM_NONE;
284 dev->stats.rx_packets++;
285 dev->stats.rx_bytes += rx_skb->len;
286 netif_rx(rx_skb);
287
288 priv->rx_skb[rx] = new_skb;
289 skb_reserve(new_skb, NET_IP_ALIGN);
290 priv->rx[rx].rxd1 = dma_map_single(NULL,
291 new_skb->data,
292 MAX_RX_LENGTH,
293 DMA_FROM_DEVICE);
294 }
295
296 priv->rx[rx].rxd2 &= ~RX_DMA_DONE;
297 wmb();
298 ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0);
299 }
300
301 if (max_rx == 0)
302 tasklet_schedule(&priv->rx_tasklet);
303 else
304 ramips_fe_int_enable(RAMIPS_RX_DLY_INT);
305 }
306
307 static void
308 ramips_eth_tx_housekeeping(unsigned long ptr)
309 {
310 struct net_device *dev = (struct net_device*)ptr;
311 struct raeth_priv *priv = netdev_priv(dev);
312
313 while ((priv->tx[priv->skb_free_idx].txd2 & TX_DMA_DONE) &&
314 (priv->tx_skb[priv->skb_free_idx])) {
315 dev_kfree_skb_irq(priv->tx_skb[priv->skb_free_idx]);
316 priv->tx_skb[priv->skb_free_idx] = 0;
317 priv->skb_free_idx++;
318 if (priv->skb_free_idx >= NUM_TX_DESC)
319 priv->skb_free_idx = 0;
320 }
321
322 ramips_fe_int_enable(RAMIPS_TX_DLY_INT);
323 }
324
325 static void
326 ramips_eth_timeout(struct net_device *dev)
327 {
328 struct raeth_priv *priv = netdev_priv(dev);
329
330 tasklet_schedule(&priv->tx_housekeeping_tasklet);
331 }
332
333 static irqreturn_t
334 ramips_eth_irq(int irq, void *dev)
335 {
336 struct raeth_priv *priv = netdev_priv(dev);
337 unsigned long fe_int = ramips_fe_rr(RAMIPS_FE_INT_STATUS);
338
339 ramips_fe_wr(0xFFFFFFFF, RAMIPS_FE_INT_STATUS);
340
341 if (fe_int & RAMIPS_RX_DLY_INT) {
342 ramips_fe_int_disable(RAMIPS_RX_DLY_INT);
343 tasklet_schedule(&priv->rx_tasklet);
344 }
345
346 if (fe_int & RAMIPS_TX_DLY_INT)
347 ramips_eth_tx_housekeeping((unsigned long)dev);
348
349 return IRQ_HANDLED;
350 }
351
352 static int
353 ramips_eth_open(struct net_device *dev)
354 {
355 struct raeth_priv *priv = netdev_priv(dev);
356 int err;
357
358 err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
359 dev->name, dev);
360 if (err)
361 return err;
362
363 err = ramips_alloc_dma(priv);
364 if (err)
365 goto err_free_irq;
366
367 ramips_hw_set_macaddr(dev->dev_addr);
368
369 ramips_setup_dma(priv);
370 ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) |
371 (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
372 RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
373 RAMIPS_PDMA_GLO_CFG);
374 ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
375 ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
376 ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
377 RAMIPS_FE_GLO_CFG);
378
379 tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
380 (unsigned long)dev);
381 tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
382
383 ramips_setup_mdio_cfg(priv);
384
385 ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG);
386 ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE);
387 ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
388 ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
389 RAMIPS_GDMA1_FWD_CFG);
390 ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
391 ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
392 RAMIPS_CDMA_CSG_CFG);
393 ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
394 ramips_fe_wr(1, RAMIPS_FE_RST_GL);
395 ramips_fe_wr(0, RAMIPS_FE_RST_GL);
396
397 netif_start_queue(dev);
398 return 0;
399
400 err_free_irq:
401 free_irq(dev->irq, dev);
402 return err;
403 }
404
405 static int
406 ramips_eth_stop(struct net_device *dev)
407 {
408 struct raeth_priv *priv = netdev_priv(dev);
409
410 ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) &
411 ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
412 RAMIPS_PDMA_GLO_CFG);
413
414 /* disable all interrupts in the hw */
415 ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE);
416
417 free_irq(dev->irq, dev);
418 netif_stop_queue(dev);
419 tasklet_kill(&priv->tx_housekeeping_tasklet);
420 tasklet_kill(&priv->rx_tasklet);
421 ramips_cleanup_dma(priv);
422 printk(KERN_DEBUG "ramips_eth: stopped\n");
423 return 0;
424 }
425
426 static int __init
427 ramips_eth_probe(struct net_device *dev)
428 {
429 struct raeth_priv *priv = netdev_priv(dev);
430
431 BUG_ON(!priv->plat->reset_fe);
432 priv->plat->reset_fe();
433 net_srandom(jiffies);
434 memcpy(dev->dev_addr, priv->plat->mac, ETH_ALEN);
435
436 ether_setup(dev);
437 dev->mtu = 1500;
438 dev->watchdog_timeo = TX_TIMEOUT;
439 spin_lock_init(&priv->page_lock);
440
441 return 0;
442 }
443
444 static const struct net_device_ops ramips_eth_netdev_ops = {
445 .ndo_init = ramips_eth_probe,
446 .ndo_open = ramips_eth_open,
447 .ndo_stop = ramips_eth_stop,
448 .ndo_start_xmit = ramips_eth_hard_start_xmit,
449 .ndo_tx_timeout = ramips_eth_timeout,
450 .ndo_change_mtu = eth_change_mtu,
451 .ndo_set_mac_address = eth_mac_addr,
452 .ndo_validate_addr = eth_validate_addr,
453 };
454
455 static int
456 ramips_eth_plat_probe(struct platform_device *plat)
457 {
458 struct raeth_priv *priv;
459 struct ramips_eth_platform_data *data = plat->dev.platform_data;
460 struct resource *res;
461 int err;
462
463 if (!data) {
464 dev_err(&plat->dev, "no platform data specified\n");
465 return -EINVAL;
466 }
467
468 res = platform_get_resource(plat, IORESOURCE_MEM, 0);
469 if (!res) {
470 dev_err(&plat->dev, "no memory resource found\n");
471 return -ENXIO;
472 }
473
474 ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
475 if (!ramips_fe_base)
476 return -ENOMEM;
477
478 ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
479 if (!ramips_dev) {
480 dev_err(&plat->dev, "alloc_etherdev failed\n");
481 err = -ENOMEM;
482 goto err_unmap;
483 }
484
485 strcpy(ramips_dev->name, "eth%d");
486 ramips_dev->irq = platform_get_irq(plat, 0);
487 if (ramips_dev->irq < 0) {
488 dev_err(&plat->dev, "no IRQ resource found\n");
489 err = -ENXIO;
490 goto err_free_dev;
491 }
492 ramips_dev->addr_len = ETH_ALEN;
493 ramips_dev->base_addr = (unsigned long)ramips_fe_base;
494 ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
495
496 priv = netdev_priv(ramips_dev);
497
498 priv->speed = data->speed;
499 priv->duplex = data->duplex;
500 priv->rx_fc = data->rx_fc;
501 priv->tx_fc = data->tx_fc;
502 priv->plat = data;
503
504 err = register_netdev(ramips_dev);
505 if (err) {
506 dev_err(&plat->dev, "error bringing up device\n");
507 goto err_free_dev;
508 }
509
510 #ifdef CONFIG_RALINK_RT305X
511 rt305x_esw_init();
512 #endif
513 printk(KERN_DEBUG "ramips_eth: loaded\n");
514 return 0;
515
516 err_free_dev:
517 kfree(ramips_dev);
518 err_unmap:
519 iounmap(ramips_fe_base);
520 return err;
521 }
522
523 static int
524 ramips_eth_plat_remove(struct platform_device *plat)
525 {
526 unregister_netdev(ramips_dev);
527 free_netdev(ramips_dev);
528 printk(KERN_DEBUG "ramips_eth: unloaded\n");
529 return 0;
530 }
531
532 static struct platform_driver ramips_eth_driver = {
533 .probe = ramips_eth_plat_probe,
534 .remove = ramips_eth_plat_remove,
535 .driver = {
536 .name = "ramips_eth",
537 .owner = THIS_MODULE,
538 },
539 };
540
541 static int __init
542 ramips_eth_init(void)
543 {
544 int ret = platform_driver_register(&ramips_eth_driver);
545 if (ret)
546 printk(KERN_ERR
547 "ramips_eth: Error registering platfom driver!\n");
548 return ret;
549 }
550
551 static void __exit
552 ramips_eth_cleanup(void)
553 {
554 platform_driver_unregister(&ramips_eth_driver);
555 }
556
557 module_init(ramips_eth_init);
558 module_exit(ramips_eth_cleanup);
559
560 MODULE_LICENSE("GPL");
561 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
562 MODULE_DESCRIPTION("ethernet driver for ramips boards");
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