1 --- a/arch/arm/mach-ixp4xx/cambria-setup.c
2 +++ b/arch/arm/mach-ixp4xx/cambria-setup.c
4 #include <asm/mach/arch.h>
5 #include <asm/mach/flash.h>
7 +#include <linux/irq.h>
9 struct cambria_board_info {
11 @@ -127,6 +128,45 @@ static struct platform_device cambria_ua
12 .resource = &cambria_uart_resource,
15 +static struct resource cambria_optional_uart_resources[] = {
17 + .start = 0x52000000,
19 + .flags = IORESOURCE_MEM
22 + .start = 0x53000000,
24 + .flags = IORESOURCE_MEM
28 +static struct plat_serial8250_port cambria_optional_uart_data[] = {
30 + .flags = UPF_BOOT_AUTOCONF,
31 + .iotype = UPIO_MEM_DELAY,
37 + .flags = UPF_BOOT_AUTOCONF,
38 + .iotype = UPIO_MEM_DELAY,
46 +static struct platform_device cambria_optional_uart = {
47 + .name = "serial8250",
48 + .id = PLAT8250_DEV_PLATFORM1,
49 + .dev.platform_data = cambria_optional_uart_data,
51 + .resource = cambria_optional_uart_resources,
54 static struct resource cambria_pata_resources[] = {
56 .flags = IORESOURCE_MEM
57 @@ -283,6 +323,19 @@ static void __init cambria_gw23xx_setup(
59 static void __init cambria_gw2350_setup(void)
61 + *IXP4XX_EXP_CS2 = 0xBFFF3C43;
62 + set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
63 + cambria_optional_uart_data[0].mapbase = 0x52FF0000;
64 + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52FF0000, 0x0fff);
65 + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
67 + *IXP4XX_EXP_CS3 = 0xBFFF3C43;
68 + set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
69 + cambria_optional_uart_data[1].mapbase = 0x53FF0000;
70 + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53FF0000, 0x0fff);
71 + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
73 + platform_device_register(&cambria_optional_uart);
74 platform_device_register(&cambria_npec_device);
75 platform_device_register(&cambria_npea_device);
77 @@ -294,6 +347,19 @@ static void __init cambria_gw2350_setup(
79 static void __init cambria_gw2358_setup(void)
81 + *IXP4XX_EXP_CS3 = 0xBFFF3C43;
82 + set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
83 + cambria_optional_uart_data[0].mapbase = 0x53FC0000;
84 + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff);
85 + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
87 + set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
88 + cambria_optional_uart_data[1].mapbase = 0x53F80000;
89 + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
90 + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
92 + platform_device_register(&cambria_optional_uart);
94 platform_device_register(&cambria_npec_device);
95 platform_device_register(&cambria_npea_device);
97 --- a/include/linux/serial_8250.h
98 +++ b/include/linux/serial_8250.h
99 @@ -27,6 +27,7 @@ struct plat_serial8250_port {
101 unsigned char regshift; /* register shift */
102 unsigned char iotype; /* UPIO_* */
103 + unsigned int rw_delay; /* udelay for slower busses IXP4XX Expansion Bus */
105 upf_t flags; /* UPF_* flags */
106 unsigned int type; /* If UPF_FIXED_TYPE */
107 --- a/include/linux/serial_core.h
108 +++ b/include/linux/serial_core.h
109 @@ -306,6 +306,7 @@ struct uart_port {
110 #define UPIO_TSI (5) /* Tsi108/109 type IO */
111 #define UPIO_DWAPB (6) /* DesignWare APB UART */
112 #define UPIO_RM9000 (7) /* RM9000 type IO */
113 +#define UPIO_MEM_DELAY (8)
115 unsigned int read_status_mask; /* driver specific */
116 unsigned int ignore_status_mask; /* driver specific */
117 @@ -348,6 +349,7 @@ struct uart_port {
119 unsigned int mctrl; /* current modem ctrl settings */
120 unsigned int timeout; /* character-based timeout */
121 + unsigned int rw_delay; /* udelay for slow busses, IXP4XX Expansion Bus */
122 unsigned int type; /* port type */
123 const struct uart_ops *ops;
124 unsigned int custom_divisor;
125 --- a/drivers/serial/8250.c
126 +++ b/drivers/serial/8250.c
127 @@ -417,6 +417,20 @@ static void mem_serial_out(struct uart_p
128 writeb(value, p->membase + offset);
131 +static unsigned int memdelay_serial_in(struct uart_port *p, int offset)
133 + struct uart_8250_port *up = (struct uart_8250_port *)p;
134 + udelay(up->port.rw_delay);
135 + return mem_serial_in(p, offset);
138 +static void memdelay_serial_out(struct uart_port *p, int offset, int value)
140 + struct uart_8250_port *up = (struct uart_8250_port *)p;
141 + udelay(up->port.rw_delay);
142 + mem_serial_out(p, offset, value);
145 static void mem32_serial_out(struct uart_port *p, int offset, int value)
147 offset = map_8250_out_reg(p, offset) << p->regshift;
148 @@ -508,6 +522,11 @@ static void set_io_from_upio(struct uart
149 p->serial_out = mem32_serial_out;
152 + case UPIO_MEM_DELAY:
153 + p->serial_in = memdelay_serial_in;
154 + p->serial_out = memdelay_serial_out;
158 p->serial_in = au_serial_in;
159 p->serial_out = au_serial_out;
160 @@ -539,6 +558,7 @@ serial_out_sync(struct uart_8250_port *u
164 + case UPIO_MEM_DELAY:
167 p->serial_out(p, offset, value);
168 @@ -2477,6 +2497,7 @@ static int serial8250_request_std_resour
172 + case UPIO_MEM_DELAY:
173 if (!up->port.mapbase)
176 @@ -2514,6 +2535,7 @@ static void serial8250_release_std_resou
180 + case UPIO_MEM_DELAY:
181 if (!up->port.mapbase)
184 @@ -3011,6 +3033,7 @@ static int __devinit serial8250_probe(st
185 port.serial_out = p->serial_out;
186 port.set_termios = p->set_termios;
187 port.dev = &dev->dev;
188 + port.rw_delay = p->rw_delay;
189 port.irqflags |= irqflag;
190 ret = serial8250_register_port(&port);
192 @@ -3160,6 +3183,7 @@ int serial8250_register_port(struct uart
193 uart->port.iotype = port->iotype;
194 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
195 uart->port.mapbase = port->mapbase;
196 + uart->port.rw_delay = port->rw_delay;
197 uart->port.private_data = port->private_data;
199 uart->port.dev = port->dev;
200 --- a/drivers/serial/serial_core.c
201 +++ b/drivers/serial/serial_core.c
202 @@ -2122,6 +2122,7 @@ uart_report_port(struct uart_driver *drv
203 snprintf(address, sizeof(address),
204 "I/O 0x%lx offset 0x%x", port->iobase, port->hub6);
206 + case UPIO_MEM_DELAY:
210 @@ -2541,6 +2542,7 @@ int uart_match_port(struct uart_port *po
212 return (port1->iobase == port2->iobase) &&
213 (port1->hub6 == port2->hub6);
214 + case UPIO_MEM_DELAY: