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New PCI fixup version, should better assign IRQs for boards, thanks Gabor !
[openwrt.git] / target / linux / adm5120-2.6 / files / drivers / usb / host / adm5120-hcd.c
1 /*
2 * HCD driver for ADM5120 SoC
3 *
4 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
5 *
6 * Based on the ADMtek 2.4 driver
7 * (C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
8 * Which again was based on the ohci and uhci drivers.
9 */
10
11 #include <linux/module.h>
12 #include <linux/delay.h>
13 #include <linux/debugfs.h>
14 #include <linux/seq_file.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/usb.h>
19 #include <linux/platform_device.h>
20
21 #include <asm/io.h>
22 #include <asm/irq.h>
23 #include <asm/system.h>
24 #include <asm/byteorder.h>
25 #include <asm/mach-adm5120/adm5120_info.h>
26
27 #include "../core/hcd.h"
28
29 MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
30 MODULE_LICENSE("GPL");
31 MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
32
33 #define PFX "adm5120-hcd: "
34
35 #define ADMHCD_REG_CONTROL 0x00
36 #define ADMHCD_REG_INTSTATUS 0x04
37 #define ADMHCD_REG_INTENABLE 0x08
38 #define ADMHCD_REG_HOSTCONTROL 0x10
39 #define ADMHCD_REG_FMINTERVAL 0x18
40 #define ADMHCD_REG_FMNUMBER 0x1c
41 #define ADMHCD_REG_LSTHRESH 0x70
42 #define ADMHCD_REG_RHDESCR 0x74
43 #define ADMHCD_REG_PORTSTATUS0 0x78
44 #define ADMHCD_REG_PORTSTATUS1 0x7c
45 #define ADMHCD_REG_HOSTHEAD 0x80
46
47
48 #define ADMHCD_NUMPORTS 2
49
50 #define ADMHCD_HOST_EN 0x00000001 /* Host enable */
51 #define ADMHCD_SW_INTREQ 0x00000002 /* request software int */
52 #define ADMHCD_SW_RESET 0x00000008 /* Reset */
53
54 #define ADMHCD_INT_TD 0x00100000 /* TD completed */
55 #define ADMHCD_INT_SW 0x20000000 /* software interrupt */
56 #define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */
57 #define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */
58
59 #define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
60 #define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
61 #define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
62 #define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */
63 #define ADMHCD_DMA_EN 0x00000004 /* enable dma engine */
64
65 #define ADMHCD_NPS 0x00000020 /* No Power Switch */
66 #define ADMHCD_LPSC 0x04000000 /* Local power switch change */
67
68 #define ADMHCD_CCS 0x00000001 /* current connect status */
69 #define ADMHCD_PES 0x00000002 /* port enable status */
70 #define ADMHCD_PSS 0x00000004 /* port suspend status */
71 #define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */
72 #define ADMHCD_PRS 0x00000010 /* port reset status */
73 #define ADMHCD_PPS 0x00000100 /* port power status */
74 #define ADMHCD_LSDA 0x00000200 /* low speed device attached */
75 #define ADMHCD_CSC 0x00010000 /* connect status change */
76 #define ADMHCD_PESC 0x00020000 /* enable status change */
77 #define ADMHCD_PSSC 0x00040000 /* suspend status change */
78 #define ADMHCD_OCIC 0x00080000 /* overcurrent change*/
79 #define ADMHCD_PRSC 0x00100000 /* reset status change */
80
81
82 struct admhcd_ed {
83 /* Don't change first four, they used for DMA */
84 u32 control;
85 struct admhcd_td *tail;
86 struct admhcd_td *head;
87 struct admhcd_ed *next;
88 /* the rest is for the driver only: */
89 struct admhcd_td *cur;
90 struct usb_host_endpoint *ep;
91 struct urb *urb;
92 struct admhcd_ed *real;
93 } __attribute__ ((packed));
94
95 #define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */
96 #define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */
97 #define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */
98 #define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */
99 #define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */
100 #define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */
101
102 struct admhcd_td {
103 /* Don't change first four, they are used for DMA */
104 u32 control;
105 u32 buffer;
106 u32 buflen;
107 struct admhcd_td *next;
108 /* the rest is for the driver only: */
109 struct urb *urb;
110 struct admhcd_td *real;
111 } __attribute__ ((packed));
112
113 #define ADMHCD_TD_OWN 0x80000000
114 #define ADMHCD_TD_TOGGLE 0x00000000
115 #define ADMHCD_TD_DATA0 0x01000000
116 #define ADMHCD_TD_DATA1 0x01800000
117 #define ADMHCD_TD_OUT 0x00200000
118 #define ADMHCD_TD_IN 0x00400000
119 #define ADMHCD_TD_SETUP 0x00000000
120 #define ADMHCD_TD_ISO 0x00010000
121 #define ADMHCD_TD_R 0x00040000
122 #define ADMHCD_TD_INTEN 0x00010000
123
124 static int admhcd_td_err[16] = {
125 0, /* No */
126 -EREMOTEIO, /* CRC */
127 -EREMOTEIO, /* bit stuff */
128 -EREMOTEIO, /* data toggle */
129 -EPIPE, /* stall */
130 -ETIMEDOUT, /* timeout */
131 -EPROTO, /* pid err */
132 -EPROTO, /* unexpected pid */
133 -EREMOTEIO, /* data overrun */
134 -EREMOTEIO, /* data underrun */
135 -ETIMEDOUT, /* 1010 */
136 -ETIMEDOUT, /* 1011 */
137 -EREMOTEIO, /* buffer overrun */
138 -EREMOTEIO, /* buffer underrun */
139 -ETIMEDOUT, /* 1110 */
140 -ETIMEDOUT, /* 1111 */
141 };
142
143 #define ADMHCD_TD_ERRMASK 0x38000000
144 #define ADMHCD_TD_ERRSHIFT 27
145
146 #define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~0xf))
147 #define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~0xf))
148
149 struct admhcd {
150 spinlock_t lock;
151
152 void __iomem *addr_reg;
153 void __iomem *data_reg;
154 /* Root hub registers */
155 u32 rhdesca;
156 u32 rhdescb;
157 u32 rhstatus;
158 u32 rhport[2];
159
160 /* async schedule: control, bulk */
161 struct list_head async;
162 u32 base;
163 u32 dma_en;
164 unsigned long flags;
165
166 };
167
168 static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
169 {
170 return (struct admhcd *)(hcd->hcd_priv);
171 }
172
173 static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
174 {
175 return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
176 }
177
178 static char hcd_name[] = "adm5120-hcd";
179
180 static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
181 {
182 return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
183 }
184
185 static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
186 {
187 *(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
188 }
189
190 static void admhcd_lock(struct admhcd *ahcd)
191 {
192 spin_lock_irqsave(&ahcd->lock, ahcd->flags);
193 ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
194 ADMHCD_DMA_EN;
195 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
196 }
197
198 static void admhcd_unlock(struct admhcd *ahcd)
199 {
200 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
201 ADMHCD_STATE_OP | ahcd->dma_en);
202 spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
203 }
204
205 static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
206 {
207 struct admhcd_td *tdn, *td;
208
209 tdn = kmalloc(sizeof(struct admhcd_td), GFP_ATOMIC);
210 if (!tdn)
211 return NULL;
212 tdn->real = tdn;
213 tdn = (struct admhcd_td *)KSEG1ADDR(tdn);
214 memset(tdn, 0, sizeof(struct admhcd_td));
215 if (ed->cur == NULL) {
216 ed->cur = tdn;
217 ed->head = tdn;
218 ed->tail = tdn;
219 td = tdn;
220 } else {
221 /* Supply back the old tail and link in new td as tail */
222 td = TD(ed->tail);
223 TD(ed->tail)->next = tdn;
224 ed->tail = tdn;
225 }
226 td->urb = urb;
227
228 return td;
229 }
230
231 static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
232 {
233 struct admhcd_td *td, **tdp;
234
235 if (urb == NULL)
236 ed->control |= ADMHCD_ED_SKIP;
237 tdp = &ed->cur;
238 td = ed->cur;
239 do {
240 if (td->urb == urb)
241 break;
242 tdp = &td->next;
243 td = TD(td->next);
244 } while (td);
245 while (td && td->urb == urb) {
246 *tdp = TD(td->next);
247 kfree(td->real);
248 td = *tdp;
249 }
250 }
251
252 /* Find an endpoint's descriptor, if needed allocate a new one and link it
253 in the DMA chain
254 */
255 static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
256 struct usb_host_endpoint *ep, struct urb *urb)
257 {
258 struct admhcd_ed *hosthead;
259 struct admhcd_ed *found = NULL, *ed = NULL;
260 unsigned int pipe = urb->pipe;
261
262 admhcd_lock(ahcd);
263 hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
264 if (hosthead) {
265 for (ed = hosthead;; ed = ED(ed->next)) {
266 if (ed->ep == ep) {
267 found = ed;
268 break;
269 }
270 if (ED(ed->next) == hosthead)
271 break;
272 }
273 }
274 if (!found) {
275 found = kmalloc(sizeof(struct admhcd_ed), GFP_ATOMIC);
276 if (!found)
277 goto out;
278 memset(found, 0, sizeof(struct admhcd_ed));
279 found->real = found;
280 found->ep = ep;
281 found = (struct admhcd_ed *)KSEG1ADDR(found);
282 found->control = usb_pipedevice(pipe) |
283 (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
284 (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
285 (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
286 (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
287 (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
288 /* Alloc first dummy td */
289 admhcd_td_alloc(found, NULL);
290 if (hosthead) {
291 found->next = hosthead;
292 ed->next = found;
293 } else {
294 found->next = found;
295 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
296 }
297 }
298 out:
299 admhcd_unlock(ahcd);
300 return found;
301 }
302
303 static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
304 dma_addr_t data, int len)
305 {
306 td->buffer = data;
307 td->buflen = len;
308 td->control = control;
309 return TD(td->next);
310 }
311
312 static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
313 {
314 struct admhcd_td *td = ed->cur;
315
316 if (ed->urb)
317 return;
318 if (td->urb) {
319 ed->urb = td->urb;
320 while (1) {
321 td->control |= ADMHCD_TD_OWN;
322 if (TD(td->next)->urb != td->urb) {
323 td->buflen |= ADMHCD_TD_INTEN;
324 break;
325 }
326 td = TD(td->next);
327 }
328 }
329 ed->head = TD(ed->head);
330 ahcd->dma_en |= ADMHCD_DMA_EN;
331 }
332
333 static irqreturn_t adm5120hcd_irq(struct usb_hcd *hcd)
334 {
335 struct admhcd *ahcd = hcd_to_admhcd(hcd);
336 u32 intstatus;
337
338 intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
339 if (intstatus & ADMHCD_INT_FATAL) {
340 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
341 //
342 }
343 if (intstatus & ADMHCD_INT_SW) {
344 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
345 //
346 }
347 if (intstatus & ADMHCD_INT_TD) {
348 struct admhcd_ed *ed, *head;
349
350 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
351
352 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
353 ed = head;
354 if (ed) do {
355 /* Is it a finished TD? */
356 if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
357 struct admhcd_td *td;
358 int error;
359
360 td = ed->cur;
361 error = (td->control & ADMHCD_TD_ERRMASK) >>
362 ADMHCD_TD_ERRSHIFT;
363 ed->urb->status = admhcd_td_err[error];
364 admhcd_td_free(ed, ed->urb);
365 // Calculate real length!!!
366 ed->urb->actual_length = ed->urb->transfer_buffer_length;
367 ed->urb->hcpriv = NULL;
368 usb_hcd_giveback_urb(hcd, ed->urb);
369 ed->urb = NULL;
370 }
371 admhcd_ed_start(ahcd, ed);
372 ed = ED(ed->next);
373 } while (ed != head);
374 }
375
376 return IRQ_HANDLED;
377 }
378
379 static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
380 struct urb *urb, gfp_t mem_flags)
381 {
382 struct admhcd *ahcd = hcd_to_admhcd(hcd);
383 struct admhcd_ed *ed;
384 struct admhcd_td *td;
385 int size = 0, i, zero = 0, ret = 0;
386 unsigned int pipe = urb->pipe, toggle = 0;
387 dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
388 int data_len = urb->transfer_buffer_length;
389
390 ed = admhcd_get_ed(ahcd, ep, urb);
391 if (!ed)
392 return -ENOMEM;
393
394 switch(usb_pipetype(pipe)) {
395 case PIPE_CONTROL:
396 size = 2;
397 case PIPE_INTERRUPT:
398 case PIPE_BULK:
399 default:
400 size += urb->transfer_buffer_length / 4096;
401 if (urb->transfer_buffer_length % 4096)
402 size++;
403 if (size == 0)
404 size++;
405 else if (urb->transfer_flags & URB_ZERO_PACKET &&
406 !(urb->transfer_buffer_length %
407 usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
408 size++;
409 zero = 1;
410 }
411 break;
412 case PIPE_ISOCHRONOUS:
413 size = urb->number_of_packets;
414 break;
415 }
416
417 admhcd_lock(ahcd);
418 /* Remember the first td */
419 td = admhcd_td_alloc(ed, urb);
420 if (!td) {
421 ret = -ENOMEM;
422 goto out;
423 }
424 /* Allocate additionall tds first */
425 for (i = 1; i < size; i++) {
426 if (admhcd_td_alloc(ed, urb) == NULL) {
427 admhcd_td_free(ed, urb);
428 ret = -ENOMEM;
429 goto out;
430 }
431 }
432
433 if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
434 toggle = ADMHCD_TD_TOGGLE;
435 else {
436 toggle = ADMHCD_TD_DATA0;
437 usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
438 usb_pipeout(pipe), 1);
439 }
440
441 switch(usb_pipetype(pipe)) {
442 case PIPE_CONTROL:
443 td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
444 td, (dma_addr_t)urb->setup_packet, 8);
445 while (data_len > 0) {
446 td = admhcd_td_fill(ADMHCD_TD_DATA1
447 | ADMHCD_TD_R |
448 (usb_pipeout(pipe) ?
449 ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
450 data, data_len % 4097);
451 data_len -= 4096;
452 }
453 admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
454 ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
455 data, 0);
456 break;
457 case PIPE_INTERRUPT:
458 case PIPE_BULK:
459 //info ok for interrupt?
460 i = 0;
461 while(data_len > 4096) {
462 td = admhcd_td_fill((usb_pipeout(pipe) ?
463 ADMHCD_TD_OUT :
464 ADMHCD_TD_IN | ADMHCD_TD_R) |
465 (i ? ADMHCD_TD_TOGGLE : toggle), td,
466 data, 4096);
467 data += 4096;
468 data_len -= 4096;
469 i++;
470 }
471 td = admhcd_td_fill((usb_pipeout(pipe) ?
472 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
473 (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
474 i++;
475 if (zero)
476 admhcd_td_fill((usb_pipeout(pipe) ?
477 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
478 (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
479 break;
480 case PIPE_ISOCHRONOUS:
481 for (i = 0; i < urb->number_of_packets; i++) {
482 td = admhcd_td_fill(ADMHCD_TD_ISO |
483 ((urb->start_frame + i) & 0xffff), td,
484 data + urb->iso_frame_desc[i].offset,
485 urb->iso_frame_desc[i].length);
486 }
487 break;
488 }
489 urb->hcpriv = ed;
490 admhcd_ed_start(ahcd, ed);
491 out:
492 admhcd_unlock(ahcd);
493 return ret;
494 }
495
496 static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
497 {
498 struct admhcd *ahcd = hcd_to_admhcd(hcd);
499 struct admhcd_ed *ed;
500
501 admhcd_lock(ahcd);
502
503 ed = urb->hcpriv;
504 if (ed && ed->urb != urb)
505 admhcd_td_free(ed, urb);
506
507 admhcd_unlock(ahcd);
508 return 0;
509 }
510
511 static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
512 {
513 struct admhcd *ahcd = hcd_to_admhcd(hcd);
514 struct admhcd_ed *ed, *edt, *head;
515
516 admhcd_lock(ahcd);
517
518 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
519 if (!head)
520 goto out;
521 for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
522 if (ed->ep == ep)
523 break;
524 if (ed->ep != ep)
525 goto out;
526 while (ed->cur)
527 admhcd_td_free(ed, ed->cur->urb);
528 if (head == ed) {
529 if (ED(ed->next) == ed) {
530 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
531 ahcd->dma_en = 0;
532 goto out_free;
533 }
534 head = ED(ed->next);
535 for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
536 edt->next = ED(ed->next);
537 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
538 goto out_free;
539 }
540 for (edt = head; edt->next != ed; edt = edt->next);
541 edt->next = ed->next;
542 out_free:
543 kfree(ed->real);
544 out:
545 admhcd_unlock(ahcd);
546 }
547
548 static int admhcd_get_frame_number(struct usb_hcd *hcd)
549 {
550 struct admhcd *ahcd = hcd_to_admhcd(hcd);
551
552 return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
553 }
554
555 static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
556 {
557 struct admhcd *ahcd = hcd_to_admhcd(hcd);
558 int port;
559
560 *buf = 0;
561 for (port = 0; port < ADMHCD_NUMPORTS; port++) {
562 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
563 (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
564 ADMHCD_PRSC))
565 *buf |= (1 << (port + 1));
566 }
567 return !!*buf;
568 }
569
570 static __u8 root_hub_hub_des[] = {
571 0x09, /* __u8 bLength; */
572 0x29, /* __u8 bDescriptorType; Hub-descriptor */
573 0x02, /* __u8 bNbrPorts; */
574 0x0a, 0x00, /* __u16 wHubCharacteristics; */
575 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
576 0x00, /* __u8 bHubContrCurrent; 0mA */
577 0x00, /* __u8 DeviceRemovable; */
578 0xff, /* __u8 PortPwrCtrlMask; */
579 };
580
581 static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
582 u16 wIndex, char *buf, u16 wLength)
583 {
584 struct admhcd *ahcd = hcd_to_admhcd(hcd);
585 int retval = 0, len;
586 unsigned int port = wIndex -1;
587
588 switch (typeReq) {
589
590 case GetHubStatus:
591 *(__le32 *)buf = cpu_to_le32(0);
592 break;
593 case GetPortStatus:
594 if (port >= ADMHCD_NUMPORTS)
595 goto err;
596 *(__le32 *)buf = cpu_to_le32(
597 admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
598 break;
599 case SetHubFeature: /* We don't implement these */
600 case ClearHubFeature:
601 switch (wValue) {
602 case C_HUB_OVER_CURRENT:
603 case C_HUB_LOCAL_POWER:
604 break;
605 default:
606 goto err;
607 }
608 case SetPortFeature:
609 if (port >= ADMHCD_NUMPORTS)
610 goto err;
611
612 switch (wValue) {
613 case USB_PORT_FEAT_SUSPEND:
614 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
615 ADMHCD_PSS);
616 break;
617 case USB_PORT_FEAT_RESET:
618 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
619 & ADMHCD_CCS) {
620 admhcd_reg_set(ahcd,
621 ADMHCD_REG_PORTSTATUS0 + port*4,
622 ADMHCD_PRS | ADMHCD_CSC);
623 mdelay(50);
624 admhcd_reg_set(ahcd,
625 ADMHCD_REG_PORTSTATUS0 + port*4,
626 ADMHCD_PES | ADMHCD_CSC);
627 }
628 break;
629 case USB_PORT_FEAT_POWER:
630 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
631 ADMHCD_PPS);
632 break;
633 default:
634 goto err;
635 }
636 break;
637 case ClearPortFeature:
638 if (port >= ADMHCD_NUMPORTS)
639 goto err;
640
641 switch (wValue) {
642 case USB_PORT_FEAT_ENABLE:
643 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
644 ADMHCD_CCS);
645 break;
646 case USB_PORT_FEAT_C_ENABLE:
647 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
648 ADMHCD_PESC);
649 break;
650 case USB_PORT_FEAT_SUSPEND:
651 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
652 ADMHCD_POCI);
653 break;
654 case USB_PORT_FEAT_C_SUSPEND:
655 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
656 ADMHCD_PSSC);
657 case USB_PORT_FEAT_POWER:
658 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
659 ADMHCD_LSDA);
660 break;
661 case USB_PORT_FEAT_C_CONNECTION:
662 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
663 ADMHCD_CSC);
664 break;
665 case USB_PORT_FEAT_C_OVER_CURRENT:
666 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
667 ADMHCD_OCIC);
668 break;
669 case USB_PORT_FEAT_C_RESET:
670 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
671 ADMHCD_PRSC);
672 break;
673 default:
674 goto err;
675 }
676 break;
677 case GetHubDescriptor:
678 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
679 memcpy(buf, root_hub_hub_des, len);
680 break;
681 default:
682 err:
683 retval = -EPIPE;
684 }
685
686 return retval;
687 }
688
689 static struct hc_driver adm5120_hc_driver = {
690 .description = hcd_name,
691 .product_desc = "ADM5120 HCD",
692 .hcd_priv_size = sizeof(struct admhcd),
693 .irq = adm5120hcd_irq,
694 .flags = HCD_USB11,
695 .urb_enqueue = admhcd_urb_enqueue,
696 .urb_dequeue = admhcd_urb_dequeue,
697 .endpoint_disable = admhcd_endpoint_disable,
698 .get_frame_number = admhcd_get_frame_number,
699 .hub_status_data = admhcd_hub_status_data,
700 .hub_control = admhcd_hub_control,
701 };
702
703 #define resource_len(r) (((r)->end - (r)->start) + 1)
704
705 static int __init adm5120hcd_probe(struct platform_device *pdev)
706 {
707 struct usb_hcd *hcd;
708 struct admhcd *ahcd;
709 struct resource *addr, *data;
710 void __iomem *addr_reg;
711 void __iomem *data_reg;
712
713 int err = 0, irq;
714
715 if (pdev->num_resources < 3) {
716 err = -ENODEV;
717 goto out;
718 }
719
720 if (pdev->dev.dma_mask) {
721 printk(KERN_DEBUG "no we won't dma\n");
722 return -EINVAL;
723 }
724
725 irq = platform_get_irq(pdev, 0);
726 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
727 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
728
729 if (!addr || !data || irq < 0) {
730 err = -ENODEV;
731 goto out;
732 }
733
734 if (!request_mem_region(addr->start, 2, hcd_name)) {
735 err = -EBUSY;
736 goto out;
737 }
738
739 addr_reg = ioremap(addr->start, resource_len(addr));
740 if (addr_reg == NULL) {
741 err = -ENOMEM;
742 goto out_mem;
743 }
744 if (!request_mem_region(data->start, 2, hcd_name)) {
745 err = -EBUSY;
746 goto out_unmap;
747 }
748
749 data_reg = ioremap(data->start, resource_len(data));
750 if (data_reg == NULL) {
751 err = -ENOMEM;
752 goto out_mem;
753 }
754
755 hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
756 if (!hcd)
757 goto out_mem;
758
759 hcd->rsrc_start = addr->start;
760 ahcd = hcd_to_admhcd(hcd);
761
762 spin_lock_init(&ahcd->lock);
763 INIT_LIST_HEAD(&ahcd->async);
764
765 ahcd->data_reg = data_reg;
766 ahcd->addr_reg = addr_reg;
767
768 hcd->product_desc = "ADM5120 HCD";
769
770 /* Initialise the HCD registers */
771 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
772 mdelay(10);
773
774 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
775
776 while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET)
777 mdelay(1);
778
779 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
780 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
781 admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
782 admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
783 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE,
784 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
785 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS,
786 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
787 admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
788 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
789
790 err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
791 if (err)
792 goto out_dev;
793
794 return 0;
795
796 out_dev:
797 usb_put_hcd(hcd);
798 out_unmap:
799 iounmap(addr_reg);
800 out_mem:
801 release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start);
802 out:
803 return err;
804 }
805
806 static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
807 {
808 struct usb_hcd *hcd = platform_get_drvdata(pdev);
809 struct admhcd *ahcd;
810
811 if (!hcd)
812 return 0;
813 ahcd = hcd_to_admhcd(hcd);
814 usb_remove_hcd(hcd);
815
816 usb_put_hcd(hcd);
817 return 0;
818 }
819
820 static struct platform_driver adm5120hcd_driver = {
821 .probe = adm5120hcd_probe,
822 .remove = adm5120hcd_remove,
823 .driver = {
824 .name = "adm5120-hcd",
825 .owner = THIS_MODULE,
826 },
827 };
828
829 static int __init adm5120hcd_init(void)
830 {
831 if (usb_disabled())
832 return -ENODEV;
833 if (!adm5120_board.has_usb) {
834 printk(KERN_DEBUG PFX "this board does not have USB\n");
835 return -ENODEV;
836 }
837
838 printk(KERN_INFO PFX "registered\n");
839 return platform_driver_register(&adm5120hcd_driver);
840 }
841
842 static void __exit adm5120hcd_exit(void)
843 {
844 platform_driver_unregister(&adm5120hcd_driver);
845 }
846
847 module_init(adm5120hcd_init);
848 module_exit(adm5120hcd_exit);
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