atheros: add kernel workaround for bringing up eth1 on devices with a micrel switch...
[openwrt.git] / target / linux / ifxmips / patches-2.6.28 / 000-mips-bad-intctl.patch
1 --- a/arch/mips/kernel/traps.c
2 +++ b/arch/mips/kernel/traps.c
3 @@ -1514,7 +1514,16 @@ void __cpuinit per_cpu_trap_init(void)
4 */
5 if (cpu_has_mips_r2) {
6 cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
7 + if (!cp0_compare_irq)
8 + cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
9 +
10 cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
11 + if (!cp0_perfcount_irq)
12 + cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
13 +
14 + if (arch_fixup_c0_irqs)
15 + arch_fixup_c0_irqs();
16 +
17 if (cp0_perfcount_irq == cp0_compare_irq)
18 cp0_perfcount_irq = -1;
19 } else {
20 --- a/arch/mips/include/asm/irq.h
21 +++ b/arch/mips/include/asm/irq.h
22 @@ -156,8 +156,12 @@ extern void free_irqno(unsigned int irq)
23 * IE7. Since R2 their number has to be read from the c0_intctl register.
24 */
25 #define CP0_LEGACY_COMPARE_IRQ 7
26 +#define CP0_LEGACY_PERFCNT_IRQ 7
27
28 extern int cp0_compare_irq;
29 extern int cp0_perfcount_irq;
30
31 +extern void __weak arch_fixup_c0_irqs(void);
32 +
33 +
34 #endif /* _ASM_IRQ_H */
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