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forgot to bump up the release version from the patches the other day
[openwrt.git] / package / rt2x00 / src / rt2500usb.c
1 /*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27 /*
28 * Set enviroment defines for rt2x00.h
29 */
30 #define DRV_NAME "rt2500usb"
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/version.h>
35 #include <linux/init.h>
36 #include <linux/usb.h>
37 #include <linux/delay.h>
38 #include <linux/etherdevice.h>
39
40 #include "rt2x00.h"
41 #include "rt2x00lib.h"
42 #include "rt2x00usb.h"
43 #include "rt2500usb.h"
44
45 /*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
57 */
58 static inline void rt2500usb_register_read(
59 const struct rt2x00_dev *rt2x00dev,
60 const u16 offset, u16 *value)
61 {
62 __le16 reg;
63 rt2x00usb_vendor_request(
64 rt2x00dev, USB_MULTI_READ, USB_VENDOR_REQUEST_IN,
65 offset, 0x00, &reg, sizeof(u16), REGISTER_TIMEOUT);
66 *value = le16_to_cpu(reg);
67 }
68
69 static inline void rt2500usb_register_multiread(
70 const struct rt2x00_dev *rt2x00dev,
71 const u16 offset, void *value, const u16 length)
72 {
73 rt2x00usb_vendor_request(
74 rt2x00dev, USB_MULTI_READ, USB_VENDOR_REQUEST_IN,
75 offset, 0x00, value, length,
76 REGISTER_TIMEOUT * (length / sizeof(u16)));
77 }
78
79 static inline void rt2500usb_register_write(
80 const struct rt2x00_dev *rt2x00dev,
81 const u16 offset, u16 value)
82 {
83 __le16 reg = cpu_to_le16(value);
84 rt2x00usb_vendor_request(
85 rt2x00dev, USB_MULTI_WRITE, USB_VENDOR_REQUEST_OUT,
86 offset, 0x00, &reg, sizeof(u16), REGISTER_TIMEOUT);
87 }
88
89 static inline void rt2500usb_register_multiwrite(
90 const struct rt2x00_dev *rt2x00dev,
91 const u16 offset, void *value, const u16 length)
92 {
93 rt2x00usb_vendor_request(
94 rt2x00dev, USB_MULTI_WRITE, USB_VENDOR_REQUEST_OUT,
95 offset, 0x00, value, length,
96 REGISTER_TIMEOUT * (length / sizeof(u16)));
97 }
98
99 static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
100 {
101 u16 reg;
102 unsigned int i;
103
104 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
105 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
106 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
107 break;
108 udelay(REGISTER_BUSY_DELAY);
109 }
110
111 return reg;
112 }
113
114 static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
115 const u8 reg_id, const u8 value)
116 {
117 u16 reg;
118
119 /*
120 * Wait until the BBP becomes ready.
121 */
122 reg = rt2500usb_bbp_check(rt2x00dev);
123 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
124 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
125 return;
126 }
127
128 /*
129 * Write the data into the BBP.
130 */
131 reg = 0;
132 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
133 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, reg_id);
134 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
135
136 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
137 }
138
139 static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
140 const u8 reg_id, u8 *value)
141 {
142 u16 reg;
143
144 /*
145 * Wait until the BBP becomes ready.
146 */
147 reg = rt2500usb_bbp_check(rt2x00dev);
148 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
149 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
150 return;
151 }
152
153 /*
154 * Write the request into the BBP.
155 */
156 reg =0;
157 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, reg_id);
158 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
159
160 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
161
162 /*
163 * Wait until the BBP becomes ready.
164 */
165 reg = rt2500usb_bbp_check(rt2x00dev);
166 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
167 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
168 *value = 0xff;
169 return;
170 }
171
172 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
173 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
174 }
175
176 static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
177 const u32 value)
178 {
179 u16 reg;
180 unsigned int i;
181
182 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
183 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
184 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
185 goto rf_write;
186 udelay(REGISTER_BUSY_DELAY);
187 }
188
189 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
190 return;
191
192 rf_write:
193 reg = 0;
194 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
195 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
196
197 reg = 0;
198 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
199 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
200 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
201 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
202
203 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
204 }
205
206 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
207 #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
208
209 static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
210 const unsigned long word, void *data)
211 {
212 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
213 }
214
215 static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
216 const unsigned long word, void *data)
217 {
218 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), *((u16*)data));
219 }
220
221 static void rt2500usb_read_eeprom(struct rt2x00_dev *rt2x00dev,
222 const unsigned long word, void *data)
223 {
224 rt2x00_eeprom_read(rt2x00dev, word, data);
225 }
226
227 static void rt2500usb_write_eeprom(struct rt2x00_dev *rt2x00dev,
228 const unsigned long word, void *data)
229 {
230 rt2x00_eeprom_write(rt2x00dev, word, *((u16*)data));
231 }
232
233 static void rt2500usb_read_bbp(struct rt2x00_dev *rt2x00dev,
234 const unsigned long word, void *data)
235 {
236 rt2500usb_bbp_read(rt2x00dev, word, data);
237 }
238
239 static void rt2500usb_write_bbp(struct rt2x00_dev *rt2x00dev,
240 const unsigned long word, void *data)
241 {
242 rt2500usb_bbp_write(rt2x00dev, word, *((u8*)data));
243 }
244
245 static const struct rt2x00debug rt2500usb_rt2x00debug = {
246 .owner = THIS_MODULE,
247 .reg_csr = {
248 .read = rt2500usb_read_csr,
249 .write = rt2500usb_write_csr,
250 .word_size = sizeof(u16),
251 .word_count = CSR_REG_SIZE / sizeof(u16),
252 },
253 .reg_eeprom = {
254 .read = rt2500usb_read_eeprom,
255 .write = rt2500usb_write_eeprom,
256 .word_size = sizeof(u16),
257 .word_count = EEPROM_SIZE / sizeof(u16),
258 },
259 .reg_bbp = {
260 .read = rt2500usb_read_bbp,
261 .write = rt2500usb_write_bbp,
262 .word_size = sizeof(u8),
263 .word_count = BBP_SIZE / sizeof(u8),
264 },
265 };
266 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
267
268 /*
269 * Configuration handlers.
270 */
271 static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev, u8 *bssid)
272 {
273 u16 reg[3];
274
275 memset(&reg, 0, sizeof(reg));
276 memcpy(&reg, bssid, ETH_ALEN);
277
278 /*
279 * The BSSID is passed to us as an array of bytes,
280 * that array is little endian, so no need for byte ordering.
281 */
282 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, &reg, sizeof(reg));
283 }
284
285 static void rt2500usb_config_promisc(struct rt2x00_dev *rt2x00dev,
286 const int promisc)
287 {
288 u16 reg;
289
290 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
291 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME, !promisc);
292 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
293 }
294
295 static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev,
296 const int type)
297 {
298 u16 reg;
299
300 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
301
302 /*
303 * Apply hardware packet filter.
304 */
305 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
306
307 if (!is_monitor_present(&rt2x00dev->interface) &&
308 (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_STA))
309 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS, 1);
310 else
311 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS, 0);
312
313 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC, 1);
314 if (is_monitor_present(&rt2x00dev->interface)) {
315 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL, 0);
316 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL, 0);
317 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 0);
318 } else {
319 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL, 1);
320 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL, 1);
321 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
322 }
323
324 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
325
326 /*
327 * Enable beacon config
328 */
329 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
330 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
331 (PREAMBLE + get_duration(IEEE80211_HEADER, 2)) >> 6);
332 if (type == IEEE80211_IF_TYPE_STA)
333 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
334 else
335 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
336 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
337
338 /*
339 * Enable synchronisation.
340 */
341 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
342 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
343 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
344
345 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
346 if (is_interface_present(&rt2x00dev->interface)) {
347 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
348 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
349 }
350
351 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
352 if (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_AP)
353 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 2);
354 else if (type == IEEE80211_IF_TYPE_STA)
355 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 1);
356 else if (is_monitor_present(&rt2x00dev->interface) &&
357 !is_interface_present(&rt2x00dev->interface))
358 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
359
360 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
361 }
362
363 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
364 const int value, const int channel, const int txpower)
365 {
366 u32 rf1 = rt2x00dev->rf1;
367 u32 rf2 = value;
368 u32 rf3 = rt2x00dev->rf3;
369 u32 rf4 = rt2x00dev->rf4;
370
371 if (rt2x00_rf(&rt2x00dev->chip, RF2525))
372 rf2 |= 0x00080000;
373
374 if ((rt2x00_rf(&rt2x00dev->chip, RF2523) ||
375 rt2x00_rf(&rt2x00dev->chip, RF2524) ||
376 rt2x00_rf(&rt2x00dev->chip, RF2525)) &&
377 channel == 14)
378 rf4 &= ~0x00000018;
379
380 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
381 if (channel & 0x01)
382 rf4 = 0x00000e1b;
383 else
384 rf4 = 0x00000e07;
385 if (channel == 14)
386 rf4 = 0x00000e23;
387 }
388
389 if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
390 if (channel < 14) {
391 rf1 = 0x00022020;
392 rf4 = 0x00000a0b;
393 } else if (channel == 14) {
394 rf1 = 0x00022010;
395 rf4 = 0x00000a1b;
396 } else if (channel < 64) {
397 rf1 = 0x00022010;
398 rf4 = 0x00000a1f;
399 } else if (channel < 140) {
400 rf1 = 0x00022010;
401 rf4 = 0x00000a0f;
402 } else if (channel < 161) {
403 rf1 = 0x00022020;
404 rf4 = 0x00000a07;
405 }
406 }
407
408 /*
409 * Set TXpower.
410 */
411 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
412
413 /*
414 * For RT2525E we should first set the channel to half band higher.
415 */
416 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
417 static const u32 vals[] = {
418 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
419 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
420 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
421 0x00000902, 0x00000906
422 };
423
424 rt2500usb_rf_write(rt2x00dev, vals[channel - 1]);
425 if (rf4)
426 rt2500usb_rf_write(rt2x00dev, rf4);
427 }
428
429 rt2500usb_rf_write(rt2x00dev, rf1);
430 rt2500usb_rf_write(rt2x00dev, rf2);
431 rt2500usb_rf_write(rt2x00dev, rf3);
432 if (rf4)
433 rt2500usb_rf_write(rt2x00dev, rf4);
434
435 /*
436 * Update rf fields
437 */
438 rt2x00dev->rf1 = rf1;
439 rt2x00dev->rf2 = rf2;
440 rt2x00dev->rf3 = rf3;
441 rt2x00dev->rf4 = rf4;
442 rt2x00dev->tx_power = txpower;
443 }
444
445 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
446 const int txpower)
447 {
448 rt2x00_set_field32(&rt2x00dev->rf3, RF3_TXPOWER,
449 TXPOWER_TO_DEV(txpower));
450 rt2500usb_rf_write(rt2x00dev, rt2x00dev->rf3);
451 }
452
453 static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
454 const int antenna_tx, const int antenna_rx)
455 {
456 u8 r2;
457 u8 r14;
458 u16 csr5;
459 u16 csr6;
460
461 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
462 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
463 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
464 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
465
466 /*
467 * Configure the TX antenna.
468 */
469 if (antenna_tx == ANTENNA_DIVERSITY) {
470 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
471 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
472 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
473 } else if (antenna_tx == ANTENNA_A) {
474 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
475 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
476 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
477 } else if (antenna_tx == ANTENNA_B) {
478 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
479 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
480 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
481 }
482
483 /*
484 * Configure the RX antenna.
485 */
486 if (antenna_rx == ANTENNA_DIVERSITY)
487 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
488 else if (antenna_rx == ANTENNA_A)
489 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
490 else if (antenna_rx == ANTENNA_B)
491 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
492
493 /*
494 * RT2525E and RT5222 need to flip TX I/Q
495 */
496 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
497 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
498 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
499 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
500 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
501
502 /*
503 * RT2525E does not need RX I/Q Flip.
504 */
505 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
506 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
507 } else {
508 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
509 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
510 }
511
512 rt2500usb_bbp_write(rt2x00dev, 2, r2);
513 rt2500usb_bbp_write(rt2x00dev, 14, r14);
514 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
515 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
516 }
517
518 static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
519 const int short_slot_time, const int beacon_int)
520 {
521 u16 reg;
522
523 rt2500usb_register_write(rt2x00dev, MAC_CSR10,
524 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
525
526 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
527 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, beacon_int * 4);
528 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
529 }
530
531 static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
532 {
533 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
534 u16 reg;
535 u16 value;
536 u16 preamble;
537
538 preamble = DEVICE_GET_RATE_FIELD(rate, PREAMBLE)
539 ? SHORT_PREAMBLE : PREAMBLE;
540
541 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATE;
542
543 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg);
544
545 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
546 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
547 SHORT_DIFS : DIFS) +
548 PLCP + preamble + get_duration(ACK_SIZE, 10);
549 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, value);
550 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
551
552 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
553 if (preamble == SHORT_PREAMBLE)
554 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 1);
555 else
556 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 0);
557 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
558 }
559
560 static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
561 const int phymode)
562 {
563 struct ieee80211_hw_mode *mode;
564 struct ieee80211_rate *rate;
565
566 if (phymode == MODE_IEEE80211A)
567 rt2x00dev->curr_hwmode = HWMODE_A;
568 else if (phymode == MODE_IEEE80211B)
569 rt2x00dev->curr_hwmode = HWMODE_B;
570 else
571 rt2x00dev->curr_hwmode = HWMODE_G;
572
573 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
574 rate = &mode->rates[mode->num_rates - 1];
575
576 rt2500usb_config_rate(rt2x00dev, rate->val2);
577
578 if (phymode == MODE_IEEE80211B) {
579 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
580 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
581 } else {
582 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
583 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
584 }
585 }
586
587 static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, u8 *addr)
588 {
589 u16 reg[3];
590
591 memset(&reg, 0, sizeof(reg));
592 memcpy(&reg, addr, ETH_ALEN);
593
594 /*
595 * The MAC address is passed to us as an array of bytes,
596 * that array is little endian, so no need for byte ordering.
597 */
598 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, &reg, sizeof(reg));
599 }
600
601 /*
602 * LED functions.
603 */
604 static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
605 {
606 u16 reg;
607
608 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
609 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
610 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
611 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
612
613 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
614
615 if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
616 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
617 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
618 } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
619 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
620 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
621 } else {
622 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
623 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
624 }
625
626 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
627 }
628
629 static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
630 {
631 u16 reg;
632
633 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
634 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
635 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
636 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
637 }
638
639 /*
640 * Link tuning
641 */
642 static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
643 {
644 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
645 u16 bbp_thresh;
646 u16 cca_alarm;
647 u16 vgc_bound;
648 u16 sens;
649 u16 r24;
650 u16 r25;
651 u16 r61;
652 u16 r17_sens;
653 u8 r17;
654 u8 up_bound;
655 u8 low_bound;
656
657 /*
658 * Determine the BBP tuning threshold and correctly
659 * set BBP 24, 25 and 61.
660 */
661 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
662 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
663
664 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
665 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
666 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
667
668 if ((rssi + bbp_thresh) > 0) {
669 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
670 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
671 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
672 } else {
673 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
674 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
675 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
676 }
677
678 rt2500usb_bbp_write(rt2x00dev, 24, r24);
679 rt2500usb_bbp_write(rt2x00dev, 25, r25);
680 rt2500usb_bbp_write(rt2x00dev, 61, r61);
681
682 /*
683 * Read current r17 value, as well as the sensitivity values
684 * for the r17 register.
685 */
686 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
687 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
688
689 /*
690 * A too low RSSI will cause too much false CCA which will
691 * then corrupt the R17 tuning. To remidy this the tuning should
692 * be stopped (While making sure the R17 value will not exceed limits)
693 */
694 if (rssi >= -40) {
695 if (r17 != 0x60)
696 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
697 return;
698 }
699
700 /*
701 * Special big-R17 for short distance
702 */
703 if (rssi >= -58) {
704 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
705 if (r17 != sens)
706 rt2500usb_bbp_write(rt2x00dev, 17, sens);
707 return;
708 }
709
710 /*
711 * Special mid-R17 for middle distance
712 */
713 if (rssi >= -74) {
714 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
715 if (r17 != sens)
716 rt2500usb_bbp_write(rt2x00dev, 17, sens);
717 return;
718 }
719
720 /*
721 * Leave short or middle distance condition, restore r17
722 * to the dynamic tuning range.
723 */
724 rt2500usb_register_read(rt2x00dev, STA_CSR3, &cca_alarm);
725 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
726 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
727
728 low_bound = 0x32;
729 if (rssi >= -77)
730 up_bound = vgc_bound;
731 else
732 up_bound = vgc_bound - (-77 - rssi);
733
734 if (up_bound < low_bound)
735 up_bound = low_bound;
736
737 if (r17 > up_bound) {
738 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
739 rt2x00dev->rx_status.noise = up_bound;
740 } else if (cca_alarm > 512 && r17 < up_bound) {
741 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
742 rt2x00dev->rx_status.noise = r17;
743 } else if (cca_alarm < 100 && r17 > low_bound) {
744 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
745 rt2x00dev->rx_status.noise = r17;
746 }
747 }
748
749 /*
750 * Initialization functions.
751 */
752 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
753 {
754 u16 reg;
755
756 rt2x00usb_vendor_request(rt2x00dev, USB_DEVICE_MODE,
757 USB_VENDOR_REQUEST_OUT, 0x0001, USB_MODE_TEST, NULL, 0,
758 REGISTER_TIMEOUT);
759 rt2x00usb_vendor_request(rt2x00dev, USB_SINGLE_WRITE,
760 USB_VENDOR_REQUEST_OUT, 0x0308, 0xf0, NULL, 0,
761 REGISTER_TIMEOUT);
762
763 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
764 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
765 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
766
767 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
768 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
769
770 rt2500usb_register_write(rt2x00dev, MAC_CSR1, 0x0003);
771 rt2500usb_register_write(rt2x00dev, MAC_CSR1, 0x0000);
772 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, 0x8c8d);
773 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, 0x8b8a);
774 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, 0x8687);
775 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, 0x0085);
776 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
777 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
778
779 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
780 return -EBUSY;
781
782 rt2500usb_register_write(rt2x00dev, MAC_CSR1, 0x0004);
783
784 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
785 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
786 reg &= ~0x0002;
787 } else {
788 reg = 0x3002;
789 }
790 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
791
792 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
793 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
794 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
795 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
796
797 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
798 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
799 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
800 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
801
802 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
803 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
804 rt2x00dev->rx->data_size);
805 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
806
807 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
808 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 0x5a);
809 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
810
811 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
812 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
813 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
814
815 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
816 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg | 0x0001);
817
818 return 0;
819 }
820
821 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
822 {
823 unsigned int i;
824 u16 eeprom;
825 u8 value;
826 u8 reg_id;
827
828 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
829 rt2500usb_bbp_read(rt2x00dev, 0, &value);
830 if ((value != 0xff) && (value != 0x00))
831 goto continue_csr_init;
832 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
833 udelay(REGISTER_BUSY_DELAY);
834 }
835
836 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
837 return -EACCES;
838
839 continue_csr_init:
840 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
841 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
842 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
843 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
844 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
845 rt2500usb_bbp_write(rt2x00dev, 17, 0x48);
846 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
847 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
848 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
849 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
850 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
851 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
852 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
853 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
854 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
855 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
856 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
857 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
858 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
859 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
860 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
861 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
862 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
863 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
864 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
865 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
866 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
867 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
868 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
869 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
870 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
871 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
872
873 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
874 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
875 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
876
877 if (eeprom != 0xffff && eeprom != 0x0000) {
878 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
879 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
880 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
881 reg_id, value);
882 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
883 }
884 }
885 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
886
887 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
888 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
889 rt2500usb_bbp_write(rt2x00dev, 24, value);
890
891 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
892 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
893 rt2500usb_bbp_write(rt2x00dev, 25, value);
894
895 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
896 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
897 rt2500usb_bbp_write(rt2x00dev, 61, value);
898
899 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
900 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
901 rt2500usb_bbp_write(rt2x00dev, 17, value);
902
903 return 0;
904 }
905
906 /*
907 * Device state switch handlers.
908 */
909 static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
910 enum dev_state state)
911 {
912 u16 reg;
913
914 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
915 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
916 state == STATE_RADIO_RX_OFF);
917 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
918 }
919
920 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
921 {
922 /*
923 * Initialize all registers.
924 */
925 if (rt2500usb_init_registers(rt2x00dev) ||
926 rt2500usb_init_bbp(rt2x00dev)) {
927 ERROR(rt2x00dev, "Register initialization failed.\n");
928 return -EIO;
929 }
930
931 rt2x00usb_enable_radio(rt2x00dev);
932
933 /*
934 * Enable LED
935 */
936 rt2500usb_enable_led(rt2x00dev);
937
938 return 0;
939 }
940
941 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
942 {
943 /*
944 * Disable LED
945 */
946 rt2500usb_disable_led(rt2x00dev);
947
948 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
949 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
950
951 /*
952 * Disable synchronisation.
953 */
954 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
955
956 rt2x00usb_disable_radio(rt2x00dev);
957 }
958
959 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
960 enum dev_state state)
961 {
962 u16 reg;
963 u16 reg2;
964 unsigned int i;
965 char put_to_sleep;
966 char bbp_state;
967 char rf_state;
968
969 put_to_sleep = (state != STATE_AWAKE);
970
971 reg = 0;
972 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
973 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
974 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
975 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
976 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
977 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
978
979 /*
980 * Device is not guaranteed to be in the requested state yet.
981 * We must wait until the register indicates that the
982 * device has entered the correct state.
983 */
984 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
985 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
986 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
987 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
988 if (bbp_state == state && rf_state == state)
989 return 0;
990 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
991 msleep(30);
992 }
993
994 NOTICE(rt2x00dev, "Device failed to enter state %d, "
995 "current device state: bbp %d and rf %d.\n",
996 state, bbp_state, rf_state);
997
998 return -EBUSY;
999 }
1000
1001 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1002 enum dev_state state)
1003 {
1004 int retval = 0;
1005
1006 switch (state) {
1007 case STATE_RADIO_ON:
1008 retval = rt2500usb_enable_radio(rt2x00dev);
1009 break;
1010 case STATE_RADIO_OFF:
1011 rt2500usb_disable_radio(rt2x00dev);
1012 break;
1013 case STATE_RADIO_RX_ON:
1014 case STATE_RADIO_RX_OFF:
1015 rt2500usb_toggle_rx(rt2x00dev, state);
1016 break;
1017 case STATE_DEEP_SLEEP:
1018 case STATE_SLEEP:
1019 case STATE_STANDBY:
1020 case STATE_AWAKE:
1021 retval = rt2500usb_set_state(rt2x00dev, state);
1022 break;
1023 default:
1024 retval = -ENOTSUPP;
1025 break;
1026 }
1027
1028 return retval;
1029 }
1030
1031 /*
1032 * TX descriptor initialization
1033 */
1034 static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1035 struct data_entry *entry, struct data_desc *txd,
1036 struct data_entry_desc *desc, struct ieee80211_hdr *ieee80211hdr,
1037 unsigned int length, struct ieee80211_tx_control *control)
1038 {
1039 u32 word;
1040
1041 /*
1042 * Start writing the descriptor words.
1043 */
1044 rt2x00_desc_read(txd, 1, &word);
1045 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1046 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->ring->tx_params.aifs);
1047 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->ring->tx_params.cw_min);
1048 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->ring->tx_params.cw_max);
1049 rt2x00_desc_write(txd, 1, word);
1050
1051 rt2x00_desc_read(txd, 2, &word);
1052 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1053 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1054 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1055 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1056 rt2x00_desc_write(txd, 2, word);
1057
1058 rt2x00_desc_read(txd, 0, &word);
1059 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1060 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1061 test_bit(ENTRY_TXD_MORE_FRAG, &entry->flags));
1062 rt2x00_set_field32(&word, TXD_W0_ACK,
1063 test_bit(ENTRY_TXD_REQ_ACK, &entry->flags));
1064 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1065 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &entry->flags));
1066 rt2x00_set_field32(&word, TXD_W0_OFDM,
1067 test_bit(ENTRY_TXD_OFDM_RATE, &entry->flags));
1068 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1069 control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT);
1070 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1071 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1072 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1073 rt2x00_desc_write(txd, 0, word);
1074 }
1075
1076 /*
1077 * TX data initialization
1078 */
1079 static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, int queue)
1080 {
1081 u16 reg;
1082
1083 if (queue != IEEE80211_TX_QUEUE_BEACON)
1084 return;
1085
1086 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1087 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1088 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1089 /*
1090 * Beacon generation will fail initially.
1091 * To prevent this we need to register the TXRX_CSR19
1092 * register several times.
1093 */
1094 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1095 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1096 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1097 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1098 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1099 }
1100 }
1101
1102 /*
1103 * RX control handlers
1104 */
1105 static int rt2500usb_fill_rxdone(struct data_entry *entry,
1106 int *signal, int *rssi, int *ofdm)
1107 {
1108 struct urb *urb = entry->priv;
1109 struct data_desc *rxd = (struct data_desc*)(entry->skb->data +
1110 (urb->actual_length - entry->ring->desc_size));
1111 u32 word0;
1112 u32 word1;
1113
1114 rt2x00_desc_read(rxd, 0, &word0);
1115 rt2x00_desc_read(rxd, 1, &word1);
1116
1117 /*
1118 * TODO: Don't we need to keep statistics
1119 * updated about these errors?
1120 */
1121 if (rt2x00_get_field32(word0, RXD_W0_CRC) ||
1122 rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1123 return -EINVAL;
1124
1125 /*
1126 * Obtain the status about this packet.
1127 */
1128 *signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1129 *rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
1130 entry->ring->rt2x00dev->rssi_offset;
1131 *ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1132
1133 /*
1134 * rt2570 includes the FCS, so fix data length accordingly.
1135 */
1136 return rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT) - FCS_LEN;
1137 }
1138
1139 /*
1140 * Device initialization functions.
1141 */
1142 static int rt2500usb_alloc_eeprom(struct rt2x00_dev *rt2x00dev)
1143 {
1144 u16 word;
1145 u8 *mac;
1146
1147 /*
1148 * Allocate the eeprom memory, check the eeprom width
1149 * and copy the entire eeprom into this allocated memory.
1150 */
1151 rt2x00dev->eeprom = kzalloc(EEPROM_SIZE, GFP_KERNEL);
1152 if (!rt2x00dev->eeprom)
1153 return -ENOMEM;
1154
1155 rt2x00usb_vendor_request(
1156 rt2x00dev, USB_EEPROM_READ, USB_VENDOR_REQUEST_IN,
1157 EEPROM_BASE, 0x00, rt2x00dev->eeprom, EEPROM_SIZE,
1158 REGISTER_TIMEOUT * (EEPROM_SIZE / sizeof(u16)));
1159
1160 /*
1161 * Start validation of the data that has been read.
1162 */
1163 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1164 if (!is_valid_ether_addr(mac)) {
1165 random_ether_addr(mac);
1166 EEPROM(rt2x00dev, "MAC: " MAC_FMT "\n", MAC_ARG(mac));
1167 }
1168
1169 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1170 if (word == 0xffff) {
1171 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1172 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0);
1173 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0);
1174 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0);
1175 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1176 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1177 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1178 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1179 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1180 }
1181
1182 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1183 if (word == 0xffff) {
1184 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1185 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1186 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1187 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1188 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1189 }
1190
1191 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1192 if (word == 0xffff) {
1193 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1194 DEFAULT_RSSI_OFFSET);
1195 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1196 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1197 }
1198
1199 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1200 if (word == 0xffff) {
1201 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1202 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1203 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1204 }
1205
1206 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1207 if (word == 0xffff) {
1208 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1209 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1210 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1211 }
1212
1213 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1214 if (word == 0xffff) {
1215 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1216 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1217 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1218 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1219 }
1220
1221 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1222 if (word == 0xffff) {
1223 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1224 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1225 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1226 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1227 }
1228
1229 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1230 if (word == 0xffff) {
1231 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1232 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1233 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1234 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1235 }
1236
1237 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1238 if (word == 0xffff) {
1239 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1240 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1241 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1242 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1243 }
1244
1245 return 0;
1246 }
1247
1248 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1249 {
1250 u16 reg;
1251 u16 value;
1252 u16 eeprom;
1253
1254 /*
1255 * Read EEPROM word for configuration.
1256 */
1257 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1258
1259 /*
1260 * Identify RF chipset.
1261 */
1262 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1263 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1264 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1265
1266 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1267 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1268 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1269 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1270 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1271 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1272 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1273 return -ENODEV;
1274 }
1275
1276 /*
1277 * Identify default antenna configuration.
1278 */
1279 rt2x00dev->hw->conf.antenna_sel_tx = rt2x00_get_field16(eeprom,
1280 EEPROM_ANTENNA_TX_DEFAULT);
1281 rt2x00dev->hw->conf.antenna_sel_rx = rt2x00_get_field16(eeprom,
1282 EEPROM_ANTENNA_RX_DEFAULT);
1283
1284 /*
1285 * Store led mode, for correct led behaviour.
1286 */
1287 rt2x00dev->led_mode = rt2x00_get_field16(eeprom,
1288 EEPROM_ANTENNA_LED_MODE);
1289
1290 /*
1291 * Check if the BBP tuning should be disabled.
1292 */
1293 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1294 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1295 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1296
1297 /*
1298 * Read the RSSI <-> dBm offset information.
1299 */
1300 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1301 rt2x00dev->rssi_offset =
1302 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1303
1304 return 0;
1305 }
1306
1307 static const struct {
1308 unsigned int chip;
1309 u32 val[3];
1310 } rf_vals[] = {
1311 { RF2522, { 0x00002050, 0x00000101, 0x00000000 } },
1312 { RF2523, { 0x00022010, 0x000e0111, 0x00000a1b } },
1313 { RF2524, { 0x00032020, 0x00000101, 0x00000a1b } },
1314 { RF2525, { 0x00022020, 0x00060111, 0x00000a1b } },
1315 { RF2525E, { 0x00022010, 0x00060111, 0x00000000 } },
1316 { RF5222, { 0x00000000, 0x00000101, 0x00000000 } }
1317 };
1318
1319 /*
1320 * RF value list for RF2522
1321 * Supports: 2.4 GHz
1322 */
1323 static const u32 rf_vals_bg_2522[] = {
1324 0x000c1fda, 0x000c1fee, 0x000c2002, 0x000c2016, 0x000c202a,
1325 0x000c203e, 0x000c2052, 0x000c2066, 0x000c207a, 0x000c208e,
1326 0x000c20a2, 0x000c20b6, 0x000c20ca, 0x000c20fa
1327 };
1328
1329 /*
1330 * RF value list for RF2523, RF2524 & RF2525
1331 * Supports: 2.4 GHz
1332 */
1333 static const u32 rf_vals_bg_252x[] = {
1334 0x00000c9e, 0x00000ca2, 0x00000ca6, 0x00000caa, 0x00000cae,
1335 0x00000cb2, 0x00000cb6, 0x00000cba, 0x00000cbe, 0x00000d02,
1336 0x00000d06, 0x00000d0a, 0x00000d0e, 0x00000d1a
1337 };
1338
1339 /*
1340 * RF value list for RF2525E
1341 * Supports: 2.4 GHz
1342 */
1343 static const u32 rf_vals_bg_2525e[] = {
1344 0x0000089a, 0x0000089e, 0x0000089e, 0x000008a2, 0x000008a2,
1345 0x000008a6, 0x000008a6, 0x000008aa, 0x000008aa, 0x000008ae,
1346 0x000008ae, 0x000008b2, 0x000008b2, 0x000008b6
1347 };
1348
1349 /*
1350 * RF value list for RF5222
1351 * Supports: 2.4 GHz & 5.2 GHz
1352 */
1353 static const u32 rf_vals_abg_5222[] = {
1354 0x00001136, 0x0000113a, 0x0000113e, 0x00001182, 0x00001186,
1355 0x0000118a, 0x0000118e, 0x00001192, 0x00001196, 0x0000119a,
1356 0x0000119e, 0x000011a2, 0x000011a6, 0x000011ae, 0x0001889a,
1357 0x0001889a, 0x0001889e, 0x000188a2, 0x000188a6, 0x000188aa,
1358 0x000188ae, 0x000188b2, 0x00008802, 0x00008806, 0x0000880a,
1359 0x0000880e, 0x00008812, 0x00008816, 0x0000881a, 0x0000881e,
1360 0x00008822, 0x00008826, 0x0000882a, 0x000090a6, 0x000090ae,
1361 0x000090b6, 0x000090be
1362 };
1363
1364 static void rt2500usb_init_hw_mode(struct rt2x00_dev *rt2x00dev)
1365 {
1366 struct hw_mode_spec *spec = &rt2x00dev->spec;
1367 u8 *txpower;
1368 unsigned int i;
1369
1370 /*
1371 * Initialize all hw fields.
1372 */
1373 rt2x00dev->hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1374 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1375 IEEE80211_HW_WEP_INCLUDE_IV |
1376 IEEE80211_HW_DATA_NULLFUNC_ACK |
1377 IEEE80211_HW_NO_TKIP_WMM_HWACCEL |
1378 IEEE80211_HW_MONITOR_DURING_OPER |
1379 IEEE80211_HW_NO_PROBE_FILTERING;
1380 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1381 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1382 rt2x00dev->hw->max_noise = MAX_RX_NOISE;
1383 rt2x00dev->hw->queues = 2;
1384
1385 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1386 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1387 rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0));
1388
1389 /*
1390 * Set device specific, but channel independent RF values.
1391 */
1392 for (i = 0; i < ARRAY_SIZE(rf_vals); i++) {
1393 if (rt2x00_rf(&rt2x00dev->chip, rf_vals[i].chip)) {
1394 rt2x00dev->rf1 = rf_vals[i].val[0];
1395 rt2x00dev->rf3 = rf_vals[i].val[1];
1396 rt2x00dev->rf4 = rf_vals[i].val[2];
1397 }
1398 }
1399
1400 /*
1401 * Convert tx_power array in eeprom.
1402 */
1403 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1404 for (i = 0; i < 14; i++)
1405 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1406
1407 /*
1408 * Initialize hw_mode information.
1409 */
1410 spec->num_modes = 2;
1411 spec->num_rates = 12;
1412 spec->num_channels = 14;
1413 spec->tx_power_a = NULL;
1414 spec->tx_power_bg = txpower;
1415 spec->tx_power_default = DEFAULT_TXPOWER;
1416 spec->chan_val_a = NULL;
1417
1418 if (rt2x00_rf(&rt2x00dev->chip, RF2522))
1419 spec->chan_val_bg = rf_vals_bg_2522;
1420 else if (rt2x00_rf(&rt2x00dev->chip, RF2523) ||
1421 rt2x00_rf(&rt2x00dev->chip, RF2524) ||
1422 rt2x00_rf(&rt2x00dev->chip, RF2525))
1423 spec->chan_val_bg = rf_vals_bg_252x;
1424 else if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
1425 spec->chan_val_bg = rf_vals_bg_2525e;
1426 else if (rt2x00_rf(&rt2x00dev->chip, RF5222))
1427 spec->chan_val_bg = rf_vals_abg_5222;
1428
1429 if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1430 spec->num_modes = 3;
1431 spec->num_channels += 23;
1432 spec->chan_val_a = &rf_vals_abg_5222[14];
1433 }
1434 }
1435
1436 static int rt2500usb_init_hw(struct rt2x00_dev *rt2x00dev)
1437 {
1438 int retval;
1439
1440 /*
1441 * Allocate eeprom data.
1442 */
1443 retval = rt2500usb_alloc_eeprom(rt2x00dev);
1444 if (retval)
1445 return retval;
1446
1447 retval = rt2500usb_init_eeprom(rt2x00dev);
1448 if (retval)
1449 return retval;
1450
1451 /*
1452 * Initialize hw specifications.
1453 */
1454 rt2500usb_init_hw_mode(rt2x00dev);
1455
1456 /*
1457 * This device supports ATIM
1458 */
1459 __set_bit(DEVICE_SUPPORT_ATIM, &rt2x00dev->flags);
1460
1461 return 0;
1462 }
1463
1464 /*
1465 * IEEE80211 stack callback functions.
1466 */
1467 static int rt2500usb_get_stats(struct ieee80211_hw *hw,
1468 struct ieee80211_low_level_stats *stats)
1469 {
1470 struct rt2x00_dev *rt2x00dev = hw->priv;
1471 u16 reg;
1472
1473 /*
1474 * Update FCS error count from register.
1475 * The dot11ACKFailureCount, dot11RTSFailureCount and
1476 * dot11RTSSuccessCount are updated in interrupt time.
1477 */
1478 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
1479 rt2x00dev->low_level_stats.dot11FCSErrorCount +=
1480 rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
1481
1482 memcpy(stats, &rt2x00dev->low_level_stats, sizeof(*stats));
1483
1484 return 0;
1485 }
1486
1487 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1488 .tx = rt2x00lib_tx,
1489 .reset = rt2x00lib_reset,
1490 .add_interface = rt2x00lib_add_interface,
1491 .remove_interface = rt2x00lib_remove_interface,
1492 .config = rt2x00lib_config,
1493 .config_interface = rt2x00lib_config_interface,
1494 .set_multicast_list = rt2x00lib_set_multicast_list,
1495 .get_stats = rt2500usb_get_stats,
1496 .conf_tx = rt2x00lib_conf_tx,
1497 .get_tx_stats = rt2x00lib_get_tx_stats,
1498 .beacon_update = rt2x00usb_beacon_update,
1499 };
1500
1501 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1502 .init_hw = rt2500usb_init_hw,
1503 .initialize = rt2x00usb_initialize,
1504 .uninitialize = rt2x00usb_uninitialize,
1505 .set_device_state = rt2500usb_set_device_state,
1506 .link_tuner = rt2500usb_link_tuner,
1507 .write_tx_desc = rt2500usb_write_tx_desc,
1508 .write_tx_data = rt2x00usb_write_tx_data,
1509 .kick_tx_queue = rt2500usb_kick_tx_queue,
1510 .fill_rxdone = rt2500usb_fill_rxdone,
1511 .config_type = rt2500usb_config_type,
1512 .config_phymode = rt2500usb_config_phymode,
1513 .config_channel = rt2500usb_config_channel,
1514 .config_mac_addr = rt2500usb_config_mac_addr,
1515 .config_bssid = rt2500usb_config_bssid,
1516 .config_promisc = rt2500usb_config_promisc,
1517 .config_txpower = rt2500usb_config_txpower,
1518 .config_antenna = rt2500usb_config_antenna,
1519 .config_duration = rt2500usb_config_duration,
1520 };
1521
1522 static const struct rt2x00_ops rt2500usb_ops = {
1523 .name = DRV_NAME,
1524 .rxd_size = RXD_DESC_SIZE,
1525 .txd_size = TXD_DESC_SIZE,
1526 .lib = &rt2500usb_rt2x00_ops,
1527 .hw = &rt2500usb_mac80211_ops,
1528 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1529 .debugfs = &rt2500usb_rt2x00debug,
1530 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1531 };
1532
1533 /*
1534 * rt2500usb module information.
1535 */
1536 static struct usb_device_id rt2500usb_device_table[] = {
1537 /* ASUS */
1538 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1539 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1540 /* Belkin */
1541 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1542 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1543 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1544 /* Cisco Systems */
1545 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1546 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1547 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1548 /* Conceptronic */
1549 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1550 /* D-LINK */
1551 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1552 /* Gigabyte */
1553 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1554 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1555 /* Hercules */
1556 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1557 /* Melco */
1558 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1559 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1560 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1561 /* MSI */
1562 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1563 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1564 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1565 /* Ralink */
1566 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1567 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1568 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1569 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1570 /* Siemens */
1571 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1572 /* SMC */
1573 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1574 /* Spairon */
1575 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1576 /* Trust */
1577 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1578 /* Zinwell */
1579 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1580 { 0, }
1581 };
1582
1583 MODULE_AUTHOR(DRV_PROJECT);
1584 MODULE_VERSION(DRV_VERSION);
1585 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1586 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1587 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1588 MODULE_LICENSE("GPL");
1589
1590 static struct usb_driver rt2500usb_driver = {
1591 .name = DRV_NAME,
1592 .id_table = rt2500usb_device_table,
1593 .probe = rt2x00usb_probe,
1594 .disconnect = rt2x00usb_disconnect,
1595 #ifdef CONFIG_PM
1596 .suspend = rt2x00usb_suspend,
1597 .resume = rt2x00usb_resume,
1598 #endif /* CONFIG_PM */
1599 };
1600
1601 static int __init rt2500usb_init(void)
1602 {
1603 return usb_register(&rt2500usb_driver);
1604 }
1605
1606 static void __exit rt2500usb_exit(void)
1607 {
1608 usb_deregister(&rt2500usb_driver);
1609 }
1610
1611 module_init(rt2500usb_init);
1612 module_exit(rt2500usb_exit);
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