target/linux/ar71xx/patches-3.2/130-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch

   1 From 58b69cf52387a7351ec13b52d3d6a495fe611c29 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Fri, 9 Dec 2011 22:07:23 +0100
   4 Subject: [PATCH 30/35] MIPS: ath79: add WMAC registration code for AR934X
   5
   6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
   7 Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
   8 ---
   9  arch/mips/ath79/Kconfig                        |    2 +-
  10  arch/mips/ath79/dev-wmac.c                     |   30 ++++++++++++++++++++++-
  11  arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    3 ++
  12  3 files changed, 32 insertions(+), 3 deletions(-)
  13
  14 --- a/arch/mips/ath79/Kconfig
  15 +++ b/arch/mips/ath79/Kconfig
  16 @@ -86,7 +86,7 @@ config ATH79_DEV_USB
  17         def_bool n
  18
  19  config ATH79_DEV_WMAC
  20 -       depends on (SOC_AR913X || SOC_AR933X)
  21 +       depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
  22         def_bool n
  23
  24  endif
  25 --- a/arch/mips/ath79/dev-wmac.c
  26 +++ b/arch/mips/ath79/dev-wmac.c
  27 @@ -1,9 +1,12 @@
  28  /*
  29   *  Atheros AR913X/AR933X SoC built-in WMAC device support
  30   *
  31 + *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
  32   *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  33   *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  34   *
  35 + *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
  36 + *
  37   *  This program is free software; you can redistribute it and/or modify it
  38   *  under the terms of the GNU General Public License version 2 as published
  39   *  by the Free Software Foundation.
  40 @@ -26,8 +29,7 @@ static struct resource ath79_wmac_resour
  41                 /* .start and .end fields are filled dynamically */
  42                 .flags  = IORESOURCE_MEM,
  43         }, {
  44 -               .start  = ATH79_CPU_IRQ_IP2,
  45 -               .end    = ATH79_CPU_IRQ_IP2,
  46 +               /* .start and .end fields are filled dynamically */
  47                 .flags  = IORESOURCE_IRQ,
  48         },
  49  };
  50 @@ -53,6 +55,8 @@ static void __init ar913x_wmac_setup(voi
  51
  52         ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
  53         ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
  54 +       ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
  55 +       ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
  56  }
  57
  58
  59 @@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(voi
  60
  61         ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
  62         ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
  63 +       ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
  64 +       ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
  65
  66         t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
  67         if (t & AR933X_BOOTSTRAP_REF_CLK_40)
  68 @@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(voi
  69         ath79_wmac_data.external_reset = ar933x_wmac_reset;
  70  }
  71
  72 +static void ar934x_wmac_setup(void)
  73 +{
  74 +       u32 t;
  75 +
  76 +       ath79_wmac_device.name = "ar934x_wmac";
  77 +
  78 +       ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
  79 +       ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
  80 +       ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
  81 +       ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
  82 +
  83 +       t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
  84 +       if (t & AR934X_BOOTSTRAP_REF_CLK_40)
  85 +               ath79_wmac_data.is_clk_25mhz = false;
  86 +       else
  87 +               ath79_wmac_data.is_clk_25mhz = true;
  88 +}
  89 +
  90  void __init ath79_register_wmac(u8 *cal_data)
  91  {
  92         if (soc_is_ar913x())
  93                 ar913x_wmac_setup();
  94         else if (soc_is_ar933x())
  95                 ar933x_wmac_setup();
  96 +       else if (soc_is_ar934x())
  97 +               ar934x_wmac_setup();
  98         else
  99                 BUG();
 100
 101 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 102 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 103 @@ -61,6 +61,9 @@
 104  #define AR933X_EHCI_BASE       0x1b000000
 105  #define AR933X_EHCI_SIZE       0x1000
 106
 107 +#define AR934X_WMAC_BASE       (AR71XX_APB_BASE + 0x00100000)
 108 +#define AR934X_WMAC_SIZE       0x20000
 109 +
 110  /*
 111   * DDR_CTRL block
 112   */