ath9k: make the regulatory override less intrusive - allow it to parse CTLs
[openwrt.git] / target / linux / generic / patches-2.6.34 / 900-bcm47xx_wdt-noprescale.patch
1 --- a/drivers/watchdog/bcm47xx_wdt.c
2 +++ b/drivers/watchdog/bcm47xx_wdt.c
3 @@ -31,6 +31,7 @@
4
5 #define WDT_DEFAULT_TIME 30 /* seconds */
6 #define WDT_MAX_TIME 255 /* seconds */
7 +#define WDT_SHIFT 15 /* 32.768 KHz on cores with slow WDT clock */
8
9 static int wdt_time = WDT_DEFAULT_TIME;
10 static int nowayout = WATCHDOG_NOWAYOUT;
11 @@ -50,11 +51,11 @@ static unsigned long bcm47xx_wdt_busy;
12 static char expect_release;
13 static struct timer_list wdt_timer;
14 static atomic_t ticks;
15 +static int needs_sw_scale;
16
17 -static inline void bcm47xx_wdt_hw_start(void)
18 +static inline void bcm47xx_wdt_hw_start(u32 ticks)
19 {
20 - /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
21 - ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff);
22 + ssb_watchdog_timer_set(&ssb_bcm47xx, ticks);
23 }
24
25 static inline int bcm47xx_wdt_hw_stop(void)
26 @@ -65,33 +66,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
27 static void bcm47xx_timer_tick(unsigned long unused)
28 {
29 if (!atomic_dec_and_test(&ticks)) {
30 - bcm47xx_wdt_hw_start();
31 + /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
32 + bcm47xx_wdt_hw_start(0xfffffff);
33 mod_timer(&wdt_timer, jiffies + HZ);
34 } else {
35 - printk(KERN_CRIT DRV_NAME "Watchdog will fire soon!!!\n");
36 + printk(KERN_CRIT DRV_NAME ": Watchdog will fire soon!!!\n");
37 }
38 }
39
40 -static inline void bcm47xx_wdt_pet(void)
41 +static void bcm47xx_wdt_pet(void)
42 {
43 - atomic_set(&ticks, wdt_time);
44 + if(needs_sw_scale)
45 + atomic_set(&ticks, wdt_time);
46 + else
47 + bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
48 }
49
50 static void bcm47xx_wdt_start(void)
51 {
52 bcm47xx_wdt_pet();
53 - bcm47xx_timer_tick(0);
54 -}
55 -
56 -static void bcm47xx_wdt_pause(void)
57 -{
58 - del_timer_sync(&wdt_timer);
59 - bcm47xx_wdt_hw_stop();
60 + if(needs_sw_scale)
61 + bcm47xx_timer_tick(0);
62 }
63
64 static void bcm47xx_wdt_stop(void)
65 {
66 - bcm47xx_wdt_pause();
67 + if(needs_sw_scale)
68 + del_timer_sync(&wdt_timer);
69 + bcm47xx_wdt_hw_stop();
70 }
71
72 static int bcm47xx_wdt_settimeout(int new_time)
73 @@ -243,7 +245,15 @@ static int __init bcm47xx_wdt_init(void)
74 if (bcm47xx_wdt_hw_stop() < 0)
75 return -ENODEV;
76
77 - setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
78 + /* FIXME Other cores */
79 + if(ssb_bcm47xx.chip_id == 0x5354) {
80 + /* Slow WDT clock, no pre-scaling */
81 + needs_sw_scale = 0;
82 + } else {
83 + /* Fast WDT clock, needs software pre-scaling */
84 + needs_sw_scale = 1;
85 + setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
86 + }
87
88 if (bcm47xx_wdt_settimeout(wdt_time)) {
89 bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);
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