package/bcm43xx-mac80211/src/bcm43xx/bcm43xx_xmit.h

   1 #ifndef BCM43xx_XMIT_H_
   2 #define BCM43xx_XMIT_H_
   3
   4 #include "bcm43xx_main.h"
   5
   6
   7 #define _bcm43xx_declare_plcp_hdr(size) \
   8         struct bcm43xx_plcp_hdr##size {         \
   9                 union {                         \
  10                         __le32 data;            \
  11                         __u8 raw[size];         \
  12                 } __attribute__((__packed__));  \
  13         } __attribute__((__packed__))
  14
  15 /* struct bcm43xx_plcp_hdr4 */
  16 _bcm43xx_declare_plcp_hdr(4);
  17 /* struct bcm43xx_plcp_hdr6 */
  18 _bcm43xx_declare_plcp_hdr(6);
  19
  20 #undef _bcm43xx_declare_plcp_hdr
  21
  22
  23 /* TX header for v4 firmware */
  24 struct bcm43xx_txhdr_fw4 {
  25         __le32 mac_ctl;                         /* MAC TX control */
  26         __le16 mac_frame_ctl;                   /* Copy of the FrameControl field */
  27         __le16 tx_fes_time_norm;                /* TX FES Time Normal */
  28         __le16 phy_ctl;                         /* PHY TX control */
  29         __le16 phy_ctl_0;                       /* Unused */
  30         __le16 phy_ctl_1;                       /* Unused */
  31         __le16 phy_ctl_rts_0;                   /* Unused */
  32         __le16 phy_ctl_rts_1;                   /* Unused */
  33         __u8 phy_rate;                          /* PHY rate */
  34         __u8 phy_rate_rts;                      /* PHY rate for RTS/CTS */
  35         __u8 extra_ft;                          /* Extra Frame Types */
  36         __u8 chan_radio_code;                   /* Channel Radio Code */
  37         __u8 iv[16];                            /* Encryption IV */
  38         __u8 tx_receiver[6];                    /* TX Frame Receiver address */
  39         __le16 tx_fes_time_fb;                  /* TX FES Time Fallback */
  40         struct bcm43xx_plcp_hdr6 rts_plcp_fb;   /* RTS fallback PLCP */
  41         __le16 rts_dur_fb;                      /* RTS fallback duration */
  42         struct bcm43xx_plcp_hdr6 plcp_fb;       /* Fallback PLCP */
  43         __le16 dur_fb;                          /* Fallback duration */
  44         __le16 mm_dur_time;                     /* Unused */
  45         __le16 mm_dur_time_fb;                  /* Unused */
  46         __le32 time_stamp;                      /* Timestamp */
  47         PAD_BYTES(2);
  48         __le16 cookie;                          /* TX frame cookie */
  49         __le16 tx_status;                       /* TX status */
  50         struct bcm43xx_plcp_hdr6 rts_plcp;      /* RTS PLCP */
  51         __u8 rts_frame[16];                     /* The RTS frame (if used) */
  52         PAD_BYTES(2);
  53         struct bcm43xx_plcp_hdr6 plcp;          /* Main PLCP */
  54 } __attribute__((__packed__));
  55
  56 /* MAC TX control */
  57 #define BCM43xx_TX4_MAC_KEYIDX          0x0FF00000 /* Security key index */
  58 #define BCM43xx_TX4_MAC_KEYIDX_SHIFT    20
  59 #define BCM43xx_TX4_MAC_KEYALG          0x00070000 /* Security key algorithm */
  60 #define BCM43xx_TX4_MAC_KEYALG_SHIFT    16
  61 #define BCM43xx_TX4_MAC_LIFETIME        0x00001000
  62 #define BCM43xx_TX4_MAC_FRAMEBURST      0x00000800
  63 #define BCM43xx_TX4_MAC_SENDCTS         0x00000400
  64 #define BCM43xx_TX4_MAC_AMPDU           0x00000300
  65 #define BCM43xx_TX4_MAC_AMPDU_SHIFT     8
  66 #define BCM43xx_TX4_MAC_5GHZ            0x00000080
  67 #define BCM43xx_TX4_MAC_IGNPMQ          0x00000020
  68 #define BCM43xx_TX4_MAC_HWSEQ           0x00000010 /* Use Hardware Sequence Number */
  69 #define BCM43xx_TX4_MAC_STMSDU          0x00000008 /* Start MSDU */
  70 #define BCM43xx_TX4_MAC_SENDRTS         0x00000004
  71 #define BCM43xx_TX4_MAC_LONGFRAME       0x00000002
  72 #define BCM43xx_TX4_MAC_ACK             0x00000001
  73
  74 /* Extra Frame Types */
  75 #define BCM43xx_TX4_EFT_FBOFDM          0x0001 /* Data frame fallback rate type */
  76 #define BCM43xx_TX4_EFT_RTSOFDM         0x0004 /* RTS/CTS rate type */
  77 #define BCM43xx_TX4_EFT_RTSFBOFDM       0x0010 /* RTS/CTS fallback rate type */
  78
  79 /* PHY TX control word */
  80 #define BCM43xx_TX4_PHY_OFDM            0x0001 /* Data frame rate type */
  81 #define BCM43xx_TX4_PHY_SHORTPRMBL      0x0010 /* Use short preamble */
  82 #define BCM43xx_TX4_PHY_ANT             0x03C0 /* Antenna selection */
  83 #define  BCM43xx_TX4_PHY_ANT0           0x0000 /* Use antenna 0 */
  84 #define  BCM43xx_TX4_PHY_ANT1           0x0100 /* Use antenna 1 */
  85 #define  BCM43xx_TX4_PHY_ANTLAST        0x0300 /* Use last used antenna */
  86
  87
  88
  89 void bcm43xx_generate_txhdr(struct bcm43xx_wldev *dev,
  90                             u8 *txhdr,
  91                             const unsigned char *fragment_data,
  92                             unsigned int fragment_len,
  93                             const struct ieee80211_tx_control *txctl,
  94                             u16 cookie);
  95
  96
  97 /* Transmit Status */
  98 struct bcm43xx_txstatus {
  99         u16 cookie;             /* The cookie from the txhdr */
 100         u16 seq;                /* Sequence number */
 101         u8 phy_stat;            /* PHY TX status */
 102         u8 frame_count;         /* Frame transmit count */
 103         u8 rts_count;           /* RTS transmit count */
 104         u8 supp_reason;         /* Suppression reason */
 105         /* flags */
 106         u8 pm_indicated;        /* PM mode indicated to AP */
 107         u8 intermediate;        /* Intermediate status notification (not final) */
 108         u8 for_ampdu;           /* Status is for an AMPDU (afterburner) */
 109         u8 acked;               /* Wireless ACK received */
 110 };
 111
 112 /* txstatus supp_reason values */
 113 enum {
 114         BCM43xx_TXST_SUPP_NONE,         /* Not suppressed */
 115         BCM43xx_TXST_SUPP_PMQ,          /* Suppressed due to PMQ entry */
 116         BCM43xx_TXST_SUPP_FLUSH,        /* Suppressed due to flush request */
 117         BCM43xx_TXST_SUPP_PREV,         /* Previous fragment failed */
 118         BCM43xx_TXST_SUPP_CHAN,         /* Channel mismatch */
 119         BCM43xx_TXST_SUPP_LIFE,         /* Lifetime expired */
 120         BCM43xx_TXST_SUPP_UNDER,        /* Buffer underflow */
 121         BCM43xx_TXST_SUPP_ABNACK,       /* Afterburner NACK */
 122 };
 123
 124 /* Transmit Status as received through DMA/PIO on old chips */
 125 struct bcm43xx_hwtxstatus {
 126         PAD_BYTES(4);
 127         __le16 cookie;
 128         u8 flags;
 129         u8 count;
 130         PAD_BYTES(2);
 131         __le16 seq;
 132         u8 phy_stat;
 133         PAD_BYTES(1);
 134 } __attribute__((__packed__));
 135
 136
 137 /* Receive header for v4 firmware. */
 138 struct bcm43xx_rxhdr_fw4 {
 139         __le16 frame_len;       /* Frame length */
 140         PAD_BYTES(2);
 141         __le16 phy_status0;     /* PHY RX Status 0 */
 142         __u8 jssi;              /* PHY RX Status 1: JSSI */
 143         __u8 sig_qual;          /* PHY RX Status 1: Signal Quality */
 144         __le16 phy_status2;     /* PHY RX Status 2 */
 145         __le16 phy_status3;     /* PHY RX Status 3 */
 146         __le32 mac_status;      /* MAC RX status */
 147         __le16 mac_time;
 148         __le16 channel;
 149 } __attribute__((__packed__));
 150
 151
 152 /* PHY RX Status 0 */
 153 #define BCM43xx_RX_PHYST0_GAINCTL       0x4000 /* Gain Control */
 154 #define BCM43xx_RX_PHYST0_PLCPHCF       0x0200
 155 #define BCM43xx_RX_PHYST0_PLCPFV        0x0100
 156 #define BCM43xx_RX_PHYST0_SHORTPRMBL    0x0080 /* Received with Short Preamble */
 157 #define BCM43xx_RX_PHYST0_LCRS          0x0040
 158 #define BCM43xx_RX_PHYST0_ANT           0x0020 /* Antenna */
 159 #define BCM43xx_RX_PHYST0_UNSRATE       0x0010
 160 #define BCM43xx_RX_PHYST0_CLIP          0x000C
 161 #define BCM43xx_RX_PHYST0_CLIP_SHIFT    2
 162 #define BCM43xx_RX_PHYST0_FTYPE         0x0003 /* Frame type */
 163 #define  BCM43xx_RX_PHYST0_CCK          0x0000 /* Frame type: CCK */
 164 #define  BCM43xx_RX_PHYST0_OFDM         0x0001 /* Frame type: OFDM */
 165 #define  BCM43xx_RX_PHYST0_PRE_N        0x0002 /* Pre-standard N-PHY frame */
 166 #define  BCM43xx_RX_PHYST0_STD_N        0x0003 /* Standard N-PHY frame */
 167
 168 /* PHY RX Status 2 */
 169 #define BCM43xx_RX_PHYST2_LNAG          0xC000 /* LNA Gain */
 170 #define BCM43xx_RX_PHYST2_LNAG_SHIFT    14
 171 #define BCM43xx_RX_PHYST2_PNAG          0x3C00 /* PNA Gain */
 172 #define BCM43xx_RX_PHYST2_PNAG_SHIFT    10
 173 #define BCM43xx_RX_PHYST2_FOFF          0x03FF /* F offset */
 174
 175 /* PHY RX Status 3 */
 176 #define BCM43xx_RX_PHYST3_DIGG          0x1800 /* DIG Gain */
 177 #define BCM43xx_RX_PHYST3_DIGG_SHIFT    11
 178 #define BCM43xx_RX_PHYST3_TRSTATE       0x0400 /* TR state */
 179
 180 /* MAC RX Status */
 181 #define BCM43xx_RX_MAC_BEACONSENT       0x00008000 /* Beacon send flag */
 182 #define BCM43xx_RX_MAC_KEYIDX           0x000007E0 /* Key index */
 183 #define BCM43xx_RX_MAC_KEYIDX_SHIFT     5
 184 #define BCM43xx_RX_MAC_DECERR           0x00000010 /* Decrypt error */
 185 #define BCM43xx_RX_MAC_DEC              0x00000008 /* Decryption attempted */
 186 #define BCM43xx_RX_MAC_PADDING          0x00000004 /* Pad bytes present */
 187 #define BCM43xx_RX_MAC_RESP             0x00000002 /* Response frame transmitted */
 188 #define BCM43xx_RX_MAC_FCSERR           0x00000001 /* FCS error */
 189
 190 /* RX channel */
 191 #define BCM43xx_RX_CHAN_GAIN            0xFC00 /* Gain */
 192 #define BCM43xx_RX_CHAN_GAIN_SHIFT      10
 193 #define BCM43xx_RX_CHAN_ID              0x03FC /* Channel ID */
 194 #define BCM43xx_RX_CHAN_ID_SHIFT        2
 195 #define BCM43xx_RX_CHAN_PHYTYPE         0x0003 /* PHY type */
 196
 197
 198
 199 u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate);
 200 u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate);
 201
 202 void bcm43xx_generate_plcp_hdr(struct bcm43xx_plcp_hdr4 *plcp,
 203                                const u16 octets, const u8 bitrate);
 204
 205 void bcm43xx_rx(struct bcm43xx_wldev *dev,
 206                 struct sk_buff *skb,
 207                 const void *_rxhdr);
 208
 209 void bcm43xx_handle_txstatus(struct bcm43xx_wldev *dev,
 210                              const struct bcm43xx_txstatus *status);
 211
 212 void bcm43xx_handle_hwtxstatus(struct bcm43xx_wldev *dev,
 213                                const struct bcm43xx_hwtxstatus *hw);
 214
 215 void bcm43xx_tx_suspend(struct bcm43xx_wldev *dev);
 216 void bcm43xx_tx_resume(struct bcm43xx_wldev *dev);
 217
 218
 219 #define BCM43xx_NR_QOSPARMS             22
 220 enum {
 221         BCM43xx_QOSPARM_TXOP = 0,
 222         BCM43xx_QOSPARM_CWMIN,
 223         BCM43xx_QOSPARM_CWMAX,
 224         BCM43xx_QOSPARM_CWCUR,
 225         BCM43xx_QOSPARM_AIFS,
 226         BCM43xx_QOSPARM_BSLOTS,
 227         BCM43xx_QOSPARM_REGGAP,
 228         BCM43xx_QOSPARM_STATUS,
 229 };
 230 void bcm43xx_qos_init(struct bcm43xx_wldev *dev);
 231
 232
 233 /* Helper functions for converting the key-table index from "firmware-format"
 234  * to "raw-format" and back. The firmware API changed for this at some revision.
 235  * We need to account for that here. */
 236 static inline
 237 int bcm43xx_new_kidx_api(struct bcm43xx_wldev *dev)
 238 {
 239         /* FIXME: Not sure the change was at rev 351 */
 240         return (dev->fw.rev >= 351);
 241 }
 242 static inline
 243 u8 bcm43xx_kidx_to_fw(struct bcm43xx_wldev *dev, u8 raw_kidx)
 244 {
 245         u8 firmware_kidx;
 246         if (bcm43xx_new_kidx_api(dev)) {
 247                 firmware_kidx = raw_kidx;
 248         } else {
 249                 if (raw_kidx >= 4) /* Is per STA key? */
 250                         firmware_kidx = raw_kidx - 4;
 251                 else
 252                         firmware_kidx = raw_kidx; /* TX default key */
 253         }
 254         return firmware_kidx;
 255 }
 256 static inline
 257 u8 bcm43xx_kidx_to_raw(struct bcm43xx_wldev *dev, u8 firmware_kidx)
 258 {
 259         u8 raw_kidx;
 260         if (bcm43xx_new_kidx_api(dev))
 261                 raw_kidx = firmware_kidx;
 262         else
 263                 raw_kidx = firmware_kidx + 4; /* RX default keys or per STA keys */
 264         return raw_kidx;
 265 }
 266
 267 #endif /* BCM43xx_XMIT_H_ */