target/linux/ar71xx/files/arch/mips/ath79/mach-pb92.c

   1 /*
   2  *  Atheros PB92 board support
   3  *
   4  *  Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
   5  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   6  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   7  *
   8  *  This program is free software; you can redistribute it and/or modify it
   9  *  under the terms of the GNU General Public License version 2 as published
  10  *  by the Free Software Foundation.
  11  */
  12
  13 #include <asm/mach-ath79/ath79.h>
  14
  15 #include "dev-eth.h"
  16 #include "dev-gpio-buttons.h"
  17 #include "dev-m25p80.h"
  18 #include "dev-usb.h"
  19 #include "machtypes.h"
  20 #include "pci.h"
  21
  22 #define PB92_KEYS_POLL_INTERVAL         20      /* msecs */
  23 #define PB92_KEYS_DEBOUNCE_INTERVAL     (3 * PB92_KEYS_POLL_INTERVAL)
  24
  25 #define PB92_GPIO_BTN_SW4       8
  26 #define PB92_GPIO_BTN_SW5       3
  27
  28 static struct gpio_keys_button pb92_gpio_keys[] __initdata = {
  29         {
  30                 .desc           = "sw4",
  31                 .type           = EV_KEY,
  32                 .code           = BTN_0,
  33                 .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
  34                 .gpio           = PB92_GPIO_BTN_SW4,
  35                 .active_low     = 1,
  36         }, {
  37                 .desc           = "sw5",
  38                 .type           = EV_KEY,
  39                 .code           = BTN_1,
  40                 .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
  41                 .gpio           = PB92_GPIO_BTN_SW5,
  42                 .active_low     = 1,
  43         }
  44 };
  45
  46 static void __init pb92_init(void)
  47 {
  48         u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
  49
  50         ath79_register_m25p80(NULL);
  51
  52         ath79_register_mdio(0, ~BIT(0));
  53         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
  54         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  55         ath79_eth0_data.speed = SPEED_1000;
  56         ath79_eth0_data.duplex = DUPLEX_FULL;
  57         ath79_eth0_data.phy_mask = BIT(0);
  58
  59         ath79_register_eth(0);
  60
  61         ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL,
  62                                          ARRAY_SIZE(pb92_gpio_keys),
  63                                          pb92_gpio_keys);
  64
  65         ath79_register_usb();
  66
  67         ath79_register_pci();
  68 }
  69
  70 MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init);