when changing the mac address of a bridge interface, keep member interface addresses...
[openwrt.git] / target / linux / brcm63xx / patches-2.6.32 / 180-udc_preliminary_support.patch
1 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
2 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
3 @@ -28,6 +28,7 @@
4 #include <bcm63xx_dev_pcmcia.h>
5 #include <bcm63xx_dev_usb_ohci.h>
6 #include <bcm63xx_dev_usb_ehci.h>
7 +#include <bcm63xx_dev_usb_udc.h>
8 #include <board_bcm963xx.h>
9
10 #define PFX "board_bcm963xx: "
11 @@ -406,6 +407,7 @@ static struct board_info __initdata boar
12 .has_ohci0 = 1,
13 .has_pccard = 1,
14 .has_ehci0 = 1,
15 + .has_udc0 = 1,
16 };
17
18 static struct board_info __initdata board_rta1025w_16 = {
19 @@ -950,6 +952,9 @@ int __init board_register_devices(void)
20 if (board.has_dsp)
21 bcm63xx_dsp_register(&board.dsp);
22
23 + if (board.has_udc0)
24 + bcm63xx_udc_register();
25 +
26 /* Generate MAC address for WLAN and
27 * register our SPROM */
28 #ifdef CONFIG_SSB_PCIHOST
29 --- /dev/null
30 +++ b/arch/mips/bcm63xx/dev-usb-udc.c
31 @@ -0,0 +1,58 @@
32 +/*
33 + * Copyright (C) 2009 Henk Vergonet <Henk.Vergonet@gmail.com>
34 + *
35 + * This program is free software; you can redistribute it and/or
36 + * modify it under the terms of the GNU General Public License as
37 + * published by the Free Software Foundation; either version 2 of
38 + * the License, or (at your option) any later version.
39 + *
40 + * This program is distributed in the hope that it will be useful,
41 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
42 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
43 + * GNU General Public License for more details.
44 + *
45 + * You should have received a copy of the GNU General Public License
46 + * along with this program; if not, write to the Free Software
47 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
48 + */
49 +#include <linux/init.h>
50 +#include <linux/kernel.h>
51 +#include <linux/platform_device.h>
52 +#include <bcm63xx_cpu.h>
53 +
54 +static struct resource udc_resources[] = {
55 + {
56 + .start = -1, /* filled at runtime */
57 + .end = -1, /* filled at runtime */
58 + .flags = IORESOURCE_MEM,
59 + },
60 + {
61 + .start = -1, /* filled at runtime */
62 + .flags = IORESOURCE_IRQ,
63 + },
64 +};
65 +
66 +static u64 udc_dmamask = ~(u32)0;
67 +
68 +static struct platform_device bcm63xx_udc_device = {
69 + .name = "bcm63xx-udc",
70 + .id = 0,
71 + .num_resources = ARRAY_SIZE(udc_resources),
72 + .resource = udc_resources,
73 + .dev = {
74 + .dma_mask = &udc_dmamask,
75 + .coherent_dma_mask = 0xffffffff,
76 + },
77 +};
78 +
79 +int __init bcm63xx_udc_register(void)
80 +{
81 + if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348())
82 + return 0;
83 +
84 + udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0);
85 + udc_resources[0].end = udc_resources[0].start;
86 + udc_resources[0].end += RSET_UDC_SIZE - 1;
87 + udc_resources[1].start = bcm63xx_get_irq_number(IRQ_UDC0);
88 + return platform_device_register(&bcm63xx_udc_device);
89 +}
90 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
91 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
92 @@ -125,7 +125,7 @@ enum bcm63xx_regs_set {
93 #define BCM_6338_UART0_BASE (0xfffe0300)
94 #define BCM_6338_GPIO_BASE (0xfffe0400)
95 #define BCM_6338_SPI_BASE (0xfffe0c00)
96 -#define BCM_6338_UDC0_BASE (0xdeadbeef)
97 +#define BCM_6338_UDC0_BASE (0xfffe3000)
98 #define BCM_6338_USBDMA_BASE (0xfffe2400)
99 #define BCM_6338_OHCI0_BASE (0xdeadbeef)
100 #define BCM_6338_OHCI_PRIV_BASE (0xfffe3000)
101 @@ -155,7 +155,7 @@ enum bcm63xx_regs_set {
102 #define BCM_6345_UART0_BASE (0xfffe0300)
103 #define BCM_6345_GPIO_BASE (0xfffe0400)
104 #define BCM_6345_SPI_BASE (0xdeadbeef)
105 -#define BCM_6345_UDC0_BASE (0xdeadbeef)
106 +#define BCM_6345_UDC0_BASE (0xfffe2100)
107 #define BCM_6345_USBDMA_BASE (0xfffe2800)
108 #define BCM_6345_ENET0_BASE (0xfffe1800)
109 #define BCM_6345_ENETDMA_BASE (0xfffe2800)
110 @@ -210,7 +210,7 @@ enum bcm63xx_regs_set {
111 #define BCM_6358_UART0_BASE (0xfffe0100)
112 #define BCM_6358_GPIO_BASE (0xfffe0080)
113 #define BCM_6358_SPI_BASE (0xdeadbeef)
114 -#define BCM_6358_UDC0_BASE (0xfffe0800)
115 +#define BCM_6358_UDC0_BASE (0xfffe0400)
116 #define BCM_6358_OHCI0_BASE (0xfffe1400)
117 #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef)
118 #define BCM_6358_USBH_PRIV_BASE (0xfffe1500)
119 @@ -430,6 +430,7 @@ enum bcm63xx_irq {
120 IRQ_TIMER = 0,
121 IRQ_UART0,
122 IRQ_DSL,
123 + IRQ_UDC0,
124 IRQ_ENET0,
125 IRQ_ENET1,
126 IRQ_ENET_PHY,
127 @@ -472,7 +473,7 @@ enum bcm63xx_irq {
128 #define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
129 #define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
130 #define BCM_6345_ATM_IRQ (IRQ_INTERNAL_BASE + 4)
131 -#define BCM_6345_USB_IRQ (IRQ_INTERNAL_BASE + 5)
132 +#define BCM_6345_UDC0_IRQ (IRQ_INTERNAL_BASE + 5)
133 #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
134 #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
135 #define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1)
136 @@ -494,10 +495,17 @@ enum bcm63xx_irq {
137 #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
138 #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
139 #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
140 +#define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6)
141 #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7)
142 #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
143 #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
144 #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12)
145 +#define BCM_6348_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 14)
146 +#define BCM_6348_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 15)
147 +#define BCM_6348_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 16)
148 +#define BCM_6348_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 17)
149 +#define BCM_6348_USB_ISO_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 18)
150 +#define BCM_6348_USB_ISO_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 19)
151 #define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20)
152 #define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21)
153 #define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22)
154 --- /dev/null
155 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_udc.h
156 @@ -0,0 +1,6 @@
157 +#ifndef BCM63XX_DEV_USB_UDC_H_
158 +#define BCM63XX_DEV_USB_UDC_H_
159 +
160 +int bcm63xx_udc_register(void);
161 +
162 +#endif /* BCM63XX_DEV_USB_UDC_H_ */
163 --- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
164 +++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
165 @@ -45,6 +45,7 @@ struct board_info {
166 unsigned int has_ohci0:1;
167 unsigned int has_ehci0:1;
168 unsigned int has_dsp:1;
169 + unsigned int has_udc0:1;
170
171 /* ethernet config */
172 struct bcm63xx_enet_platform_data enet0;
173 --- a/arch/mips/bcm63xx/Makefile
174 +++ b/arch/mips/bcm63xx/Makefile
175 @@ -1,6 +1,6 @@
176 obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
177 dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \
178 - dev-usb-ohci.o dev-usb-ehci.o
179 + dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o
180 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
181
182 obj-y += boards/
183 --- a/arch/mips/bcm63xx/clk.c
184 +++ b/arch/mips/bcm63xx/clk.c
185 @@ -141,6 +141,30 @@ static struct clk clk_usbh = {
186 };
187
188 /*
189 + * USB slave clock
190 + */
191 +static void usbs_set(struct clk *clk, int enable)
192 +{
193 + u32 mask;
194 +
195 + switch(bcm63xx_get_cpu_id()) {
196 + case BCM6338_CPU_ID:
197 + mask = CKCTL_6338_USBS_EN;
198 + break;
199 + case BCM6348_CPU_ID:
200 + mask = CKCTL_6348_USBS_EN;
201 + break;
202 + default:
203 + return;
204 + }
205 + bcm_hwclock_set(mask, enable);
206 +}
207 +
208 +static struct clk clk_usbs = {
209 + .set = usbs_set,
210 +};
211 +
212 +/*
213 * SPI clock
214 */
215 static void spi_set(struct clk *clk, int enable)
216 @@ -208,6 +232,8 @@ struct clk *clk_get(struct device *dev,
217 return &clk_ephy;
218 if (!strcmp(id, "usbh"))
219 return &clk_usbh;
220 + if (!strcmp(id, "usbs"))
221 + return &clk_usbs;
222 if (!strcmp(id, "spi"))
223 return &clk_spi;
224 if (!strcmp(id, "periph"))
225 --- a/arch/mips/bcm63xx/Kconfig
226 +++ b/arch/mips/bcm63xx/Kconfig
227 @@ -7,6 +7,7 @@ config BCM63XX_CPU_6338
228 select USB_ARCH_HAS_OHCI
229 select USB_OHCI_BIG_ENDIAN_DESC
230 select USB_OHCI_BIG_ENDIAN_MMIO
231 + select USB_ARCH_HAS_UDC
232
233 config BCM63XX_CPU_6345
234 bool "support 6345 CPU"
235 @@ -19,6 +20,7 @@ config BCM63XX_CPU_6348
236 select USB_ARCH_HAS_OHCI
237 select USB_OHCI_BIG_ENDIAN_DESC
238 select USB_OHCI_BIG_ENDIAN_MMIO
239 + select USB_ARCH_HAS_UDC
240
241 config BCM63XX_CPU_6358
242 bool "support 6358 CPU"
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