when changing the mac address of a bridge interface, keep member interface addresses...
[openwrt.git] / target / linux / s3c24xx / files-2.6.30 / drivers / mfd / glamo / glamo-core.h
1 #ifndef __GLAMO_CORE_H
2 #define __GLAMO_CORE_H
3
4 #include <asm/system.h>
5 #include <linux/mfd/glamo.h>
6
7 /* for the time being, we put the on-screen framebuffer into the lowest
8 * VRAM space. This should make the code easily compatible with the various
9 * 2MB/4MB/8MB variants of the Smedia chips */
10 #define GLAMO_OFFSET_VRAM 0x800000
11 #define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM)
12
13 /* we only allocate the minimum possible size for the framebuffer to make
14 * sure we have sufficient memory for other functions of the chip */
15 //#define GLAMO_FB_SIZE (640*480*4) /* == 0x12c000 */
16 #define GLAMO_INTERNAL_RAM_SIZE 0x800000
17 #define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
18 #define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
19
20 enum glamo_pll {
21 GLAMO_PLL1,
22 GLAMO_PLL2,
23 };
24
25 struct glamo_core {
26 int irq;
27 int irq_works; /* 0 means PCB does not support Glamo IRQ */
28 struct resource *mem;
29 struct resource *mem_core;
30 void __iomem *base;
31 struct platform_device *pdev;
32 struct glamo_platform_data *pdata;
33 u_int16_t type;
34 u_int16_t revision;
35 spinlock_t lock;
36 u32 engine_enabled_bitfield;
37 u32 engine_enabled_bitfield_suspend;
38 int suspending;
39 };
40
41 struct glamo_script {
42 u_int16_t reg;
43 u_int16_t val;
44 };
45
46 void glamo_engine_div_enable(struct glamo_core *glamo, enum glamo_engine engine);
47 void glamo_engine_div_disable(struct glamo_core *glamo, enum glamo_engine engine);
48
49
50 int glamo_pll_rate(struct glamo_core *glamo, enum glamo_pll pll);
51
52 int glamo_run_script(struct glamo_core *glamo,
53 const struct glamo_script *script, int len, int may_sleep);
54
55 int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine);
56 int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine);
57 void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine);
58 int glamo_engine_reclock(struct glamo_core *glamo,
59 enum glamo_engine engine, int ps);
60
61 void glamo_engine_clkreg_set(struct glamo_core *glamo,
62 enum glamo_engine engine,
63 u_int16_t mask, u_int16_t val);
64
65 u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
66 enum glamo_engine engine);
67 #endif /* __GLAMO_CORE_H */
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