forward port redboot rootfs partition space expansion patch to 2.6.24
[openwrt.git] / target / linux / etrax / files / drivers / spi / spi_crisv32_gpio.c
1 /*
2 * Simple bitbanged-GPIO SPI driver for ETRAX FS et al.
3 *
4 * Copyright (c) 2007 Axis Communications AB
5 *
6 * Author: Hans-Peter Nilsson, inspired by earlier work by
7 * Andre Spanberg but mostly by copying large parts of
8 * spi_s3c24xx_gpio.c, hence also:
9 * Copyright (c) 2006 Ben Dooks
10 * Copyright (c) 2006 Simtec Electronics
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18 #include <linux/types.h>
19 #include <linux/device.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi_bitbang.h>
22 #include <linux/delay.h>
23 #include <linux/platform_device.h>
24 #include <asm/io.h>
25 #include <asm/arch/board.h>
26
27 /* Our main driver state. */
28
29 struct crisv32_spi_hw_info {
30 struct crisv32_iopin sclk;
31 struct crisv32_iopin mosi;
32 struct crisv32_iopin miso;
33 struct crisv32_iopin cs;
34 };
35
36 /*
37 * The driver state hides behind the spi_bitbang state. We're
38 * responsible for allocating that, so we can get a little something
39 * for ourselves.
40 */
41
42 struct crisv32_spi_gpio_devdata {
43 struct spi_bitbang bitbang;
44 struct crisv32_spi_hw_info pins;
45 };
46
47 /* Helper function getting the driver state from a spi_device. */
48
49 static inline struct crisv32_spi_hw_info *spidev_to_hw(struct spi_device *spi)
50 {
51 struct crisv32_spi_gpio_devdata *dd = spi_master_get_devdata(spi->master);
52 return &dd->pins;
53 }
54
55 /* The SPI-bitbang functions: see spi_bitbang.h at EXPAND_BITBANG_TXRX. */
56
57 static inline void setsck(struct spi_device *spi, int is_on)
58 {
59 crisv32_io_set(&spidev_to_hw(spi)->sclk, is_on != 0);
60 }
61
62 static inline void setmosi(struct spi_device *spi, int is_on)
63 {
64 crisv32_io_set(&spidev_to_hw(spi)->mosi, is_on != 0);
65 }
66
67 static inline u32 getmiso(struct spi_device *spi)
68 {
69 return crisv32_io_rd(&spidev_to_hw(spi)->miso) != 0 ? 1 : 0;
70 }
71
72 #define spidelay(x) ndelay(x)
73
74 #define EXPAND_BITBANG_TXRX
75 #include <linux/spi/spi_bitbang.h>
76
77 /*
78 * SPI-bitbang word transmit-functions for the four SPI modes,
79 * dispatching to the inlined functions we just included.
80 */
81
82 static u32 crisv32_spi_gpio_txrx_mode0(struct spi_device *spi,
83 unsigned nsecs, u32 word, u8 bits)
84 {
85 return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
86 }
87
88 static u32 crisv32_spi_gpio_txrx_mode1(struct spi_device *spi,
89 unsigned nsecs, u32 word, u8 bits)
90 {
91 return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
92 }
93
94 static u32 crisv32_spi_gpio_txrx_mode2(struct spi_device *spi,
95 unsigned nsecs, u32 word, u8 bits)
96 {
97 return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
98 }
99
100 static u32 crisv32_spi_gpio_txrx_mode3(struct spi_device *spi,
101 unsigned nsecs, u32 word, u8 bits)
102 {
103 return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
104 }
105
106 /* SPI-bitbang chip-select function. */
107
108 static void crisv32_spi_gpio_chipselect(struct spi_device *spi, int value)
109 {
110 if (spi->mode & SPI_CS_HIGH)
111 crisv32_io_set(&spidev_to_hw(spi)->cs,
112 value == BITBANG_CS_ACTIVE ? 1 : 0);
113 else
114 crisv32_io_set(&spidev_to_hw(spi)->cs,
115 value == BITBANG_CS_ACTIVE ? 0 : 1);
116 }
117
118 /* Platform-device probe function. */
119
120 static int __devinit crisv32_spi_gpio_probe(struct platform_device *dev)
121 {
122 struct spi_master *master;
123 struct crisv32_spi_gpio_devdata *dd;
124 struct resource *res;
125 struct crisv32_spi_gpio_controller_data *gc;
126 int ret = 0;
127
128 /*
129 * We need to get the controller data as a hardware resource,
130 * or else it wouldn't be available until *after* the
131 * spi_bitbang_start call!
132 */
133 res = platform_get_resource_byname(dev, 0, "controller_data_ptr");
134 if (res == NULL) {
135 dev_err(&dev->dev, "can't get controller_data resource\n");
136 return -EIO;
137 }
138
139 gc = (struct crisv32_spi_gpio_controller_data *) res->start;
140
141 master = spi_alloc_master(&dev->dev, sizeof *dd);
142 if (master == NULL) {
143 dev_err(&dev->dev, "failed to allocate spi master\n");
144 ret = -ENOMEM;
145 goto err;
146 }
147
148 dd = spi_master_get_devdata(master);
149 platform_set_drvdata(dev, dd);
150
151 /*
152 * The device data asks for this driver, and holds the id
153 * number, which must be unique among the same-type devices.
154 * We use this as the number of this SPI bus.
155 */
156 master->bus_num = dev->id;
157
158 /*
159 * Allocate pins. Note that thus being allocated as GPIO, we
160 * don't have to deconfigure them at the end or if something
161 * fails.
162 */
163 if ((ret = crisv32_io_get_name(&dd->pins.cs, gc->cs)) != 0
164 || (ret = crisv32_io_get_name(&dd->pins.miso, gc->miso)) != 0
165 || (ret = crisv32_io_get_name(&dd->pins.mosi, gc->mosi)) != 0
166 || (ret = crisv32_io_get_name(&dd->pins.sclk, gc->sclk)) != 0)
167 goto err_no_pins;
168
169 /* Set directions of the SPI pins. */
170 crisv32_io_set_dir(&dd->pins.cs, crisv32_io_dir_out);
171 crisv32_io_set_dir(&dd->pins.sclk, crisv32_io_dir_out);
172 crisv32_io_set_dir(&dd->pins.miso, crisv32_io_dir_in);
173 crisv32_io_set_dir(&dd->pins.mosi, crisv32_io_dir_out);
174
175 /* Set state of the SPI pins. */
176 dev_dbg(&dev->dev, "cs.port 0x%x, pin: %d\n"
177 dd->pins.cs.port, dd->pins.cs.bit);
178
179 /*
180 * Can't use crisv32_spi_gpio_chipselect(spi, 1) here; we
181 * don't have a proper "spi" until after spi_bitbang_start.
182 */
183 crisv32_io_set(&dd->pins.cs, 1);
184 crisv32_io_set(&dd->pins.sclk, 0);
185 crisv32_io_set(&dd->pins.mosi, 0);
186
187 /* Setup SPI bitbang adapter hooks. */
188 dd->bitbang.master = spi_master_get(master);
189 dd->bitbang.chipselect = crisv32_spi_gpio_chipselect;
190
191 dd->bitbang.txrx_word[SPI_MODE_0] = crisv32_spi_gpio_txrx_mode0;
192 dd->bitbang.txrx_word[SPI_MODE_1] = crisv32_spi_gpio_txrx_mode1;
193 dd->bitbang.txrx_word[SPI_MODE_2] = crisv32_spi_gpio_txrx_mode2;
194 dd->bitbang.txrx_word[SPI_MODE_3] = crisv32_spi_gpio_txrx_mode3;
195
196 ret = spi_bitbang_start(&dd->bitbang);
197 if (ret)
198 goto err_no_bitbang;
199
200 printk (KERN_INFO "CRIS v32 SPI driver for GPIO"
201 " (cs: %s, miso: %s, mosi: %s, sclk: %s)\n",
202 gc->cs, gc->miso, gc->mosi, gc->sclk);
203
204 return 0;
205
206 err_no_bitbang:
207 spi_master_put(dd->bitbang.master);
208 err_no_pins:
209 platform_set_drvdata(dev, NULL);
210 err:
211 return ret;
212 }
213
214 /* Platform-device remove-function. */
215
216 static int __devexit crisv32_spi_gpio_remove(struct platform_device *dev)
217 {
218 struct crisv32_spi_gpio_devdata *dd = platform_get_drvdata(dev);
219 int ret;
220
221 ret = spi_bitbang_stop(&dd->bitbang);
222 if (ret != 0)
223 return ret;
224
225 spi_master_put(dd->bitbang.master);
226 platform_set_drvdata(dev, NULL);
227 return 0;
228 }
229
230 /*
231 * For the time being, there's no suspend/resume support to care
232 * about, so we let those handlers default to NULL.
233 */
234 static struct platform_driver crisv32_spi_gpio_drv = {
235 .probe = crisv32_spi_gpio_probe,
236 .remove = __devexit_p(crisv32_spi_gpio_remove),
237 .driver = {
238 .name = "spi_crisv32_gpio",
239 .owner = THIS_MODULE,
240 },
241 };
242
243 /* Module init function. */
244
245 static int __devinit crisv32_spi_gpio_init(void)
246 {
247 return platform_driver_register(&crisv32_spi_gpio_drv);
248 }
249
250 /* Module exit function. */
251
252 static void __devexit crisv32_spi_gpio_exit(void)
253 {
254 platform_driver_unregister(&crisv32_spi_gpio_drv);
255 }
256
257 module_init(crisv32_spi_gpio_init);
258 module_exit(crisv32_spi_gpio_exit);
259
260 MODULE_DESCRIPTION("CRIS v32 SPI-GPIO Driver");
261 MODULE_AUTHOR("Hans-Peter Nilsson, <hp@axis.com>");
262 MODULE_LICENSE("GPL");
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