1 #include <linux/ioport.h>
3 #include <rt305x_regs.h>
4 #include <rt305x_esw_platform.h>
6 #define RT305X_ESW_REG_FCT0 0x08
7 #define RT305X_ESW_REG_PFC1 0x14
8 #define RT305X_ESW_REG_PVIDC(_n) (0x48 + 4 * (_n))
9 #define RT305X_ESW_REG_VLANI(_n) (0x50 + 4 * (_n))
10 #define RT305X_ESW_REG_VMSC(_n) (0x70 + 4 * (_n))
11 #define RT305X_ESW_REG_FPA 0x84
12 #define RT305X_ESW_REG_SOCPC 0x8c
13 #define RT305X_ESW_REG_POC1 0x90
14 #define RT305X_ESW_REG_POC2 0x94
15 #define RT305X_ESW_REG_POC3 0x98
16 #define RT305X_ESW_REG_SGC 0x9c
17 #define RT305X_ESW_REG_PCR0 0xc0
18 #define RT305X_ESW_REG_PCR1 0xc4
19 #define RT305X_ESW_REG_FPA2 0xc8
20 #define RT305X_ESW_REG_FCT2 0xcc
21 #define RT305X_ESW_REG_SGC2 0xe4
23 #define RT305X_ESW_PCR0_WT_NWAY_DATA_S 16
24 #define RT305X_ESW_PCR0_WT_PHY_CMD BIT(13)
25 #define RT305X_ESW_PCR0_CPU_PHY_REG_S 8
27 #define RT305X_ESW_PCR1_WT_DONE BIT(0)
29 #define RT305X_ESW_PHY_TIMEOUT (5 * HZ)
33 struct rt305x_esw_platform_data
*pdata
;
37 ramips_esw_wr(struct rt305x_esw
*esw
, u32 val
, unsigned reg
)
39 __raw_writel(val
, esw
->base
+ reg
);
43 ramips_esw_rr(struct rt305x_esw
*esw
, unsigned reg
)
45 return __raw_readl(esw
->base
+ reg
);
49 mii_mgr_write(struct rt305x_esw
*esw
, u32 phy_addr
, u32 phy_register
,
52 unsigned long volatile t_start
= jiffies
;
57 if (!(ramips_esw_rr(esw
, RT305X_ESW_REG_PCR1
) &
58 RT305X_ESW_PCR1_WT_DONE
))
60 if(time_after(jiffies
, t_start
+ RT305X_ESW_PHY_TIMEOUT
))
69 (write_data
<< RT305X_ESW_PCR0_WT_NWAY_DATA_S
) |
70 (phy_register
<< RT305X_ESW_PCR0_CPU_PHY_REG_S
) |
71 (phy_addr
) | RT305X_ESW_PCR0_WT_PHY_CMD
,
77 if (ramips_esw_rr(esw
, RT305X_ESW_REG_PCR1
) &
78 RT305X_ESW_PCR1_WT_DONE
)
80 if(time_after(jiffies
, t_start
+ RT305X_ESW_PHY_TIMEOUT
))
88 printk(KERN_ERR
"ramips_eth: MDIO timeout\n");
93 rt305x_esw_hw_init(struct rt305x_esw
*esw
)
97 /* vodoo from original driver */
98 ramips_esw_wr(esw
, 0xC8A07850, RT305X_ESW_REG_FCT0
);
99 ramips_esw_wr(esw
, 0x00000000, RT305X_ESW_REG_SGC2
);
100 ramips_esw_wr(esw
, 0x00405555, RT305X_ESW_REG_PFC1
);
101 ramips_esw_wr(esw
, 0x00002001, RT305X_ESW_REG_VLANI(0));
102 ramips_esw_wr(esw
, 0x00007f7f, RT305X_ESW_REG_POC1
);
103 ramips_esw_wr(esw
, 0x00007f3f, RT305X_ESW_REG_POC3
);
104 ramips_esw_wr(esw
, 0x00d6500c, RT305X_ESW_REG_FCT2
);
105 ramips_esw_wr(esw
, 0x0008a301, RT305X_ESW_REG_SGC
);
106 ramips_esw_wr(esw
, 0x02404040, RT305X_ESW_REG_SOCPC
);
107 ramips_esw_wr(esw
, 0x00001002, RT305X_ESW_REG_PVIDC(2));
108 ramips_esw_wr(esw
, 0x3f502b28, RT305X_ESW_REG_FPA2
);
109 ramips_esw_wr(esw
, 0x00000000, RT305X_ESW_REG_FPA
);
111 mii_mgr_write(esw
, 0, 31, 0x8000);
112 for(i
= 0; i
< 5; i
++)
114 mii_mgr_write(esw
, i
, 0, 0x3100); //TX10 waveform coefficient
115 mii_mgr_write(esw
, i
, 26, 0x1601); //TX10 waveform coefficient
116 mii_mgr_write(esw
, i
, 29, 0x7058); //TX100/TX10 AD/DA current bias
117 mii_mgr_write(esw
, i
, 30, 0x0018); //TX100 slew rate control
120 mii_mgr_write(esw
, 0, 31, 0x0); //select global register
121 mii_mgr_write(esw
, 0, 22, 0x052f); //tune TP_IDL tail and head waveform
122 mii_mgr_write(esw
, 0, 17, 0x0fe0); //set TX10 signal amplitude threshold to minimum
123 mii_mgr_write(esw
, 0, 18, 0x40ba); //set squelch amplitude to higher threshold
124 mii_mgr_write(esw
, 0, 14, 0x65); //longer TP_IDL tail length
125 mii_mgr_write(esw
, 0, 31, 0x8000); //select local register
127 /* set default vlan */
128 ramips_esw_wr(esw
, 0x2001, RT305X_ESW_REG_VLANI(0));
129 ramips_esw_wr(esw
, 0x504f, RT305X_ESW_REG_VMSC(0));
133 rt305x_esw_probe(struct platform_device
*pdev
)
135 struct rt305x_esw_platform_data
*pdata
;
136 struct rt305x_esw
*esw
;
137 struct resource
*res
;
140 pdata
= pdev
->dev
.platform_data
;
144 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
146 dev_err(&pdev
->dev
, "no memory resource found\n");
150 esw
= kzalloc(sizeof (struct rt305x_esw
), GFP_KERNEL
);
152 dev_err(&pdev
->dev
, "no memory for private data\n");
156 esw
->base
= ioremap(res
->start
, resource_size(res
));
158 dev_err(&pdev
->dev
, "ioremap failed\n");
163 platform_set_drvdata(pdev
, esw
);
166 rt305x_esw_hw_init(esw
);
176 rt305x_esw_remove(struct platform_device
*pdev
)
178 struct rt305x_esw
*esw
;
180 esw
= platform_get_drvdata(pdev
);
182 platform_set_drvdata(pdev
, NULL
);
190 static struct platform_driver rt305x_esw_driver
= {
191 .probe
= rt305x_esw_probe
,
192 .remove
= rt305x_esw_remove
,
194 .name
= "rt305x-esw",
195 .owner
= THIS_MODULE
,
200 rt305x_esw_init(void)
202 return platform_driver_register(&rt305x_esw_driver
);
206 rt305x_esw_exit(void)
208 platform_driver_unregister(&rt305x_esw_driver
);