2 * Atheros AR71xx built-in ethernet mac driver
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Based on Atheros' AG7100 driver
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
16 #define AG71XX_MDIO_RETRY 1000
17 #define AG71XX_MDIO_DELAY 5
19 static inline void ag71xx_mdio_wr(struct ag71xx_mdio
*am
, unsigned reg
,
24 r
= am
->mdio_base
+ reg
;
25 __raw_writel(value
, r
);
28 (void) __raw_readl(r
);
31 static inline u32
ag71xx_mdio_rr(struct ag71xx_mdio
*am
, unsigned reg
)
33 return __raw_readl(am
->mdio_base
+ reg
);
36 static void ag71xx_mdio_dump_regs(struct ag71xx_mdio
*am
)
38 DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
40 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CFG
),
41 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CMD
),
42 ag71xx_mdio_rr(am
, AG71XX_REG_MII_ADDR
));
43 DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
45 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CTRL
),
46 ag71xx_mdio_rr(am
, AG71XX_REG_MII_STATUS
),
47 ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
));
50 int ag71xx_mdio_mii_read(struct ag71xx_mdio
*am
, int addr
, int reg
)
55 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_WRITE
);
56 ag71xx_mdio_wr(am
, AG71XX_REG_MII_ADDR
,
57 ((addr
& 0xff) << MII_ADDR_SHIFT
) | (reg
& 0xff));
58 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_READ
);
60 i
= AG71XX_MDIO_RETRY
;
61 while (ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
) & MII_IND_BUSY
) {
63 printk(KERN_ERR
"%s: mii_read timed out\n",
68 udelay(AG71XX_MDIO_DELAY
);
71 ret
= ag71xx_mdio_rr(am
, AG71XX_REG_MII_STATUS
) & 0xffff;
72 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_WRITE
);
74 DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr
, reg
, ret
);
80 void ag71xx_mdio_mii_write(struct ag71xx_mdio
*am
, int addr
, int reg
, u16 val
)
84 DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr
, reg
, val
);
86 ag71xx_mdio_wr(am
, AG71XX_REG_MII_ADDR
,
87 ((addr
& 0xff) << MII_ADDR_SHIFT
) | (reg
& 0xff));
88 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CTRL
, val
);
90 i
= AG71XX_MDIO_RETRY
;
91 while (ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
) & MII_IND_BUSY
) {
93 printk(KERN_ERR
"%s: mii_write timed out\n",
97 udelay(AG71XX_MDIO_DELAY
);
101 static int ag71xx_mdio_reset(struct mii_bus
*bus
)
103 struct ag71xx_mdio
*am
= bus
->priv
;
106 if (am
->pdata
->is_ar7240
)
107 t
= MII_CFG_CLK_DIV_6
;
109 t
= MII_CFG_CLK_DIV_28
;
111 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CFG
, t
| MII_CFG_RESET
);
114 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CFG
, t
);
120 static int ag71xx_mdio_read(struct mii_bus
*bus
, int addr
, int reg
)
122 struct ag71xx_mdio
*am
= bus
->priv
;
124 if (am
->pdata
->is_ar7240
)
125 return ar7240sw_phy_read(bus
, addr
, reg
);
127 return ag71xx_mdio_mii_read(am
, addr
, reg
);
130 static int ag71xx_mdio_write(struct mii_bus
*bus
, int addr
, int reg
, u16 val
)
132 struct ag71xx_mdio
*am
= bus
->priv
;
134 if (am
->pdata
->is_ar7240
)
135 ar7240sw_phy_write(bus
, addr
, reg
, val
);
137 ag71xx_mdio_mii_write(am
, addr
, reg
, val
);
141 static int __devinit
ag71xx_mdio_probe(struct platform_device
*pdev
)
143 struct ag71xx_mdio_platform_data
*pdata
;
144 struct ag71xx_mdio
*am
;
145 struct resource
*res
;
149 pdata
= pdev
->dev
.platform_data
;
151 dev_err(&pdev
->dev
, "no platform data specified\n");
155 am
= kzalloc(sizeof(*am
), GFP_KERNEL
);
163 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
165 dev_err(&pdev
->dev
, "no iomem resource found\n");
170 am
->mdio_base
= ioremap_nocache(res
->start
, res
->end
- res
->start
+ 1);
171 if (!am
->mdio_base
) {
172 dev_err(&pdev
->dev
, "unable to ioremap registers\n");
177 am
->mii_bus
= mdiobus_alloc();
178 if (am
->mii_bus
== NULL
) {
183 am
->mii_bus
->name
= "ag71xx_mdio";
184 am
->mii_bus
->read
= ag71xx_mdio_read
;
185 am
->mii_bus
->write
= ag71xx_mdio_write
;
186 am
->mii_bus
->reset
= ag71xx_mdio_reset
;
187 am
->mii_bus
->irq
= am
->mii_irq
;
188 am
->mii_bus
->priv
= am
;
189 am
->mii_bus
->parent
= &pdev
->dev
;
190 snprintf(am
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s", dev_name(&pdev
->dev
));
191 am
->mii_bus
->phy_mask
= pdata
->phy_mask
;
193 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
194 am
->mii_irq
[i
] = PHY_POLL
;
196 ag71xx_mdio_wr(am
, AG71XX_REG_MAC_CFG1
, 0);
198 err
= mdiobus_register(am
->mii_bus
);
202 ag71xx_mdio_dump_regs(am
);
204 platform_set_drvdata(pdev
, am
);
208 mdiobus_free(am
->mii_bus
);
210 iounmap(am
->mdio_base
);
217 static int __devexit
ag71xx_mdio_remove(struct platform_device
*pdev
)
219 struct ag71xx_mdio
*am
= platform_get_drvdata(pdev
);
222 mdiobus_unregister(am
->mii_bus
);
223 mdiobus_free(am
->mii_bus
);
224 iounmap(am
->mdio_base
);
226 platform_set_drvdata(pdev
, NULL
);
232 static struct platform_driver ag71xx_mdio_driver
= {
233 .probe
= ag71xx_mdio_probe
,
234 .remove
= __exit_p(ag71xx_mdio_remove
),
236 .name
= "ag71xx-mdio",
240 int __init
ag71xx_mdio_driver_init(void)
242 return platform_driver_register(&ag71xx_mdio_driver
);
245 void ag71xx_mdio_driver_exit(void)
247 platform_driver_unregister(&ag71xx_mdio_driver
);