target/linux/s3c24xx/patches-2.6.24/1026-s3c24xx-nand-largepage.patch.patch

   1 From cddfb6f606768265f2b36658761ea9467f098f0a Mon Sep 17 00:00:00 2001
   2 From: mokopatches <mokopatches@openmoko.org>
   3 Date: Fri, 4 Apr 2008 11:33:44 +0100
   4 Subject: [PATCH] s3c24xx-nand-largepage.patch
   5  MTD: S3C24XX large page NAND support
   6
   7 This adds support for using large page NAND devices
   8 with the S3C24XX NAND controller. This also adds the
   9 file Documentation/arm/Samsung-S3C24XX/NAND.txt to
  10 describe the differences.
  11
  12 Signed-off-by: Ben Dooks <ben-linux@fluff.org>
  13 ---
  14  Documentation/arm/Samsung-S3C24XX/NAND.txt     |   30 +++++++++++++++++++
  15  Documentation/arm/Samsung-S3C24XX/Overview.txt |    2 +
  16  drivers/mtd/nand/s3c2410.c                     |   38 ++++++++++++++++++++---
  17  3 files changed, 65 insertions(+), 5 deletions(-)
  18  create mode 100644 Documentation/arm/Samsung-S3C24XX/NAND.txt
  19
  20 diff --git a/Documentation/arm/Samsung-S3C24XX/NAND.txt b/Documentation/arm/Samsung-S3C24XX/NAND.txt
  21 new file mode 100644
  22 index 0000000..bc478a3
  23 --- /dev/null
  24 +++ b/Documentation/arm/Samsung-S3C24XX/NAND.txt
  25 @@ -0,0 +1,30 @@
  26 +                       S3C24XX NAND Support
  27 +                       ====================
  28 +
  29 +Introduction
  30 +------------
  31 +
  32 +Small Page NAND
  33 +---------------
  34 +
  35 +The driver uses a 512 byte (1 page) ECC code for this setup. The
  36 +ECC code is not directly compatible with the default kernel ECC
  37 +code, so the driver enforces its own OOB layout and ECC parameters
  38 +
  39 +Large Page NAND
  40 +---------------
  41 +
  42 +The driver is capable of handling NAND flash with a 2KiB page
  43 +size, with support for hardware ECC generation and correction.
  44 +
  45 +Unlike the 512byte page mode, the driver generates ECC data for
  46 +each 256 byte block in an 2KiB page. This means that more than
  47 +one error in a page can be rectified. It also means that the
  48 +OOB layout remains the default kernel layout for these flashes.
  49 +
  50 +
  51 +Document Author
  52 +---------------
  53 +
  54 +Ben Dooks, Copyright 2007 Simtec Electronics
  55 +
  56 diff --git a/Documentation/arm/Samsung-S3C24XX/Overview.txt b/Documentation/arm/Samsung-S3C24XX/Overview.txt
  57 index c31b76f..d04e1e3 100644
  58 --- a/Documentation/arm/Samsung-S3C24XX/Overview.txt
  59 +++ b/Documentation/arm/Samsung-S3C24XX/Overview.txt
  60 @@ -156,6 +156,8 @@ NAND
  61    controller. If there are any problems the latest linux-mtd
  62    code can be found from http://www.linux-mtd.infradead.org/
  63
  64 +  For more information see Documentation/arm/Samsung-S3C24XX/NAND.txt
  65 +
  66
  67  Serial
  68  ------
  69 diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
  70 index 770306c..5c1c09d 100644
  71 --- a/drivers/mtd/nand/s3c2410.c
  72 +++ b/drivers/mtd/nand/s3c2410.c
  73 @@ -473,7 +473,7 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u
  74         ecc_code[1] = ecc >> 8;
  75         ecc_code[2] = ecc >> 16;
  76
  77 -       pr_debug("%s: returning ecc %06lx\n", __func__, ecc);
  78 +       pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
  79
  80         return 0;
  81  }
  82 @@ -662,9 +662,6 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
  83                 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
  84                 chip->ecc.correct   = s3c2410_nand_correct_data;
  85                 chip->ecc.mode      = NAND_ECC_HW;
  86 -               chip->ecc.size      = 512;
  87 -               chip->ecc.bytes     = 3;
  88 -               chip->ecc.layout    = &nand_hw_eccoob;
  89
  90                 switch (info->cpu_type) {
  91                 case TYPE_S3C2410:
  92 @@ -688,6 +685,34 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
  93         }
  94  }
  95
  96 +/* s3c2410_nand_update_chip
  97 + *
  98 + * post-probe chip update, to change any items, such as the
  99 + * layout for large page nand
 100 + */
 101 +
 102 +static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
 103 +                                    struct s3c2410_nand_mtd *nmtd)
 104 +{
 105 +       struct nand_chip *chip = &nmtd->chip;
 106 +
 107 +       printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift);
 108 +
 109 +       if (hardware_ecc) {
 110 +               /* change the behaviour depending on wether we are using
 111 +                * the large or small page nand device */
 112 +
 113 +               if (chip->page_shift > 10) {
 114 +                       chip->ecc.size      = 256;
 115 +                       chip->ecc.bytes     = 3;
 116 +               } else {
 117 +                       chip->ecc.size      = 512;
 118 +                       chip->ecc.bytes     = 3;
 119 +                       chip->ecc.layout    = &nand_hw_eccoob;
 120 +               }
 121 +       }
 122 +}
 123 +
 124  /* s3c2410_nand_probe
 125   *
 126   * called by device layer when it finds a device matching
 127 @@ -794,9 +819,12 @@ static int s3c24xx_nand_probe(struct platform_device *pdev,
 128
 129                 s3c2410_nand_init_chip(info, nmtd, sets);
 130
 131 -               nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
 132 +               nmtd->scan_res = nand_scan_ident(&nmtd->mtd,
 133 +                                                (sets) ? sets->nr_chips : 1);
 134
 135                 if (nmtd->scan_res == 0) {
 136 +                       s3c2410_nand_update_chip(info, nmtd);
 137 +                       nand_scan_tail(&nmtd->mtd);
 138                         s3c2410_nand_add_partition(info, nmtd, sets);
 139                 }
 140
 141 --
 142 1.5.6.5
 143