[adm5120] add USB drivers for the NFS-101U/WU profiles
[openwrt.git] / target / linux / s3c24xx / patches-2.6.24 / 1236-add-limit-sdcard-clk-cmdline.patch.patch
1 From ef2376d29e996d9d21a9e5798cb88aa73f734c83 Mon Sep 17 00:00:00 2001
2 From: Andy Green <andy@openmoko.com>
3 Date: Thu, 17 Jul 2008 10:02:35 +0100
4 Subject: [PATCH] add-limit-sdcard-clk-cmdline.patch
5
6 This patch allows you to control the maximum clock rate that will
7 be selected for SD Card access, from the kernel commandline using
8
9 glamo_mci.sd_max_clk=10000000
10
11 and also from
12
13 echo 10000000 > /sys/module/glamo_mci/parameters/sd_max_clk
14
15 although you have to suspend and resume to make the limit operational
16 on the actual SD_CLK line.
17
18 Clocks that are possible are divided down from ~50MHz, so 25000000,
19 16666666, 12500000, 10000000, etc. With Freerunner A5 revision that
20 has 100R series resistors in SD Card signals, I didn't get reliable
21 operation above 16MHz. With A6 revision the series resistors went
22 down to 75R, maybe it can work at 25MHz.
23
24 Reducing the clock rate is something to try if you find that your
25 SD Card is not communicating properly with the default speed.
26
27 Signed-off-by: Andy Green <andy@openmoko.com>
28 ---
29 drivers/mfd/glamo/glamo-mci.c | 38 +++++++++++++++++++++++++++++---------
30 1 files changed, 29 insertions(+), 9 deletions(-)
31
32 diff --git a/drivers/mfd/glamo/glamo-mci.c b/drivers/mfd/glamo/glamo-mci.c
33 index 350b47d..6729244 100644
34 --- a/drivers/mfd/glamo/glamo-mci.c
35 +++ b/drivers/mfd/glamo/glamo-mci.c
36 @@ -40,6 +40,24 @@ static spinlock_t clock_lock;
37
38 static void glamo_mci_send_request(struct mmc_host *mmc);
39
40 +/*
41 + * Max SD clock rate
42 + *
43 + * held at /(3 + 1) due to concerns of 100R recommended series resistor
44 + * allows 16MHz @ 4-bit --> 8MBytes/sec raw
45 + *
46 + * you can override this on kernel commandline using
47 + *
48 + * glamo_mci.sd_max_clk=10000000
49 + *
50 + * for example
51 + */
52 +
53 +static int sd_max_clk = 50000000 / 3;
54 +module_param(sd_max_clk, int, 0644);
55 +
56 +
57 +
58 unsigned char CRC7(u8 * pu8, int cnt)
59 {
60 u8 crc = 0;
61 @@ -676,9 +694,9 @@ static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
62 (ios->power_mode == MMC_POWER_UP)) {
63 dev_info(&host->pdev->dev,
64 "powered (vdd = %d) clk: %lukHz div=%d (req: %ukHz). "
65 - "Bus width=%d\n",ios->vdd,
66 - host->real_rate / 1000, host->real_rate,
67 - ios->clock / 1000, ios->bus_width);
68 + "Bus width=%d\n",(int)ios->vdd,
69 + host->real_rate / 1000, (int)host->clk_div,
70 + ios->clock / 1000, (int)ios->bus_width);
71 } else
72 dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
73
74 @@ -800,11 +818,7 @@ static int glamo_mci_probe(struct platform_device *pdev)
75 MMC_CAP_MMC_HIGHSPEED |
76 MMC_CAP_SD_HIGHSPEED;
77 mmc->f_min = host->clk_rate / 256;
78 - /*
79 - * held at /4 due to concerns of 100R recommended series resistor
80 - * allows 16MHz @ 4-bit --> 8MBytes/sec raw
81 - */
82 - mmc->f_max = host->clk_rate / 3;
83 + mmc->f_max = sd_max_clk;
84
85 mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
86 mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
87 @@ -866,12 +880,18 @@ static int glamo_mci_suspend(struct platform_device *dev, pm_message_t state)
88 {
89 struct mmc_host *mmc = platform_get_drvdata(dev);
90 struct glamo_mci_host *host = mmc_priv(mmc);
91 + int ret;
92
93 host->suspending++;
94 if (host->pdata->mci_all_dependencies_resumed)
95 (host->pdata->mci_suspending)(dev);
96
97 - return mmc_suspend_host(mmc, state);
98 + ret = mmc_suspend_host(mmc, state);
99 +
100 + /* so that when we resume, we use any modified max rate */
101 + mmc->f_max = sd_max_clk;
102 +
103 + return ret;
104 }
105
106 int glamo_mci_resume(struct platform_device *dev)
107 --
108 1.5.6.5
109
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