target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h

   1 /*
   2  * Ralink RT305x SoC specific definitions
   3  *
   4  * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * Parts of this file are based on Ralink's 2.6.21 BSP
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License version 2 as published
  10  * by the Free Software Foundation.
  11  */
  12
  13 #ifndef _RT305X_H_
  14 #define _RT305X_H_
  15
  16 #include <linux/init.h>
  17 #include <linux/io.h>
  18
  19 void rt305x_detect_sys_type(void) __init;
  20
  21 #define RT305X_SYS_TYPE_LEN     64
  22 extern unsigned char rt305x_sys_type[RT305X_SYS_TYPE_LEN];
  23
  24 void rt305x_detect_sys_freq(void) __init;
  25
  26 extern unsigned long rt305x_cpu_freq;
  27 extern unsigned long rt305x_sys_freq;
  28
  29 #define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
  30 #define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
  31
  32 #define RT305X_CPU_IRQ_BASE     0
  33 #define RT305X_INTC_IRQ_BASE    8
  34 #define RT305X_INTC_IRQ_COUNT   32
  35 #define RT305X_GPIO_IRQ_BASE    40
  36
  37 #define RT305X_CPU_IRQ_INTC     (RT305X_CPU_IRQ_BASE + 2)
  38 #define RT305X_CPU_IRQ_FE       (RT305X_CPU_IRQ_BASE + 5)
  39 #define RT305X_CPU_IRQ_WNIC     (RT305X_CPU_IRQ_BASE + 6)
  40 #define RT305X_CPU_IRQ_COUNTER  (RT305X_CPU_IRQ_BASE + 7)
  41
  42 #define RT305X_INTC_IRQ_SYSCTL  (RT305X_INTC_IRQ_BASE + 0)
  43 #define RT305X_INTC_IRQ_TIMER0  (RT305X_INTC_IRQ_BASE + 1)
  44 #define RT305X_INTC_IRQ_TIMER1  (RT305X_INTC_IRQ_BASE + 2)
  45 #define RT305X_INTC_IRQ_IA      (RT305X_INTC_IRQ_BASE + 3)
  46 #define RT305X_INTC_IRQ_PCM     (RT305X_INTC_IRQ_BASE + 4)
  47 #define RT305X_INTC_IRQ_UART0   (RT305X_INTC_IRQ_BASE + 5)
  48 #define RT305X_INTC_IRQ_PIO     (RT305X_INTC_IRQ_BASE + 6)
  49 #define RT305X_INTC_IRQ_DMA     (RT305X_INTC_IRQ_BASE + 7)
  50 #define RT305X_INTC_IRQ_NAND    (RT305X_INTC_IRQ_BASE + 8)
  51 #define RT305X_INTC_IRQ_PERFC   (RT305X_INTC_IRQ_BASE + 9)
  52 #define RT305X_INTC_IRQ_I2S     (RT305X_INTC_IRQ_BASE + 10)
  53 #define RT305X_INTC_IRQ_UART1   (RT305X_INTC_IRQ_BASE + 12)
  54 #define RT305X_INTC_IRQ_ESW     (RT305X_INTC_IRQ_BASE + 17)
  55 #define RT305X_INTC_IRQ_OTG     (RT305X_INTC_IRQ_BASE + 18)
  56
  57 extern void __iomem *rt305x_sysc_base;
  58 extern void __iomem *rt305x_memc_base;
  59
  60 static inline void rt305x_sysc_wr(u32 val, unsigned reg)
  61 {
  62         __raw_writel(val, rt305x_sysc_base + reg);
  63 }
  64
  65 static inline u32 rt305x_sysc_rr(unsigned reg)
  66 {
  67         return __raw_readl(rt305x_sysc_base + reg);
  68 }
  69
  70 static inline void rt305x_memc_wr(u32 val, unsigned reg)
  71 {
  72         __raw_writel(val, rt305x_memc_base + reg);
  73 }
  74
  75 static inline u32 rt305x_memc_rr(unsigned reg)
  76 {
  77         return __raw_readl(rt305x_memc_base + reg);
  78 }
  79
  80 #endif /* _RT305X_H_ */