target/linux/xburst/patches-2.6.34/051-fb.patch

   1 From bde0c6e017734b3164f5e3517d8e9373433b0cee Mon Sep 17 00:00:00 2001
   2 From: Lars-Peter Clausen <lars@metafoo.de>
   3 Date: Sat, 24 Apr 2010 12:13:58 +0200
   4 Subject: [PATCH] Add jz4740 framebuffer driver
   5
   6 ---
   7  drivers/video/Kconfig     |    9 +
   8  drivers/video/Makefile    |    1 +
   9  drivers/video/jz4740_fb.c |  822 +++++++++++++++++++++++++++++++++++++++++++++
  10  include/linux/jz4740_fb.h |   58 ++++
  11  4 files changed, 890 insertions(+), 0 deletions(-)
  12  create mode 100644 drivers/video/jz4740_fb.c
  13  create mode 100644 include/linux/jz4740_fb.h
  14
  15 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
  16 index 6e16244..14647f0 100644
  17 --- a/drivers/video/Kconfig
  18 +++ b/drivers/video/Kconfig
  19 @@ -2214,6 +2214,15 @@ config FB_BROADSHEET
  20           and could also have been called by other names when coupled with
  21           a bridge adapter.
  22
  23 +config FB_JZ4740
  24 +       tristate "JZ47420/JZ4740 LCD framebuffer support"
  25 +       depends on FB
  26 +       select FB_SYS_FILLRECT
  27 +       select FB_SYS_COPYAREA
  28 +       select FB_SYS_IMAGEBLIT
  29 +       help
  30 +         Framebuffer support for the JZ4720 and JZ4740 SoC.
  31 +
  32  source "drivers/video/omap/Kconfig"
  33  source "drivers/video/omap2/Kconfig"
  34
  35 diff --git a/drivers/video/Makefile b/drivers/video/Makefile
  36 index ddc2af2..f56a9ca 100644
  37 --- a/drivers/video/Makefile
  38 +++ b/drivers/video/Makefile
  39 @@ -131,6 +131,7 @@ obj-$(CONFIG_FB_CARMINE)          += carminefb.o
  40  obj-$(CONFIG_FB_MB862XX)         += mb862xx/
  41  obj-$(CONFIG_FB_MSM)              += msm/
  42  obj-$(CONFIG_FB_NUC900)           += nuc900fb.o
  43 +obj-$(CONFIG_FB_JZ4740)                  += jz4740_fb.o
  44
  45  # Platform or fallback drivers go here
  46  obj-$(CONFIG_FB_UVESA)            += uvesafb.o
  47 diff --git a/drivers/video/jz4740_fb.c b/drivers/video/jz4740_fb.c
  48 new file mode 100644
  49 index 0000000..8bb0cb4
  50 --- /dev/null
  51 +++ b/drivers/video/jz4740_fb.c
  52 @@ -0,0 +1,822 @@
  53 +/*
  54 + *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
  55 + *             JZ4740 SoC LCD framebuffer driver
  56 + *
  57 + *  This program is free software; you can redistribute         it and/or modify it
  58 + *  under  the terms of         the GNU General  Public License as published by the
  59 + *  Free Software Foundation;  either version 2 of the License, or (at your
  60 + *  option) any later version.
  61 + *
  62 + *  You should have received a copy of the  GNU General Public License along
  63 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
  64 + *  675 Mass Ave, Cambridge, MA 02139, USA.
  65 + *
  66 + */
  67 +
  68 +#include <linux/kernel.h>
  69 +#include <linux/module.h>
  70 +#include <linux/mutex.h>
  71 +#include <linux/platform_device.h>
  72 +
  73 +#include <linux/clk.h>
  74 +#include <linux/delay.h>
  75 +
  76 +#include <linux/console.h>
  77 +#include <linux/fb.h>
  78 +
  79 +#include <linux/dma-mapping.h>
  80 +
  81 +#include <linux/jz4740_fb.h>
  82 +#include <asm/mach-jz4740/gpio.h>
  83 +
  84 +#define JZ_REG_LCD_CFG         0x00
  85 +#define JZ_REG_LCD_VSYNC       0x04
  86 +#define JZ_REG_LCD_HSYNC       0x08
  87 +#define JZ_REG_LCD_VAT         0x0C
  88 +#define JZ_REG_LCD_DAH         0x10
  89 +#define JZ_REG_LCD_DAV         0x14
  90 +#define JZ_REG_LCD_PS          0x18
  91 +#define JZ_REG_LCD_CLS         0x1C
  92 +#define JZ_REG_LCD_SPL         0x20
  93 +#define JZ_REG_LCD_REV         0x24
  94 +#define JZ_REG_LCD_CTRL                0x30
  95 +#define JZ_REG_LCD_STATE       0x34
  96 +#define JZ_REG_LCD_IID         0x38
  97 +#define JZ_REG_LCD_DA0         0x40
  98 +#define JZ_REG_LCD_SA0         0x44
  99 +#define JZ_REG_LCD_FID0                0x48
 100 +#define JZ_REG_LCD_CMD0                0x4C
 101 +#define JZ_REG_LCD_DA1         0x50
 102 +#define JZ_REG_LCD_SA1         0x54
 103 +#define JZ_REG_LCD_FID1                0x58
 104 +#define JZ_REG_LCD_CMD1                0x5C
 105 +
 106 +#define JZ_LCD_CFG_SLCD                        BIT(31)
 107 +#define JZ_LCD_CFG_PS_DISABLE          BIT(23)
 108 +#define JZ_LCD_CFG_CLS_DISABLE         BIT(22)
 109 +#define JZ_LCD_CFG_SPL_DISABLE         BIT(21)
 110 +#define JZ_LCD_CFG_REV_DISABLE         BIT(20)
 111 +#define JZ_LCD_CFG_HSYNCM              BIT(19)
 112 +#define JZ_LCD_CFG_PCLKM               BIT(18)
 113 +#define JZ_LCD_CFG_INV                 BIT(17)
 114 +#define JZ_LCD_CFG_SYNC_DIR            BIT(16)
 115 +#define JZ_LCD_CFG_PS_POLARITY         BIT(15)
 116 +#define JZ_LCD_CFG_CLS_POLARITY                BIT(14)
 117 +#define JZ_LCD_CFG_SPL_POLARITY                BIT(13)
 118 +#define JZ_LCD_CFG_REV_POLARITY                BIT(12)
 119 +#define JZ_LCD_CFG_HSYNC_ACTIVE_LOW    BIT(11)
 120 +#define JZ_LCD_CFG_PCLK_FALLING_EDGE   BIT(10)
 121 +#define JZ_LCD_CFG_DE_ACTIVE_LOW       BIT(9)
 122 +#define JZ_LCD_CFG_VSYNC_ACTIVE_LOW    BIT(8)
 123 +#define JZ_LCD_CFG_18_BIT              BIT(7)
 124 +#define JZ_LCD_CFG_PDW                 (BIT(5) | BIT(4))
 125 +#define JZ_LCD_CFG_MODE_MASK 0xf
 126 +
 127 +#define JZ_LCD_CTRL_BURST_4            (0x0 << 28)
 128 +#define JZ_LCD_CTRL_BURST_8            (0x1 << 28)
 129 +#define JZ_LCD_CTRL_BURST_16           (0x2 << 28)
 130 +#define JZ_LCD_CTRL_RGB555             BIT(27)
 131 +#define JZ_LCD_CTRL_OFUP               BIT(26)
 132 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_16   (0x0 << 24)
 133 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_4    (0x1 << 24)
 134 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_2    (0x2 << 24)
 135 +#define JZ_LCD_CTRL_PDD_MASK           (0xff << 16)
 136 +#define JZ_LCD_CTRL_EOF_IRQ            BIT(13)
 137 +#define JZ_LCD_CTRL_SOF_IRQ            BIT(12)
 138 +#define JZ_LCD_CTRL_OFU_IRQ            BIT(11)
 139 +#define JZ_LCD_CTRL_IFU0_IRQ           BIT(10)
 140 +#define JZ_LCD_CTRL_IFU1_IRQ           BIT(9)
 141 +#define JZ_LCD_CTRL_DD_IRQ             BIT(8)
 142 +#define JZ_LCD_CTRL_QDD_IRQ            BIT(7)
 143 +#define JZ_LCD_CTRL_REVERSE_ENDIAN     BIT(6)
 144 +#define JZ_LCD_CTRL_LSB_FISRT          BIT(5)
 145 +#define JZ_LCD_CTRL_DISABLE            BIT(4)
 146 +#define JZ_LCD_CTRL_ENABLE             BIT(3)
 147 +#define JZ_LCD_CTRL_BPP_1              0x0
 148 +#define JZ_LCD_CTRL_BPP_2              0x1
 149 +#define JZ_LCD_CTRL_BPP_4              0x2
 150 +#define JZ_LCD_CTRL_BPP_8              0x3
 151 +#define JZ_LCD_CTRL_BPP_15_16          0x4
 152 +#define JZ_LCD_CTRL_BPP_18_24          0x5
 153 +
 154 +#define JZ_LCD_CMD_SOF_IRQ BIT(15)
 155 +#define JZ_LCD_CMD_EOF_IRQ BIT(16)
 156 +#define JZ_LCD_CMD_ENABLE_PAL BIT(12)
 157 +
 158 +#define JZ_LCD_SYNC_MASK 0x3ff
 159 +
 160 +#define JZ_LCD_STATE_DISABLED BIT(0)
 161 +
 162 +struct jzfb_framedesc {
 163 +       uint32_t next;
 164 +       uint32_t addr;
 165 +       uint32_t id;
 166 +       uint32_t cmd;
 167 +} __attribute__((packed));
 168 +
 169 +struct jzfb {
 170 +       struct fb_info *fb;
 171 +       struct platform_device *pdev;
 172 +       void __iomem *base;
 173 +       struct resource *mem;
 174 +       struct jz4740_fb_platform_data *pdata;
 175 +
 176 +       size_t vidmem_size;
 177 +       void *vidmem;
 178 +       dma_addr_t vidmem_phys;
 179 +       struct jzfb_framedesc *framedesc;
 180 +       dma_addr_t framedesc_phys;
 181 +
 182 +       struct clk *ldclk;
 183 +       struct clk *lpclk;
 184 +
 185 +       unsigned is_enabled:1;
 186 +       struct mutex lock;
 187 +
 188 +       uint32_t pseudo_palette[16];
 189 +};
 190 +
 191 +static struct fb_fix_screeninfo jzfb_fix __devinitdata = {
 192 +       .id             = "JZ4740 FB",
 193 +       .type           = FB_TYPE_PACKED_PIXELS,
 194 +       .visual         = FB_VISUAL_TRUECOLOR,
 195 +       .xpanstep       = 0,
 196 +       .ypanstep       = 0,
 197 +       .ywrapstep      = 0,
 198 +       .accel          = FB_ACCEL_NONE,
 199 +};
 200 +
 201 +const static struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = {
 202 +       JZ_GPIO_BULK_PIN(LCD_PCLK),
 203 +       JZ_GPIO_BULK_PIN(LCD_HSYNC),
 204 +       JZ_GPIO_BULK_PIN(LCD_VSYNC),
 205 +       JZ_GPIO_BULK_PIN(LCD_DE),
 206 +       JZ_GPIO_BULK_PIN(LCD_PS),
 207 +       JZ_GPIO_BULK_PIN(LCD_REV),
 208 +};
 209 +
 210 +const static struct jz_gpio_bulk_request jz_lcd_data_pins[] = {
 211 +       JZ_GPIO_BULK_PIN(LCD_DATA0),
 212 +       JZ_GPIO_BULK_PIN(LCD_DATA1),
 213 +       JZ_GPIO_BULK_PIN(LCD_DATA2),
 214 +       JZ_GPIO_BULK_PIN(LCD_DATA3),
 215 +       JZ_GPIO_BULK_PIN(LCD_DATA4),
 216 +       JZ_GPIO_BULK_PIN(LCD_DATA5),
 217 +       JZ_GPIO_BULK_PIN(LCD_DATA6),
 218 +       JZ_GPIO_BULK_PIN(LCD_DATA7),
 219 +       JZ_GPIO_BULK_PIN(LCD_DATA8),
 220 +       JZ_GPIO_BULK_PIN(LCD_DATA9),
 221 +       JZ_GPIO_BULK_PIN(LCD_DATA10),
 222 +       JZ_GPIO_BULK_PIN(LCD_DATA11),
 223 +       JZ_GPIO_BULK_PIN(LCD_DATA12),
 224 +       JZ_GPIO_BULK_PIN(LCD_DATA13),
 225 +       JZ_GPIO_BULK_PIN(LCD_DATA14),
 226 +       JZ_GPIO_BULK_PIN(LCD_DATA15),
 227 +       JZ_GPIO_BULK_PIN(LCD_DATA16),
 228 +       JZ_GPIO_BULK_PIN(LCD_DATA17),
 229 +};
 230 +
 231 +static unsigned int jzfb_num_ctrl_pins(struct jzfb *jzfb)
 232 +{
 233 +       unsigned int num;
 234 +
 235 +       switch (jzfb->pdata->lcd_type) {
 236 +       case JZ_LCD_TYPE_GENERIC_16_BIT:
 237 +               num = 4;
 238 +               break;
 239 +       case JZ_LCD_TYPE_GENERIC_18_BIT:
 240 +               num = 4;
 241 +               break;
 242 +       case JZ_LCD_TYPE_8BIT_SERIAL:
 243 +               num = 3;
 244 +               break;
 245 +       default:
 246 +               num = 0;
 247 +               break;
 248 +       }
 249 +       return num;
 250 +}
 251 +
 252 +static unsigned int jzfb_num_data_pins(struct jzfb *jzfb)
 253 +{
 254 +       unsigned int num;
 255 +
 256 +       switch (jzfb->pdata->lcd_type) {
 257 +       case JZ_LCD_TYPE_GENERIC_16_BIT:
 258 +               num = 16;
 259 +               break;
 260 +       case JZ_LCD_TYPE_GENERIC_18_BIT:
 261 +               num = 18;
 262 +               break;
 263 +       case JZ_LCD_TYPE_8BIT_SERIAL:
 264 +               num = 8;
 265 +               break;
 266 +       default:
 267 +               num = 0;
 268 +               break;
 269 +       }
 270 +       return num;
 271 +}
 272 +
 273 +static int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 274 +                       unsigned blue, unsigned transp, struct fb_info *fb)
 275 +{
 276 +       uint32_t color;
 277 +
 278 +       if (regno >= 16)
 279 +               return -EINVAL;
 280 +
 281 +#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
 282 +       red = CNVT_TOHW(red, fb->var.red.length);
 283 +       green = CNVT_TOHW(green, fb->var.green.length);
 284 +       blue = CNVT_TOHW(blue, fb->var.blue.length);
 285 +       transp = CNVT_TOHW(transp, fb->var.transp.length);
 286 +#undef CNVT_TOHW
 287 +
 288 +       color = (red << fb->var.red.offset) |
 289 +               (green << fb->var.green.offset) |
 290 +               (blue << fb->var.blue.offset) |
 291 +               (transp << fb->var.transp.offset);
 292 +
 293 +       ((uint32_t*)(fb->pseudo_palette))[regno] = color;
 294 +
 295 +       return 0;
 296 +}
 297 +
 298 +static int jzfb_get_controller_bpp(struct jzfb *jzfb)
 299 +{
 300 +       switch (jzfb->pdata->bpp) {
 301 +       case 18:
 302 +       case 24:
 303 +               return 32;
 304 +       case 15:
 305 +               return 16;
 306 +       default:
 307 +               return jzfb->pdata->bpp;
 308 +       }
 309 +}
 310 +
 311 +static struct fb_videomode *jzfb_get_mode(struct jzfb *jzfb, struct fb_var_screeninfo *var)
 312 +{
 313 +       size_t i;
 314 +       struct fb_videomode *mode = jzfb->pdata->modes;
 315 +
 316 +       for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) {
 317 +               if (mode->xres == var->xres && mode->yres == var->yres)
 318 +                       return mode;
 319 +       }
 320 +
 321 +       return NULL;
 322 +}
 323 +
 324 +static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb)
 325 +{
 326 +       struct jzfb *jzfb = fb->par;
 327 +       struct fb_videomode *mode;
 328 +
 329 +       if (var->bits_per_pixel != jzfb_get_controller_bpp(jzfb) &&
 330 +               var->bits_per_pixel != jzfb->pdata->bpp)
 331 +               return -EINVAL;
 332 +
 333 +       mode = jzfb_get_mode(jzfb, var);
 334 +       if (mode == NULL)
 335 +               return -EINVAL;
 336 +
 337 +       fb_videomode_to_var(var, mode);
 338 +
 339 +       switch (jzfb->pdata->bpp) {
 340 +       case 8:
 341 +               break;
 342 +       case 15:
 343 +               var->red.offset = 10;
 344 +               var->red.length = 5;
 345 +               var->green.offset = 6;
 346 +               var->green.length = 5;
 347 +               var->blue.offset = 0;
 348 +               var->blue.length = 5;
 349 +               break;
 350 +       case 16:
 351 +               var->red.offset = 11;
 352 +               var->red.length = 5;
 353 +               var->green.offset = 5;
 354 +               var->green.length = 6;
 355 +               var->blue.offset = 0;
 356 +               var->blue.length = 5;
 357 +               break;
 358 +       case 18:
 359 +               var->red.offset = 16;
 360 +               var->red.length = 6;
 361 +               var->green.offset = 8;
 362 +               var->green.length = 6;
 363 +               var->blue.offset = 0;
 364 +               var->blue.length = 6;
 365 +               var->bits_per_pixel = 32;
 366 +               break;
 367 +       case 32:
 368 +       case 24:
 369 +               var->transp.offset = 24;
 370 +               var->transp.length = 8;
 371 +               var->red.offset = 16;
 372 +               var->red.length = 8;
 373 +               var->green.offset = 8;
 374 +               var->green.length = 8;
 375 +               var->blue.offset = 0;
 376 +               var->blue.length = 8;
 377 +               var->bits_per_pixel = 32;
 378 +               break;
 379 +       default:
 380 +               break;
 381 +       }
 382 +
 383 +       return 0;
 384 +}
 385 +
 386 +static int jzfb_set_par(struct fb_info *info)
 387 +{
 388 +       struct jzfb *jzfb = info->par;
 389 +       struct fb_var_screeninfo *var = &info->var;
 390 +       struct fb_videomode *mode;
 391 +       uint16_t hds, vds;
 392 +       uint16_t hde, vde;
 393 +       uint16_t ht, vt;
 394 +       uint32_t ctrl;
 395 +       uint32_t cfg;
 396 +       unsigned long rate;
 397 +
 398 +       mode = jzfb_get_mode(jzfb, var);
 399 +       if (mode == NULL)
 400 +               return -EINVAL;
 401 +
 402 +       info->mode = mode;
 403 +
 404 +       hds = mode->hsync_len + mode->left_margin;
 405 +       hde = hds + mode->xres;
 406 +       ht = hde + mode->right_margin;
 407 +
 408 +       vds = mode->vsync_len + mode->upper_margin;
 409 +       vde = vds + mode->yres;
 410 +       vt = vde + mode->lower_margin;
 411 +
 412 +       ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16;
 413 +
 414 +       switch (jzfb->pdata->bpp) {
 415 +       case 1:
 416 +               ctrl |= JZ_LCD_CTRL_BPP_1;
 417 +               break;
 418 +       case 2:
 419 +               ctrl |= JZ_LCD_CTRL_BPP_2;
 420 +               break;
 421 +       case 4:
 422 +               ctrl |= JZ_LCD_CTRL_BPP_4;
 423 +               break;
 424 +       case 8:
 425 +               ctrl |= JZ_LCD_CTRL_BPP_8;
 426 +       break;
 427 +       case 15:
 428 +               ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */
 429 +       case 16:
 430 +               ctrl |= JZ_LCD_CTRL_BPP_15_16;
 431 +               break;
 432 +       case 18:
 433 +       case 24:
 434 +       case 32:
 435 +               ctrl |= JZ_LCD_CTRL_BPP_18_24;
 436 +               break;
 437 +       default:
 438 +               break;
 439 +       }
 440 +
 441 +       cfg = 0;
 442 +       cfg |= JZ_LCD_CFG_PS_DISABLE;
 443 +       cfg |= JZ_LCD_CFG_CLS_DISABLE;
 444 +       cfg |= JZ_LCD_CFG_SPL_DISABLE;
 445 +       cfg |= JZ_LCD_CFG_REV_DISABLE;
 446 +
 447 +       if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
 448 +               cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
 449 +
 450 +       if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
 451 +               cfg |= JZ_LCD_CFG_VSYNC_ACTIVE_LOW;
 452 +
 453 +       if (jzfb->pdata->pixclk_falling_edge)
 454 +               cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
 455 +
 456 +       if (jzfb->pdata->date_enable_active_low)
 457 +               cfg |= JZ_LCD_CFG_DE_ACTIVE_LOW;
 458 +
 459 +       if (jzfb->pdata->lcd_type == JZ_LCD_TYPE_GENERIC_18_BIT)
 460 +               cfg |= JZ_LCD_CFG_18_BIT;
 461 +
 462 +       cfg |= jzfb->pdata->lcd_type & 0xf;
 463 +
 464 +       if (mode->pixclock) {
 465 +               rate = PICOS2KHZ(mode->pixclock) * 1000;
 466 +               mode->refresh = rate / vt / ht;
 467 +       } else {
 468 +               if (jzfb->pdata->lcd_type == JZ_LCD_TYPE_8BIT_SERIAL)
 469 +                       rate = mode->refresh * (vt + 2 * mode->xres) * ht;
 470 +               else
 471 +                       rate = mode->refresh * vt * ht;
 472 +
 473 +               mode->pixclock = KHZ2PICOS(rate / 1000);
 474 +       }
 475 +
 476 +       mutex_lock(&jzfb->lock);
 477 +       if (!jzfb->is_enabled)
 478 +               clk_enable(jzfb->ldclk);
 479 +       else
 480 +               ctrl |= JZ_LCD_CTRL_ENABLE;
 481 +
 482 +       writel(mode->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC);
 483 +       writel(mode->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC);
 484 +
 485 +       writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT);
 486 +
 487 +       writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH);
 488 +       writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV);
 489 +
 490 +       writel(cfg, jzfb->base + JZ_REG_LCD_CFG);
 491 +
 492 +       writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 493 +
 494 +       if (!jzfb->is_enabled)
 495 +               clk_disable(jzfb->ldclk);
 496 +       mutex_unlock(&jzfb->lock);
 497 +
 498 +       clk_set_rate(jzfb->lpclk, rate);
 499 +       clk_set_rate(jzfb->ldclk, rate * 3);
 500 +
 501 +       return 0;
 502 +}
 503 +
 504 +static void jzfb_enable(struct jzfb *jzfb)
 505 +{
 506 +       uint32_t ctrl;
 507 +
 508 +       clk_enable(jzfb->ldclk);
 509 +
 510 +       jz_gpio_bulk_resume(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 511 +       jz_gpio_bulk_resume(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 512 +
 513 +       writel(0, jzfb->base + JZ_REG_LCD_STATE);
 514 +
 515 +       writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 516 +
 517 +       ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
 518 +       ctrl |= JZ_LCD_CTRL_ENABLE;
 519 +       ctrl &= ~JZ_LCD_CTRL_DISABLE;
 520 +       writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 521 +}
 522 +
 523 +static void jzfb_disable(struct jzfb *jzfb)
 524 +{
 525 +       uint32_t ctrl;
 526 +
 527 +       ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
 528 +       ctrl |= JZ_LCD_CTRL_DISABLE;
 529 +       writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 530 +       do {
 531 +               ctrl = readl(jzfb->base + JZ_REG_LCD_STATE);
 532 +       } while (!(ctrl & JZ_LCD_STATE_DISABLED));
 533 +
 534 +       jz_gpio_bulk_suspend(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 535 +       jz_gpio_bulk_suspend(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 536 +
 537 +       clk_disable(jzfb->ldclk);
 538 +}
 539 +
 540 +static int jzfb_blank(int blank_mode, struct fb_info *info)
 541 +{
 542 +       struct jzfb *jzfb = info->par;
 543 +
 544 +       switch (blank_mode) {
 545 +       case FB_BLANK_UNBLANK:
 546 +               mutex_lock(&jzfb->lock);
 547 +               if (jzfb->is_enabled) {
 548 +                       mutex_unlock(&jzfb->lock);
 549 +                       return 0;
 550 +               }
 551 +
 552 +               jzfb_enable(jzfb);
 553 +               jzfb->is_enabled = 1;
 554 +
 555 +               mutex_unlock(&jzfb->lock);
 556 +
 557 +               break;
 558 +       default:
 559 +               mutex_lock(&jzfb->lock);
 560 +               if (!jzfb->is_enabled) {
 561 +                       mutex_unlock(&jzfb->lock);
 562 +                       return 0;
 563 +               }
 564 +
 565 +               jzfb_disable(jzfb);
 566 +
 567 +               jzfb->is_enabled = 0;
 568 +               mutex_unlock(&jzfb->lock);
 569 +               break;
 570 +       }
 571 +
 572 +       return 0;
 573 +}
 574 +
 575 +static int jzfb_alloc_devmem(struct jzfb *jzfb)
 576 +{
 577 +       int max_videosize = 0;
 578 +       struct fb_videomode *mode = jzfb->pdata->modes;
 579 +       void *page;
 580 +       int i;
 581 +
 582 +       for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) {
 583 +               if (max_videosize < mode->xres * mode->yres)
 584 +                       max_videosize = mode->xres * mode->yres;
 585 +       }
 586 +
 587 +       max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3;
 588 +
 589 +       jzfb->framedesc = dma_alloc_coherent(&jzfb->pdev->dev,
 590 +                                   sizeof(*jzfb->framedesc),
 591 +                                   &jzfb->framedesc_phys, GFP_KERNEL);
 592 +
 593 +       if (!jzfb->framedesc)
 594 +               return -ENOMEM;
 595 +
 596 +       jzfb->vidmem_size = PAGE_ALIGN(max_videosize);
 597 +       jzfb->vidmem = dma_alloc_coherent(&jzfb->pdev->dev,
 598 +                                               jzfb->vidmem_size,
 599 +                                               &jzfb->vidmem_phys, GFP_KERNEL);
 600 +
 601 +       if (!jzfb->vidmem)
 602 +               goto err_free_framedesc;
 603 +
 604 +       for (page = jzfb->vidmem;
 605 +                page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size);
 606 +                page += PAGE_SIZE) {
 607 +               SetPageReserved(virt_to_page(page));
 608 +       }
 609 +
 610 +
 611 +       jzfb->framedesc->next = jzfb->framedesc_phys;
 612 +       jzfb->framedesc->addr = jzfb->vidmem_phys;
 613 +       jzfb->framedesc->id = 0xdeafbead;
 614 +       jzfb->framedesc->cmd = 0;
 615 +       jzfb->framedesc->cmd |= max_videosize / 4;
 616 +
 617 +       return 0;
 618 +
 619 +err_free_framedesc:
 620 +       dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
 621 +                               jzfb->framedesc, jzfb->framedesc_phys);
 622 +       return -ENOMEM;
 623 +}
 624 +
 625 +static void jzfb_free_devmem(struct jzfb *jzfb)
 626 +{
 627 +       dma_free_coherent(&jzfb->pdev->dev, jzfb->vidmem_size,
 628 +                               jzfb->vidmem, jzfb->vidmem_phys);
 629 +       dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
 630 +                               jzfb->framedesc, jzfb->framedesc_phys);
 631 +}
 632 +
 633 +static struct  fb_ops jzfb_ops = {
 634 +       .owner = THIS_MODULE,
 635 +       .fb_check_var = jzfb_check_var,
 636 +       .fb_set_par = jzfb_set_par,
 637 +       .fb_blank = jzfb_blank,
 638 +       .fb_fillrect    = sys_fillrect,
 639 +       .fb_copyarea    = sys_copyarea,
 640 +       .fb_imageblit   = sys_imageblit,
 641 +       .fb_setcolreg = jzfb_setcolreg,
 642 +};
 643 +
 644 +static int __devinit jzfb_probe(struct platform_device *pdev)
 645 +{
 646 +       int ret;
 647 +       struct jzfb *jzfb;
 648 +       struct fb_info *fb;
 649 +       struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data;
 650 +       struct resource *mem;
 651 +
 652 +       if (!pdata) {
 653 +               dev_err(&pdev->dev, "Missing platform data\n");
 654 +               return -ENOENT;
 655 +       }
 656 +
 657 +       mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 658 +
 659 +       if (!mem) {
 660 +               dev_err(&pdev->dev, "Failed to get register memory resource\n");
 661 +               return -ENOENT;
 662 +       }
 663 +
 664 +       mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
 665 +
 666 +       if (!mem) {
 667 +               dev_err(&pdev->dev, "Failed to request register memory region\n");
 668 +               return -EBUSY;
 669 +       }
 670 +
 671 +
 672 +       fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev);
 673 +
 674 +       if (!fb) {
 675 +               dev_err(&pdev->dev, "Failed to allocate framebuffer device\n");
 676 +               ret = -ENOMEM;
 677 +               goto err_release_mem_region;
 678 +       }
 679 +
 680 +       fb->fbops = &jzfb_ops;
 681 +       fb->flags = FBINFO_DEFAULT;
 682 +
 683 +       jzfb = fb->par;
 684 +       jzfb->pdev = pdev;
 685 +       jzfb->pdata = pdata;
 686 +       jzfb->mem = mem;
 687 +
 688 +       jzfb->ldclk = clk_get(&pdev->dev, "lcd");
 689 +       if (IS_ERR(jzfb->ldclk)) {
 690 +               ret = PTR_ERR(jzfb->ldclk);
 691 +               dev_err(&pdev->dev, "Failed to get lcd clock: %d\n", ret);
 692 +               goto err_framebuffer_release;
 693 +       }
 694 +
 695 +       jzfb->lpclk = clk_get(&pdev->dev, "lcd_pclk");
 696 +       if (IS_ERR(jzfb->lpclk)) {
 697 +               ret = PTR_ERR(jzfb->lpclk);
 698 +               dev_err(&pdev->dev, "Failed to get lcd pixel clock: %d\n", ret);
 699 +               goto err_put_ldclk;
 700 +       }
 701 +
 702 +       jzfb->base = ioremap(mem->start, resource_size(mem));
 703 +
 704 +       if (!jzfb->base) {
 705 +               dev_err(&pdev->dev, "Failed to ioremap register memory region\n");
 706 +               ret = -EBUSY;
 707 +               goto err_put_lpclk;
 708 +       }
 709 +
 710 +       platform_set_drvdata(pdev, jzfb);
 711 +
 712 +       fb_videomode_to_modelist(pdata->modes, pdata->num_modes,
 713 +                                &fb->modelist);
 714 +       fb->mode = pdata->modes;
 715 +
 716 +       fb_videomode_to_var(&fb->var, fb->mode);
 717 +       fb->var.bits_per_pixel = pdata->bpp;
 718 +       jzfb_check_var(&fb->var, fb);
 719 +
 720 +       ret = jzfb_alloc_devmem(jzfb);
 721 +       if (ret) {
 722 +               dev_err(&pdev->dev, "Failed to allocate video memory\n");
 723 +               goto err_iounmap;
 724 +       }
 725 +
 726 +       fb->fix = jzfb_fix;
 727 +       fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8;
 728 +       fb->fix.mmio_start = mem->start;
 729 +       fb->fix.mmio_len = resource_size(mem);
 730 +       fb->fix.smem_start = jzfb->vidmem_phys;
 731 +       fb->fix.smem_len =  fb->fix.line_length * fb->var.yres;
 732 +       fb->screen_base = jzfb->vidmem;
 733 +       fb->pseudo_palette = jzfb->pseudo_palette;
 734 +
 735 +       fb_alloc_cmap(&fb->cmap, 256, 0);
 736 +
 737 +       mutex_init(&jzfb->lock);
 738 +
 739 +       clk_enable(jzfb->ldclk);
 740 +       jzfb->is_enabled = 1;
 741 +
 742 +       writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 743 +       jzfb_set_par(fb);
 744 +
 745 +       jz_gpio_bulk_request(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 746 +       jz_gpio_bulk_request(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 747 +
 748 +       ret = register_framebuffer(fb);
 749 +       if (ret) {
 750 +               dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret);
 751 +               goto err_free_devmem;
 752 +       }
 753 +
 754 +       jzfb->fb = fb;
 755 +
 756 +       return 0;
 757 +
 758 +err_free_devmem:
 759 +       jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 760 +       jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 761 +
 762 +       fb_dealloc_cmap(&fb->cmap);
 763 +       jzfb_free_devmem(jzfb);
 764 +err_iounmap:
 765 +       iounmap(jzfb->base);
 766 +err_put_lpclk:
 767 +       clk_put(jzfb->lpclk);
 768 +err_put_ldclk:
 769 +       clk_put(jzfb->ldclk);
 770 +err_framebuffer_release:
 771 +       framebuffer_release(fb);
 772 +err_release_mem_region:
 773 +       release_mem_region(mem->start, resource_size(mem));
 774 +       return ret;
 775 +}
 776 +
 777 +static int __devexit jzfb_remove(struct platform_device *pdev)
 778 +{
 779 +       struct jzfb *jzfb = platform_get_drvdata(pdev);
 780 +
 781 +       jzfb_blank(FB_BLANK_POWERDOWN, jzfb->fb);
 782 +
 783 +       jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 784 +       jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 785 +
 786 +       iounmap(jzfb->base);
 787 +       release_mem_region(jzfb->mem->start, resource_size(jzfb->mem));
 788 +
 789 +       fb_dealloc_cmap(&jzfb->fb->cmap);
 790 +       jzfb_free_devmem(jzfb);
 791 +
 792 +       platform_set_drvdata(pdev, NULL);
 793 +
 794 +       clk_put(jzfb->lpclk);
 795 +       clk_put(jzfb->ldclk);
 796 +
 797 +       framebuffer_release(jzfb->fb);
 798 +
 799 +       return 0;
 800 +}
 801 +
 802 +#ifdef CONFIG_PM
 803 +
 804 +static int jzfb_suspend(struct device *dev)
 805 +{
 806 +       struct jzfb *jzfb = dev_get_drvdata(dev);
 807 +
 808 +       acquire_console_sem();
 809 +       fb_set_suspend(jzfb->fb, 1);
 810 +       release_console_sem();
 811 +
 812 +       mutex_lock(&jzfb->lock);
 813 +       if (jzfb->is_enabled)
 814 +               jzfb_disable(jzfb);
 815 +       mutex_unlock(&jzfb->lock);
 816 +
 817 +       return 0;
 818 +}
 819 +
 820 +static int jzfb_resume(struct device *dev)
 821 +{
 822 +       struct jzfb *jzfb = dev_get_drvdata(dev);
 823 +       clk_enable(jzfb->ldclk);
 824 +
 825 +       mutex_lock(&jzfb->lock);
 826 +       if (jzfb->is_enabled)
 827 +               jzfb_enable(jzfb);
 828 +       mutex_unlock(&jzfb->lock);
 829 +
 830 +       acquire_console_sem();
 831 +       fb_set_suspend(jzfb->fb, 0);
 832 +       release_console_sem();
 833 +
 834 +       return 0;
 835 +}
 836 +
 837 +static const struct dev_pm_ops jzfb_pm_ops = {
 838 +       .suspend        = jzfb_suspend,
 839 +       .resume         = jzfb_resume,
 840 +       .poweroff       = jzfb_suspend,
 841 +       .restore        = jzfb_resume,
 842 +};
 843 +
 844 +#define JZFB_PM_OPS (&jzfb_pm_ops)
 845 +
 846 +#else
 847 +#define JZFB_PM_OPS NULL
 848 +#endif
 849 +
 850 +static struct platform_driver jzfb_driver = {
 851 +       .probe = jzfb_probe,
 852 +       .remove = __devexit_p(jzfb_remove),
 853 +       .driver = {
 854 +               .name = "jz4740-fb",
 855 +               .pm = JZFB_PM_OPS,
 856 +       },
 857 +};
 858 +
 859 +static int __init jzfb_init(void)
 860 +{
 861 +       return platform_driver_register(&jzfb_driver);
 862 +}
 863 +module_init(jzfb_init);
 864 +
 865 +static void __exit jzfb_exit(void)
 866 +{
 867 +       platform_driver_unregister(&jzfb_driver);
 868 +}
 869 +module_exit(jzfb_exit);
 870 +
 871 +MODULE_LICENSE("GPL");
 872 +MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 873 +MODULE_DESCRIPTION("JZ4720/JZ4740 SoC LCD framebuffer driver");
 874 +MODULE_ALIAS("platform:jz4740-fb");
 875 diff --git a/include/linux/jz4740_fb.h b/include/linux/jz4740_fb.h
 876 new file mode 100644
 877 index 0000000..ab4c963
 878 --- /dev/null
 879 +++ b/include/linux/jz4740_fb.h
 880 @@ -0,0 +1,58 @@
 881 +/*
 882 + *  Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
 883 + *
 884 + *  This program is free software; you can redistribute         it and/or modify it
 885 + *  under  the terms of         the GNU General  Public License as published by the
 886 + *  Free Software Foundation;  either version 2 of the License, or (at your
 887 + *  option) any later version.
 888 + *
 889 + *  You should have received a copy of the  GNU General Public License along
 890 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
 891 + *  675 Mass Ave, Cambridge, MA 02139, USA.
 892 + *
 893 + */
 894 +
 895 +#ifndef __LINUX_JZ4740_FB_H
 896 +#define __LINUX_JZ4740_FB_H
 897 +
 898 +#include <linux/fb.h>
 899 +
 900 +enum jz4740_fb_lcd_type {
 901 +       JZ_LCD_TYPE_GENERIC_16_BIT = 0,
 902 +       JZ_LCD_TYPE_GENERIC_18_BIT = 0 | (1 << 4),
 903 +       JZ_LCD_TYPE_SPECIAL_TFT_1 = 1,
 904 +       JZ_LCD_TYPE_SPECIAL_TFT_2 = 2,
 905 +       JZ_LCD_TYPE_SPECIAL_TFT_3 = 3,
 906 +       JZ_LCD_TYPE_NON_INTERLACED_CCIR656 = 5,
 907 +       JZ_LCD_TYPE_INTERLACED_CCIR656 = 7,
 908 +       JZ_LCD_TYPE_SINGLE_COLOR_STN = 8,
 909 +       JZ_LCD_TYPE_SINGLE_MONOCHROME_STN = 9,
 910 +       JZ_LCD_TYPE_DUAL_COLOR_STN = 10,
 911 +       JZ_LCD_TYPE_DUAL_MONOCHROME_STN = 11,
 912 +       JZ_LCD_TYPE_8BIT_SERIAL = 12,
 913 +};
 914 +
 915 +/*
 916 +* width: width of the lcd display in mm
 917 +* height: height of the lcd display in mm
 918 +* num_modes: size of modes
 919 +* modes: list of valid video modes
 920 +* bpp: bits per pixel for the lcd
 921 +* lcd_type: lcd type
 922 +*/
 923 +
 924 +struct jz4740_fb_platform_data {
 925 +       unsigned int width;
 926 +       unsigned int height;
 927 +
 928 +       size_t num_modes;
 929 +       struct fb_videomode *modes;
 930 +
 931 +       unsigned int bpp;
 932 +       enum jz4740_fb_lcd_type lcd_type;
 933 +
 934 +       unsigned pixclk_falling_edge:1;
 935 +       unsigned date_enable_active_low:1;
 936 +};
 937 +
 938 +#endif
 939 --
 940 1.5.6.5
 941