target/linux/brcm63xx-2.6/files/include/asm-mips/mach-bcm963xx/6345_map_part.h

   1 /*
   2 <:copyright-gpl
   3  Copyright 2002 Broadcom Corp. All Rights Reserved.
   4
   5  This program is free software; you can distribute it and/or modify it
   6  under the terms of the GNU General Public License (Version 2) as
   7  published by the Free Software Foundation.
   8
   9  This program is distributed in the hope it will be useful, but WITHOUT
  10  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  for more details.
  13
  14  You should have received a copy of the GNU General Public License along
  15  with this program; if not, write to the Free Software Foundation, Inc.,
  16  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17 :>
  18 */
  19
  20 #ifndef __BCM6345_MAP_H
  21 #define __BCM6345_MAP_H
  22
  23
  24 #include "bcmtypes.h"
  25 #include "6345_intr.h"
  26
  27 typedef struct IntControl {
  28   uint32        RevID;
  29   uint16        testControl;
  30   uint16        blkEnables;
  31 #define USB_CLK_EN      0x0100
  32 #define EMAC_CLK_EN     0x0080
  33 #define UART_CLK_EN     0x0008
  34 #define CPU_CLK_EN      0x0001
  35
  36   uint32        pll_control;
  37 #define SOFT_RESET      0x00000001
  38
  39   uint32        IrqMask;
  40   uint32        IrqStatus;
  41
  42   uint32        ExtIrqCfg;
  43 #define EI_SENSE_SHFT   0
  44 #define EI_STATUS_SHFT  4
  45 #define EI_CLEAR_SHFT   8
  46 #define EI_MASK_SHFT    12
  47 #define EI_INSENS_SHFT  16
  48 #define EI_LEVEL_SHFT   20
  49 } IntControl;
  50
  51 #define INTC_BASE     0xfffe0000
  52 #define PERF ((volatile IntControl * const) INTC_BASE)
  53
  54 #define TIMR_BASE     0xfffe0200
  55 typedef struct Timer {
  56   uint16        unused0;
  57   byte          TimerMask;
  58 #define TIMER0EN        0x01
  59 #define TIMER1EN        0x02
  60 #define TIMER2EN        0x04
  61   byte          TimerInts;
  62 #define TIMER0          0x01
  63 #define TIMER1          0x02
  64 #define TIMER2          0x04
  65 #define WATCHDOG        0x08
  66   uint32        TimerCtl0;
  67   uint32        TimerCtl1;
  68   uint32        TimerCtl2;
  69 #define TIMERENABLE     0x80000000
  70 #define RSTCNTCLR       0x40000000
  71   uint32        TimerCnt0;
  72   uint32        TimerCnt1;
  73   uint32        TimerCnt2;
  74   uint32        WatchDogDefCount;
  75
  76   /* Write 0xff00 0x00ff to Start timer
  77    * Write 0xee00 0x00ee to Stop and re-load default count
  78    * Read from this register returns current watch dog count
  79    */
  80   uint32        WatchDogCtl;
  81
  82   /* Number of 40-MHz ticks for WD Reset pulse to last */
  83   uint32        WDResetCount;
  84 } Timer;
  85
  86 #define TIMER ((volatile Timer * const) TIMR_BASE)
  87
  88 typedef struct UartChannel {
  89   byte          unused0;
  90   byte          control;
  91 #define BRGEN           0x80    /* Control register bit defs */
  92 #define TXEN            0x40
  93 #define RXEN            0x20
  94 #define TXPARITYEN      0x08
  95 #define TXPARITYEVEN    0x04
  96 #define RXPARITYEN      0x02
  97 #define RXPARITYEVEN    0x01
  98   byte          config;
  99 #define BITS5SYM        0x00
 100 #define BITS6SYM        0x10
 101 #define BITS7SYM        0x20
 102 #define BITS8SYM        0x30
 103 #define XMITBREAK       0x40
 104 #define ONESTOP         0x07
 105 #define TWOSTOP         0x0f
 106
 107   byte          fifoctl;
 108 #define RSTTXFIFOS      0x80
 109 #define RSTRXFIFOS      0x40
 110   uint32        baudword;
 111
 112   byte          txf_levl;
 113   byte          rxf_levl;
 114   byte          fifocfg;
 115   byte          prog_out;
 116
 117   byte          unused1;
 118   byte          DeltaIPEdgeNoSense;
 119   byte          DeltaIPConfig_Mask;
 120   byte          DeltaIP_SyncIP;
 121   uint16        intMask;
 122   uint16        intStatus;
 123 #define TXUNDERR        0x0002
 124 #define TXOVFERR        0x0004
 125 #define TXFIFOEMT       0x0020
 126 #define RXOVFERR        0x0080
 127 #define RXFIFONE        0x0800
 128 #define RXFRAMERR       0x1000
 129 #define RXPARERR        0x2000
 130 #define RXBRK           0x4000
 131
 132   uint16        unused2;
 133   uint16        Data;
 134   uint32                unused3;
 135   uint32                unused4;
 136 } Uart;
 137
 138 #define UART_BASE     0xfffe0300
 139 #define UART ((volatile Uart * const) UART_BASE)
 140
 141 typedef struct GpioControl {
 142   uint16        unused0;
 143   byte          unused1;
 144   byte          TBusSel;
 145
 146   uint16        unused2;
 147   uint16        GPIODir;
 148   byte          unused3;
 149   byte          Leds;
 150   uint16        GPIOio;
 151
 152   uint32        UartCtl;
 153 } GpioControl;
 154
 155 #define GPIO_BASE     0xfffe0400
 156 #define GPIO ((volatile GpioControl * const) GPIO_BASE)
 157
 158 #define GPIO_NUM_MAX_BITS_MASK          0x0f
 159 #define GPIO_NUM_TO_MASK(X)             (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
 160
 161
 162 #endif
 163