target/linux/brcm63xx-2.6/files/include/asm-mips/mach-bcm963xx/board.h

   1 /*
   2 <:copyright-gpl
   3  Copyright 2002 Broadcom Corp. All Rights Reserved.
   4
   5  This program is free software; you can distribute it and/or modify it
   6  under the terms of the GNU General Public License (Version 2) as
   7  published by the Free Software Foundation.
   8
   9  This program is distributed in the hope it will be useful, but WITHOUT
  10  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  for more details.
  13
  14  You should have received a copy of the GNU General Public License along
  15  with this program; if not, write to the Free Software Foundation, Inc.,
  16  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17 :>
  18 */
  19 /***********************************************************************/
  20 /*                                                                     */
  21 /*   MODULE:  board.h                                                  */
  22 /*   DATE:    97/02/18                                                 */
  23 /*   PURPOSE: Board specific information.  This module should include  */
  24 /*            all base device addresses and board specific macros.     */
  25 /*                                                                     */
  26 /***********************************************************************/
  27 #ifndef _BOARD_H
  28 #define _BOARD_H
  29
  30 /*****************************************************************************/
  31 /*                    Misc board definitions                                 */
  32 /*****************************************************************************/
  33
  34 #define DYING_GASP_API
  35
  36 /*****************************************************************************/
  37 /*                    Physical Memory Map                                    */
  38 /*****************************************************************************/
  39
  40 #define PHYS_DRAM_BASE           0x00000000     /* Dynamic RAM Base */
  41 #define PHYS_FLASH_BASE          0x1FC00000     /* Flash Memory         */
  42
  43 /*****************************************************************************/
  44 /* Note that the addresses above are physical addresses and that programs    */
  45 /* have to use converted addresses defined below:                            */
  46 /*****************************************************************************/
  47 #define DRAM_BASE           (0x80000000 | PHYS_DRAM_BASE)   /* cached DRAM */
  48 #define DRAM_BASE_NOCACHE   (0xA0000000 | PHYS_DRAM_BASE)   /* uncached DRAM */
  49 #define FLASH_BASE          (0xA0000000 | PHYS_FLASH_BASE)  /* uncached Flash  */
  50
  51 /*****************************************************************************/
  52 /*  Select the PLL value to get the desired CPU clock frequency.             */
  53 /*                                                                           */
  54 /*                                                                           */
  55 /*****************************************************************************/
  56 #define FPERIPH            50000000
  57
  58 #define ONEK                            1024
  59 #define BLK64K                          (64*ONEK)
  60 #define FLASH45_BLKS_BOOT_ROM           1
  61 #define FLASH45_LENGTH_BOOT_ROM         (FLASH45_BLKS_BOOT_ROM * BLK64K)
  62 #define FLASH_RESERVED_AT_END           (64*ONEK) /*reserved for PSI, scratch pad*/
  63
  64 /*****************************************************************************/
  65 /* Note that the addresses above are physical addresses and that programs    */
  66 /* have to use converted addresses defined below:                            */
  67 /*****************************************************************************/
  68 #define DRAM_BASE           (0x80000000 | PHYS_DRAM_BASE)   /* cached DRAM */
  69 #define DRAM_BASE_NOCACHE   (0xA0000000 | PHYS_DRAM_BASE)   /* uncached DRAM */
  70 #define FLASH_BASE          (0xA0000000 | PHYS_FLASH_BASE)  /* uncached Flash  */
  71
  72 /*****************************************************************************/
  73 /*  Select the PLL value to get the desired CPU clock frequency.             */
  74 /*                                                                           */
  75 /*                                                                           */
  76 /*****************************************************************************/
  77 #define FPERIPH            50000000
  78
  79 #define SDRAM_TYPE_ADDRESS_OFFSET   16
  80 #define NVRAM_DATA_OFFSET           0x0580
  81 #define NVRAM_DATA_ID               0x0f1e2d3c
  82 #define BOARD_SDRAM_TYPE            *(unsigned long *) \
  83                                     (FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
  84
  85 #define ONEK                1024
  86 #define BLK64K              (64*ONEK)
  87
  88 // nvram and psi flash definitions for 45
  89 #define FLASH45_LENGTH_NVRAM            ONEK            // 1k nvram
  90 #define NVRAM_PSI_DEFAULT               24              // default psi in K byes
  91
  92 /*****************************************************************************/
  93 /*       NVRAM Offset and definition                                         */
  94 /*****************************************************************************/
  95
  96 #define NVRAM_VERSION_NUMBER            2
  97 #define NVRAM_VERSION_NUMBER_ADDRESS    0
  98
  99 #define NVRAM_BOOTLINE_LEN              256
 100 #define NVRAM_BOARD_ID_STRING_LEN       16
 101 #define NVRAM_MAC_ADDRESS_LEN           6
 102 #define NVRAM_MAC_COUNT_MAX             32
 103
 104 /*****************************************************************************/
 105 /*       Misc Offsets                                                        */
 106 /*****************************************************************************/
 107
 108 #define CFE_VERSION_OFFSET           0x0570
 109 #define CFE_VERSION_MARK_SIZE        5
 110 #define CFE_VERSION_SIZE             5
 111
 112 typedef struct
 113 {
 114     unsigned long ulVersion;
 115     char szBootline[NVRAM_BOOTLINE_LEN];
 116     char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
 117     unsigned long ulReserved1[2];
 118     unsigned long ulNumMacAddrs;
 119     unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
 120     char chReserved[2];
 121     unsigned long ulCheckSum;
 122 } NVRAM_DATA, *PNVRAM_DATA;
 123
 124
 125 /*****************************************************************************/
 126 /*          board ioctl calls for flash, led and some other utilities        */
 127 /*****************************************************************************/
 128
 129
 130 /* Defines. for board driver */
 131 #define BOARD_IOCTL_MAGIC       'B'
 132 #define BOARD_DRV_MAJOR          206
 133
 134 #define MAC_ADDRESS_ANY         (unsigned long) -1
 135
 136 #define BOARD_IOCTL_FLASH_INIT \
 137     _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
 138
 139 #define BOARD_IOCTL_FLASH_WRITE \
 140     _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
 141
 142 #define BOARD_IOCTL_FLASH_READ \
 143     _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
 144
 145 #define BOARD_IOCTL_GET_NR_PAGES \
 146     _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
 147
 148 #define BOARD_IOCTL_DUMP_ADDR \
 149     _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
 150
 151 #define BOARD_IOCTL_SET_MEMORY \
 152     _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
 153
 154 #define BOARD_IOCTL_MIPS_SOFT_RESET \
 155     _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
 156
 157 #define BOARD_IOCTL_LED_CTRL \
 158     _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
 159
 160 #define BOARD_IOCTL_GET_ID \
 161     _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
 162
 163 #define BOARD_IOCTL_GET_MAC_ADDRESS \
 164     _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
 165
 166 #define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
 167     _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
 168
 169 #define BOARD_IOCTL_GET_PSI_SIZE \
 170     _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
 171
 172 #define BOARD_IOCTL_GET_SDRAM_SIZE \
 173     _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
 174
 175 #define BOARD_IOCTL_SET_MONITOR_FD \
 176     _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
 177
 178 #define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
 179     _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
 180
 181 #define BOARD_IOCTL_GET_BOOTLINE \
 182     _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
 183
 184 #define BOARD_IOCTL_SET_BOOTLINE \
 185     _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
 186
 187 #define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
 188     _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
 189
 190 #define BOARD_IOCTL_GET_CHIP_ID \
 191     _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
 192
 193 #define BOARD_IOCTL_GET_NUM_ENET \
 194     _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
 195
 196 #define BOARD_IOCTL_GET_CFE_VER \
 197     _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
 198
 199 #define BOARD_IOCTL_GET_ENET_CFG \
 200     _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
 201
 202 #define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
 203     _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
 204
 205 #define BOARD_IOCTL_SET_TRIGGER_EVENT \
 206     _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
 207
 208 #define BOARD_IOCTL_GET_TRIGGER_EVENT \
 209     _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
 210
 211 #define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
 212     _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
 213
 214 #define BOARD_IOCTL_SET_SES_LED \
 215     _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
 216
 217 //<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
 218 #define RESET_BUTTON_UP           1
 219 #define RESET_BUTTON_PRESSDOWN    0
 220 #define BOARD_IOCTL_GET_RESETHOLD \
 221     _IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
 222 //>>JUNHON, 2004/09/15
 223
 224 // for the action in BOARD_IOCTL_PARMS for flash operation
 225 typedef enum
 226 {
 227     PERSISTENT,
 228     NVRAM,
 229     BCM_IMAGE_CFE,
 230     BCM_IMAGE_FS,
 231     BCM_IMAGE_KERNEL,
 232     BCM_IMAGE_WHOLE,
 233     SCRATCH_PAD,
 234     FLASH_SIZE,
 235 } BOARD_IOCTL_ACTION;
 236
 237
 238 typedef struct boardIoctParms
 239 {
 240     char *string;
 241     char *buf;
 242     int strLen;
 243     int offset;
 244     BOARD_IOCTL_ACTION  action;        /* flash read/write: nvram, persistent, bcm image */
 245     int result;
 246 } BOARD_IOCTL_PARMS;
 247
 248
 249 // LED defines
 250 typedef enum
 251 {
 252     kLedAdsl,
 253     kLedWireless,
 254     kLedUsb,
 255     kLedHpna,
 256     kLedWanData,
 257     kLedPPP,
 258     kLedVoip,
 259     kLedSes,
 260     kLedLan,
 261     kLedSelfTest,
 262     kLedEnd,                // NOTE: Insert the new led name before this one.  Alway stay at the end.
 263 } BOARD_LED_NAME;
 264
 265 typedef enum
 266 {
 267     kLedStateOff,                        /* turn led off */
 268     kLedStateOn,                         /* turn led on */
 269     kLedStateFail,                       /* turn led on red */
 270     kLedStateBlinkOnce,                  /* blink once, ~100ms and ignore the same call during the 100ms period */
 271     kLedStateSlowBlinkContinues,         /* slow blink continues at ~600ms interval */
 272     kLedStateFastBlinkContinues,         /* fast blink continues at ~200ms interval */
 273 } BOARD_LED_STATE;
 274
 275
 276 // virtual and physical map pair defined in board.c
 277 typedef struct ledmappair
 278 {
 279     BOARD_LED_NAME ledName;         // virtual led name
 280     BOARD_LED_STATE ledInitState;   // initial led state when the board boots.
 281     unsigned short ledMask;         // physical GPIO pin mask
 282     unsigned short ledActiveLow;    // reset bit to turn on LED
 283     unsigned short ledMaskFail;     // physical GPIO pin mask for state failure
 284     unsigned short ledActiveLowFail;// reset bit to turn on LED
 285 } LED_MAP_PAIR, *PLED_MAP_PAIR;
 286
 287 typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
 288
 289 /* Flash storage address information that is determined by the flash driver. */
 290 typedef struct flashaddrinfo
 291 {
 292     int flash_persistent_start_blk;
 293     int flash_persistent_number_blk;
 294     int flash_persistent_length;
 295     unsigned long flash_persistent_blk_offset;
 296     int flash_scratch_pad_start_blk;         // start before psi (SP_BUF_LEN)
 297     int flash_scratch_pad_number_blk;
 298     int flash_scratch_pad_length;
 299     unsigned long flash_scratch_pad_blk_offset;
 300     int flash_nvram_start_blk;
 301     int flash_nvram_number_blk;
 302     int flash_nvram_length;
 303     unsigned long flash_nvram_blk_offset;
 304 } FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
 305
 306 // scratch pad defines
 307 /* SP - Persisten Scratch Pad format:
 308        sp header        : 32 bytes
 309        tokenId-1        : 8 bytes
 310        tokenId-1 len    : 4 bytes
 311        tokenId-1 data
 312        ....
 313        tokenId-n        : 8 bytes
 314        tokenId-n len    : 4 bytes
 315        tokenId-n data
 316 */
 317
 318 #define MAGIC_NUM_LEN       8
 319 #define MAGIC_NUMBER        "gOGoBrCm"
 320 #define TOKEN_NAME_LEN      16
 321 #define SP_VERSION          1
 322 #define SP_MAX_LEN          8 * 1024            // 8k buf before psi
 323 #define SP_RESERVERD        16
 324
 325 typedef struct _SP_HEADER
 326 {
 327     char SPMagicNum[MAGIC_NUM_LEN];             // 8 bytes of magic number
 328     int SPVersion;                              // version number
 329     int SPUsedLen;                              // used sp len
 330     char SPReserved[SP_RESERVERD];              // reservied, total 32 bytes
 331 } SP_HEADER, *PSP_HEADER;
 332
 333 typedef struct _TOKEN_DEF
 334 {
 335     char tokenName[TOKEN_NAME_LEN];
 336     int tokenLen;
 337 } SP_TOKEN, *PSP_TOKEN;
 338
 339
 340 /*****************************************************************************/
 341 /*          Function Prototypes                                              */
 342 /*****************************************************************************/
 343 #if !defined(__ASM_ASM_H)
 344 void dumpaddr( unsigned char *pAddr, int nLen );
 345
 346 int kerSysNvRamGet(char *string, int strLen, int offset);
 347 int kerSysNvRamSet(char *string, int strLen, int offset);
 348 int kerSysPersistentGet(char *string, int strLen, int offset);
 349 int kerSysPersistentSet(char *string, int strLen, int offset);
 350 int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
 351 int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
 352 int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
 353 int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
 354 int kerSysReleaseMacAddress( unsigned char *pucaAddr );
 355 int kerSysGetSdramSize( void );
 356 void kerSysGetBootline(char *string, int strLen);
 357 void kerSysSetBootline(char *string, int strLen);
 358 void kerSysMipsSoftReset(void);
 359 void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
 360 void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
 361 int kerSysFlashSizeGet(void);
 362 void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
 363 void kerSysDeregisterDyingGaspHandler(char *devname);
 364 void kerSysWakeupMonitorTask( void );
 365 #endif
 366
 367 #define BOOT_CFE     0
 368 #define BOOT_REDBOOT 1
 369
 370 extern int boot_loader_type;
 371
 372 #endif /* _BOARD_H */
 373