2 +++ b/arch/mips/include/asm/mach-lantiq/war.h
5 + * This file is subject to the terms and conditions of the GNU General Public
6 + * License. See the file "COPYING" in the main directory of this archive
10 +#ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H
11 +#define __ASM_MIPS_MACH_LANTIQ_WAR_H
13 +#define R4600_V1_INDEX_ICACHEOP_WAR 0
14 +#define R4600_V1_HIT_CACHEOP_WAR 0
15 +#define R4600_V2_HIT_CACHEOP_WAR 0
16 +#define R5432_CP0_INTERRUPT_WAR 0
17 +#define BCM1250_M3_WAR 0
18 +#define SIBYTE_1956_WAR 0
19 +#define MIPS4K_ICACHE_REFILL_WAR 0
20 +#define MIPS_CACHE_SYNC_WAR 0
21 +#define TX49XX_ICACHE_INDEX_INV_WAR 0
22 +#define RM9000_CDEX_SMP_WAR 0
23 +#define ICACHE_REFILLS_WORKAROUND_WAR 0
24 +#define R10000_LLSC_WAR 0
25 +#define MIPS34K_MISSED_ITLB_WAR 0
29 +++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
32 + * This program is free software; you can redistribute it and/or modify it
33 + * under the terms of the GNU General Public License version 2 as published
34 + * by the Free Software Foundation.
36 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
42 +/* generic reg access functions */
43 +#define lq_r32(reg) __raw_readl(reg)
44 +#define lq_w32(val, reg) __raw_writel(val, reg)
45 +#define lq_w32_mask(clear, set, reg) lq_w32((lq_r32(reg) & ~clear) | set, reg)
47 +extern unsigned int lq_get_cpu_ver(void);
48 +extern unsigned int lq_get_soc_type(void);
51 +#define CLOCK_60M 60000000
52 +#define CLOCK_83M 83333333
53 +#define CLOCK_111M 111111111
54 +#define CLOCK_111M 111111111
55 +#define CLOCK_133M 133333333
56 +#define CLOCK_167M 166666667
57 +#define CLOCK_200M 200000000
58 +#define CLOCK_333M 333333333
59 +#define CLOCK_400M 400000000
61 +/* spinlock all ebu i/o */
62 +extern spinlock_t ebu_lock;
64 +/* some irq helpers */
65 +extern void lq_disable_irq(unsigned int irq_nr);
66 +extern void lq_mask_and_ack_irq(unsigned int irq_nr);
67 +extern void lq_enable_irq(unsigned int irq_nr);
69 +#define IOPORT_RESOURCE_START 0x10000000
70 +#define IOPORT_RESOURCE_END 0xffffffff
71 +#define IOMEM_RESOURCE_START 0x10000000
72 +#define IOMEM_RESOURCE_END 0xffffffff
74 +#define LQ_FLASH_START 0x10000000
75 +#define LQ_FLASH_MAX 0x04000000
79 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_regs.h
82 + * This program is free software; you can redistribute it and/or modify it
83 + * under the terms of the GNU General Public License version 2 as published
84 + * by the Free Software Foundation.
86 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
89 +#ifndef _LANTIQ_REGS_H__
90 +#define _LANTIQ_REGS_H__
92 +#ifdef CONFIG_SOC_LANTIQ_XWAY
94 +#include <xway_irq.h>
99 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h
102 + * This program is free software; you can redistribute it and/or modify it
103 + * under the terms of the GNU General Public License version 2 as published
104 + * by the Free Software Foundation.
106 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
109 +#ifndef _LANTIQ_PLATFORM_H__
110 +#define _LANTIQ_PLATFORM_H__
112 +#include <linux/mtd/partitions.h>
114 +/* struct used to pass info to network drivers */
120 +struct lq_eth_data {
121 + unsigned char *mac;
125 +#define PCI_EXIN0 0x0001
126 +#define PCI_EXIN1 0x0002
127 +#define PCI_EXIN2 0x0004
128 +#define PCI_EXIN_SHIFT 0
130 +#define PCI_GNT1 0x0008
131 +#define PCI_GNT2 0x0010
132 +#define PCI_GNT3 0x0020
133 +#define PCI_GNT_SHIFT 3
135 +#define PCI_REQ1 0x0040
136 +#define PCI_REQ2 0x0080
137 +#define PCI_REQ3 0x0100
138 +#define PCI_REQ_SHIFT 6
140 +#define PCI_CLOCK_INT 0
141 +#define PCI_CLOCK_EXT 1
143 +struct lq_pci_data {
149 +extern int (*ifxmips_pci_plat_dev_init)(struct pci_dev *dev);