target/linux/at91/patches-2.6.22/009-fdl-uartinit.patch

   1 Index: linux-2.6.22.19/arch/arm/mach-at91/at91rm9200_devices.c
   2 ===================================================================
   3 --- linux-2.6.22.19.orig/arch/arm/mach-at91/at91rm9200_devices.c
   4 +++ linux-2.6.22.19/arch/arm/mach-at91/at91rm9200_devices.c
   5 @@ -721,6 +721,10 @@ static inline void configure_usart0_pins
   6          *  We need to drive the pin manually.  Default is off (RTS is active low).
   7          */
   8         at91_set_gpio_output(AT91_PIN_PA21, 1);
   9 +       at91_set_gpio_output(AT91_PIN_PB6, 1);  /* DTR0 */
  10 +       at91_set_gpio_output(AT91_PIN_PB7, 1);  /* RI0 */
  11 +       at91_set_gpio_input(AT91_PIN_PA19, 1);  /* DCD0 */
  12 +       at91_set_deglitch(AT91_PIN_PA19, 1);
  13  }
  14
  15  static struct resource uart1_resources[] = {
  16 @@ -832,6 +836,12 @@ static inline void configure_usart3_pins
  17  {
  18         at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
  19         at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
  20 +       at91_set_B_periph(AT91_PIN_PB0, 0);   /* RTS3 */
  21 +       at91_set_B_periph(AT91_PIN_PB1, 0);   /* CTS3 */
  22 +       at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
  23 +       at91_set_gpio_output(AT91_PIN_PB2, 1);  /* RI0 */
  24 +       at91_set_gpio_input(AT91_PIN_PA24, 1);  /* DCD0 */
  25 +       at91_set_deglitch(AT91_PIN_PA24, 1);
  26  }
  27
  28  struct platform_device *at91_uarts[ATMEL_MAX_UART];    /* the UARTs to use */