[adm5120] add initial failsafe support
[openwrt.git] / target / linux / brcm63xx / patches / 001-bcm963xx.patch
1 Index: linux-2.6.24.7/arch/mips/Kconfig
2 ===================================================================
3 --- linux-2.6.24.7.orig/arch/mips/Kconfig
4 +++ linux-2.6.24.7/arch/mips/Kconfig
5 @@ -67,6 +67,17 @@ config BCM47XX
6 help
7 Support for BCM47XX based boards
8
9 +config BCM963XX
10 + bool "Support for Broadcom BCM963xx SoC"
11 + select SYS_SUPPORTS_32BIT_KERNEL
12 + select SYS_SUPPORTS_BIG_ENDIAN
13 + select SYS_HAS_CPU_MIPS32_R1
14 + select HW_HAS_PCI
15 + select DMA_NONCOHERENT
16 + select IRQ_CPU
17 + help
18 + This is a fmaily of boards based on the Broadcom MIPS32
19 +
20 config MIPS_COBALT
21 bool "Cobalt Server"
22 select CEVT_R4K
23 Index: linux-2.6.24.7/arch/mips/kernel/cpu-probe.c
24 ===================================================================
25 --- linux-2.6.24.7.orig/arch/mips/kernel/cpu-probe.c
26 +++ linux-2.6.24.7/arch/mips/kernel/cpu-probe.c
27 @@ -796,6 +796,18 @@ static inline void cpu_probe_broadcom(st
28 case PRID_IMP_BCM4710:
29 c->cputype = CPU_BCM4710;
30 break;
31 +// case PRID_IMP_BCM6338:
32 +// c->cputype = CPU_BCM6338;
33 +// break;
34 + case PRID_IMP_BCM6345:
35 + c->cputype = CPU_BCM6345;
36 + break;
37 + case PRID_IMP_BCM6348:
38 + c->cputype = CPU_BCM6348;
39 + break;
40 + case PRID_IMP_BCM6358:
41 + c->cputype = CPU_BCM6358;
42 + break;
43 default:
44 c->cputype = CPU_UNKNOWN;
45 break;
46 @@ -878,6 +890,10 @@ static __init const char *cpu_to_name(st
47 case CPU_SR71000: name = "Sandcraft SR71000"; break;
48 case CPU_BCM3302: name = "Broadcom BCM3302"; break;
49 case CPU_BCM4710: name = "Broadcom BCM4710"; break;
50 + case CPU_BCM6338: name = "Broadcom BCM6338"; break;
51 + case CPU_BCM6345: name = "Broadcom BCM6345"; break;
52 + case CPU_BCM6348: name = "Broadcom BCM6348"; break;
53 + case CPU_BCM6358: name = "Broadcom BCM6358"; break;
54 case CPU_PR4450: name = "Philips PR4450"; break;
55 case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
56 default:
57 Index: linux-2.6.24.7/arch/mips/Makefile
58 ===================================================================
59 --- linux-2.6.24.7.orig/arch/mips/Makefile
60 +++ linux-2.6.24.7/arch/mips/Makefile
61 @@ -543,6 +543,10 @@ core-$(CONFIG_BCM47XX) += arch/mips/bcm
62 cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx
63 load-$(CONFIG_BCM47XX) := 0xffffffff80001000
64
65 +core-$(CONFIG_BCM963XX) += arch/mips/bcm963xx/
66 +cflags-$(CONFIG_BCM963XX) += -Iinclude/asm-mips/mach-bcm963xx
67 +load-$(CONFIG_BCM963XX) := 0xffffffff8001000
68 +
69 #
70 # SNI RM
71 #
72 Index: linux-2.6.24.7/arch/mips/mm/c-r4k.c
73 ===================================================================
74 --- linux-2.6.24.7.orig/arch/mips/mm/c-r4k.c
75 +++ linux-2.6.24.7/arch/mips/mm/c-r4k.c
76 @@ -878,6 +878,13 @@ static void __init probe_pcache(void)
77 if (!(config & MIPS_CONF_M))
78 panic("Don't know how to probe P-caches on this cpu.");
79
80 + if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348 || c->cputype == CPU_BCM6358)
81 + {
82 + printk("bcm963xx: enabling icache and dcache...\n");
83 + /* Enable caches */
84 + write_c0_diag(read_c0_diag() | 0xC0000000);
85 + }
86 +
87 /*
88 * So we seem to be a MIPS32 or MIPS64 CPU
89 * So let's probe the I-cache ...
90 Index: linux-2.6.24.7/arch/mips/mm/tlbex.c
91 ===================================================================
92 --- linux-2.6.24.7.orig/arch/mips/mm/tlbex.c
93 +++ linux-2.6.24.7/arch/mips/mm/tlbex.c
94 @@ -909,6 +909,10 @@ static __init void build_tlb_write_entry
95 case CPU_25KF:
96 case CPU_BCM3302:
97 case CPU_BCM4710:
98 +// case CPU_BCM6338:
99 + case CPU_BCM6345:
100 + case CPU_BCM6348:
101 + case CPU_BCM6358:
102 case CPU_LOONGSON2:
103 if (m4kc_tlbp_war())
104 i_nop(p);
105 Index: linux-2.6.24.7/arch/mips/pci/Makefile
106 ===================================================================
107 --- linux-2.6.24.7.orig/arch/mips/pci/Makefile
108 +++ linux-2.6.24.7/arch/mips/pci/Makefile
109 @@ -48,3 +48,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-
110 obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
111 obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
112 obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
113 +obj-$(CONFIG_BCM963XX) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
114 Index: linux-2.6.24.7/include/asm-mips/bootinfo.h
115 ===================================================================
116 --- linux-2.6.24.7.orig/include/asm-mips/bootinfo.h
117 +++ linux-2.6.24.7/include/asm-mips/bootinfo.h
118 @@ -197,6 +197,10 @@
119 */
120 #define MACH_GROUP_BRCM 23 /* Broadcom */
121 #define MACH_BCM47XX 1 /* Broadcom BCM47XX */
122 +#define MACH_BCM96338 2
123 +#define MACH_BCM96345 3
124 +#define MACH_BCM96348 4
125 +#define MACH_BCM96358 5
126
127 #define CL_SIZE COMMAND_LINE_SIZE
128
129 Index: linux-2.6.24.7/include/asm-mips/cpu.h
130 ===================================================================
131 --- linux-2.6.24.7.orig/include/asm-mips/cpu.h
132 +++ linux-2.6.24.7/include/asm-mips/cpu.h
133 @@ -111,6 +111,10 @@
134
135 #define PRID_IMP_BCM4710 0x4000
136 #define PRID_IMP_BCM3302 0x9000
137 +//#define PRID_IMP_BCM6338 0x9000
138 +#define PRID_IMP_BCM6345 0x8000
139 +#define PRID_IMP_BCM6348 0x9100
140 +#define PRID_IMP_BCM6358 0xA000
141
142 /*
143 * Definitions for 7:0 on legacy processors
144 @@ -196,7 +200,8 @@ enum cpu_type_enum {
145 */
146 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000,
147 CPU_AU1100, CPU_AU1200, CPU_AU1500, CPU_AU1550, CPU_PR4450,
148 - CPU_BCM3302, CPU_BCM4710,
149 + CPU_BCM3302, CPU_BCM4710, CPU_BCM6338, CPU_BCM6345, CPU_BCM6348,
150 + CPU_BCM6358,
151
152 /*
153 * MIPS64 class processors
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