2 * drivers/pwm/atmel-pwm.c
4 * Copyright (C) 2010 Bill Gatliff <bgat@billgatliff.com>
5 * Copyright (C) 2007 David Brownell
7 * This program is free software; you may redistribute and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/clk.h>
25 #include <linux/err.h>
27 #include <linux/interrupt.h>
28 #include <linux/platform_device.h>
29 #include <linux/slab.h>
30 #include <linux/pwm/pwm.h>
33 /* registers common to the PWMC peripheral */
43 /* registers per each PWMC channel */
50 /* how to find each channel */
51 PWMC_CHAN_BASE
= 0x200,
52 PWMC_CHAN_STRIDE
= 0x20,
54 /* CMR bits of interest */
58 PWMC_CMR_CPRE_MASK
= 0xf,
62 struct pwm_device pwm
;
71 static inline struct atmel_pwm
*to_atmel_pwm(const struct pwm_channel
*p
)
73 return container_of(p
->pwm
, struct atmel_pwm
, pwm
);
77 pwmc_writel(const struct atmel_pwm
*p
,
78 unsigned offset
, u32 val
)
80 __raw_writel(val
, p
->iobase
+ offset
);
84 pwmc_readl(const struct atmel_pwm
*p
,
87 return __raw_readl(p
->iobase
+ offset
);
91 pwmc_chan_writel(const struct pwm_channel
*p
,
94 const struct atmel_pwm
*ap
= to_atmel_pwm(p
);
96 if (PWMC_CMR
== offset
)
97 val
&= ((1 << PWMC_CMR_CPD
)
98 | (1 << PWMC_CMR_CPOL
)
99 | (1 << PWMC_CMR_CALG
)
100 | (PWMC_CMR_CPRE_MASK
));
102 val
&= ap
->ccnt_mask
;
104 pwmc_writel(ap
, offset
+ PWMC_CHAN_BASE
105 + (p
->chan
* PWMC_CHAN_STRIDE
), val
);
109 pwmc_chan_readl(const struct pwm_channel
*p
,
112 const struct atmel_pwm
*ap
= to_atmel_pwm(p
);
114 return pwmc_readl(ap
, offset
+ PWMC_CHAN_BASE
115 + (p
->chan
* PWMC_CHAN_STRIDE
));
119 __atmel_pwm_is_on(struct pwm_channel
*p
)
121 struct atmel_pwm
*ap
= to_atmel_pwm(p
);
122 return (pwmc_readl(ap
, PWMC_SR
) & (1 << p
->chan
)) ? 1 : 0;
126 __atmel_pwm_unsynchronize(struct pwm_channel
*p
,
127 struct pwm_channel
*to_p
)
129 const struct atmel_pwm
*ap
= to_atmel_pwm(p
);
133 ap
->sync_mask
[p
->chan
] &= ~(1 << to_p
->chan
);
134 ap
->sync_mask
[to_p
->chan
] &= ~(1 << p
->chan
);
138 ap
->sync_mask
[p
->chan
] = 0;
139 for (wchan
= 0; wchan
< ap
->pwm
.nchan
; wchan
++)
140 ap
->sync_mask
[wchan
] &= ~(1 << p
->chan
);
142 dev_dbg(p
->pwm
->dev
, "sync_mask %x\n", ap
->sync_mask
[p
->chan
]);
146 __atmel_pwm_synchronize(struct pwm_channel
*p
,
147 struct pwm_channel
*to_p
)
149 const struct atmel_pwm
*ap
= to_atmel_pwm(p
);
154 ap
->sync_mask
[p
->chan
] |= (1 << to_p
->chan
);
155 ap
->sync_mask
[to_p
->chan
] |= (1 << p
->chan
);
157 dev_dbg(p
->pwm
->dev
, "sync_mask %x\n", ap
->sync_mask
[p
->chan
]);
161 __atmel_pwm_stop(struct pwm_channel
*p
)
163 struct atmel_pwm
*ap
= to_atmel_pwm(p
);
164 u32 chid
= 1 << p
->chan
;
166 pwmc_writel(ap
, PWMC_DIS
, ap
->sync_mask
[p
->chan
] | chid
);
170 __atmel_pwm_start(struct pwm_channel
*p
)
172 struct atmel_pwm
*ap
= to_atmel_pwm(p
);
173 u32 chid
= 1 << p
->chan
;
175 pwmc_writel(ap
, PWMC_ENA
, ap
->sync_mask
[p
->chan
] | chid
);
179 atmel_pwm_synchronize(struct pwm_channel
*p
,
180 struct pwm_channel
*to_p
)
183 spin_lock_irqsave(&p
->lock
, flags
);
184 __atmel_pwm_synchronize(p
, to_p
);
185 spin_unlock_irqrestore(&p
->lock
, flags
);
190 atmel_pwm_unsynchronize(struct pwm_channel
*p
,
191 struct pwm_channel
*from_p
)
194 spin_lock_irqsave(&p
->lock
, flags
);
195 __atmel_pwm_unsynchronize(p
, from_p
);
196 spin_unlock_irqrestore(&p
->lock
, flags
);
201 __atmel_pwm_config_polarity(struct pwm_channel
*p
,
202 struct pwm_channel_config
*c
)
204 u32 cmr
= pwmc_chan_readl(p
, PWMC_CMR
);
207 cmr
&= ~BIT(PWMC_CMR_CPOL
);
209 cmr
|= BIT(PWMC_CMR_CPOL
);
210 pwmc_chan_writel(p
, PWMC_CMR
, cmr
);
211 p
->active_high
= c
->polarity
? 1 : 0;
213 dev_dbg(p
->pwm
->dev
, "polarity %d\n", c
->polarity
);
218 __atmel_pwm_config_duty_ticks(struct pwm_channel
*p
,
219 struct pwm_channel_config
*c
)
221 u32 cmr
, cprd
, cpre
, cdty
;
223 cmr
= pwmc_chan_readl(p
, PWMC_CMR
);
224 cprd
= pwmc_chan_readl(p
, PWMC_CPRD
);
226 cpre
= cmr
& PWMC_CMR_CPRE_MASK
;
227 cmr
&= ~BIT(PWMC_CMR_CPD
);
229 cdty
= cprd
- (c
->duty_ticks
>> cpre
);
231 p
->duty_ticks
= c
->duty_ticks
;
233 if (__atmel_pwm_is_on(p
)) {
234 pwmc_chan_writel(p
, PWMC_CMR
, cmr
);
235 pwmc_chan_writel(p
, PWMC_CUPD
, cdty
);
237 pwmc_chan_writel(p
, PWMC_CDTY
, cdty
);
239 dev_dbg(p
->pwm
->dev
, "duty_ticks = %lu cprd = %x"
240 " cdty = %x cpre = %x\n", p
->duty_ticks
,
247 __atmel_pwm_config_period_ticks(struct pwm_channel
*p
,
248 struct pwm_channel_config
*c
)
252 cpre
= fls(c
->period_ticks
);
261 cmr
= pwmc_chan_readl(p
, PWMC_CMR
);
262 cmr
&= ~PWMC_CMR_CPRE_MASK
;
265 cprd
= c
->period_ticks
>> cpre
;
267 pwmc_chan_writel(p
, PWMC_CMR
, cmr
);
268 pwmc_chan_writel(p
, PWMC_CPRD
, cprd
);
269 p
->period_ticks
= c
->period_ticks
;
271 dev_dbg(p
->pwm
->dev
, "period_ticks = %lu cprd = %x cpre = %x\n",
272 p
->period_ticks
, cprd
, cpre
);
278 atmel_pwm_config_nosleep(struct pwm_channel
*p
,
279 struct pwm_channel_config
*c
)
284 spin_lock_irqsave(&p
->lock
, flags
);
286 switch (c
->config_mask
) {
288 case PWM_CONFIG_DUTY_TICKS
:
289 __atmel_pwm_config_duty_ticks(p
, c
);
292 case PWM_CONFIG_STOP
:
296 case PWM_CONFIG_START
:
297 __atmel_pwm_start(p
);
300 case PWM_CONFIG_POLARITY
:
301 __atmel_pwm_config_polarity(p
, c
);
309 spin_unlock_irqrestore(&p
->lock
, flags
);
314 atmel_pwm_stop_sync(struct pwm_channel
*p
)
316 struct atmel_pwm
*ap
= container_of(p
->pwm
, struct atmel_pwm
, pwm
);
318 int was_on
= __atmel_pwm_is_on(p
);
322 init_completion(&p
->complete
);
323 set_bit(FLAG_STOP
, &p
->flags
);
324 pwmc_writel(ap
, PWMC_IER
, 1 << p
->chan
);
326 dev_dbg(p
->pwm
->dev
, "waiting on stop_sync completion...\n");
328 ret
= wait_for_completion_interruptible(&p
->complete
);
330 dev_dbg(p
->pwm
->dev
, "stop_sync complete (%d)\n", ret
);
334 } while (p
->flags
& BIT(FLAG_STOP
));
341 atmel_pwm_config(struct pwm_channel
*p
,
342 struct pwm_channel_config
*c
)
346 if (p
->pwm
->config_nosleep
) {
347 if (!p
->pwm
->config_nosleep(p
, c
))
353 dev_dbg(p
->pwm
->dev
, "config_mask %x\n", c
->config_mask
);
355 was_on
= atmel_pwm_stop_sync(p
);
359 if (c
->config_mask
& PWM_CONFIG_PERIOD_TICKS
) {
360 __atmel_pwm_config_period_ticks(p
, c
);
361 if (!(c
->config_mask
& PWM_CONFIG_DUTY_TICKS
)) {
362 struct pwm_channel_config d
= {
363 .config_mask
= PWM_CONFIG_DUTY_TICKS
,
364 .duty_ticks
= p
->duty_ticks
,
366 __atmel_pwm_config_duty_ticks(p
, &d
);
370 if (c
->config_mask
& PWM_CONFIG_DUTY_TICKS
)
371 __atmel_pwm_config_duty_ticks(p
, c
);
373 if (c
->config_mask
& PWM_CONFIG_POLARITY
)
374 __atmel_pwm_config_polarity(p
, c
);
376 if ((c
->config_mask
& PWM_CONFIG_START
)
377 || (was_on
&& !(c
->config_mask
& PWM_CONFIG_STOP
)))
378 __atmel_pwm_start(p
);
384 __atmel_pwm_set_callback(struct pwm_channel
*p
,
385 pwm_callback_t callback
)
387 struct atmel_pwm
*ap
= container_of(p
->pwm
, struct atmel_pwm
, pwm
);
389 p
->callback
= callback
;
390 pwmc_writel(ap
, p
->callback
? PWMC_IER
: PWMC_IDR
, 1 << p
->chan
);
394 atmel_pwm_set_callback(struct pwm_channel
*p
,
395 pwm_callback_t callback
)
397 struct atmel_pwm
*ap
= to_atmel_pwm(p
);
400 spin_lock_irqsave(&ap
->lock
, flags
);
401 __atmel_pwm_set_callback(p
, callback
);
402 spin_unlock_irqrestore(&ap
->lock
, flags
);
408 atmel_pwm_request(struct pwm_channel
*p
)
410 struct atmel_pwm
*ap
= to_atmel_pwm(p
);
413 spin_lock_irqsave(&p
->lock
, flags
);
415 p
->tick_hz
= clk_get_rate(ap
->clk
);
416 __atmel_pwm_unsynchronize(p
, NULL
);
418 spin_unlock_irqrestore(&p
->lock
, flags
);
424 atmel_pwm_free(struct pwm_channel
*p
)
426 struct atmel_pwm
*ap
= to_atmel_pwm(p
);
427 clk_disable(ap
->clk
);
431 atmel_pwmc_irq(int irq
, void *data
)
433 struct atmel_pwm
*ap
= data
;
434 struct pwm_channel
*p
;
439 spin_lock_irqsave(&ap
->lock
, flags
);
441 isr
= pwmc_readl(ap
, PWMC_ISR
);
442 for (chid
= 0; isr
; chid
++, isr
>>= 1) {
443 p
= &ap
->pwm
.channels
[chid
];
447 if (p
->flags
& BIT(FLAG_STOP
)) {
449 clear_bit(FLAG_STOP
, &p
->flags
);
451 complete_all(&p
->complete
);
455 spin_unlock_irqrestore(&ap
->lock
, flags
);
461 atmel_pwmc_probe(struct platform_device
*pdev
)
463 struct atmel_pwm
*ap
;
464 struct resource
*r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
467 ap
= kzalloc(sizeof(*ap
), GFP_KERNEL
);
470 goto err_atmel_pwm_alloc
;
473 spin_lock_init(&ap
->lock
);
474 platform_set_drvdata(pdev
, ap
);
476 ap
->pwm
.dev
= &pdev
->dev
;
477 ap
->pwm
.bus_id
= dev_name(&pdev
->dev
);
479 ap
->pwm
.nchan
= 4; /* TODO: true only for SAM9263 and AP7000 */
480 ap
->ccnt_mask
= 0xffffUL
; /* TODO: true only for SAM9263 */
482 ap
->sync_mask
= kzalloc(ap
->pwm
.nchan
* sizeof(u32
), GFP_KERNEL
);
483 if (!ap
->sync_mask
) {
485 goto err_alloc_sync_masks
;
488 ap
->pwm
.owner
= THIS_MODULE
;
489 ap
->pwm
.request
= atmel_pwm_request
;
490 ap
->pwm
.free
= atmel_pwm_free
;
491 ap
->pwm
.config_nosleep
= atmel_pwm_config_nosleep
;
492 ap
->pwm
.config
= atmel_pwm_config
;
493 ap
->pwm
.synchronize
= atmel_pwm_synchronize
;
494 ap
->pwm
.unsynchronize
= atmel_pwm_unsynchronize
;
495 ap
->pwm
.set_callback
= atmel_pwm_set_callback
;
497 ap
->clk
= clk_get(&pdev
->dev
, "pwm_clk");
498 if (PTR_ERR(ap
->clk
)) {
503 ap
->iobase
= ioremap_nocache(r
->start
, r
->end
- r
->start
+ 1);
510 pwmc_writel(ap
, PWMC_DIS
, -1);
511 pwmc_writel(ap
, PWMC_IDR
, -1);
512 clk_disable(ap
->clk
);
514 ap
->irq
= platform_get_irq(pdev
, 0);
515 if (ap
->irq
!= -ENXIO
) {
516 ret
= request_irq(ap
->irq
, atmel_pwmc_irq
, 0,
519 goto err_request_irq
;
522 ret
= pwm_register(&ap
->pwm
);
524 goto err_pwm_register
;
529 if (ap
->irq
!= -ENXIO
)
530 free_irq(ap
->irq
, ap
);
536 platform_set_drvdata(pdev
, NULL
);
537 err_alloc_sync_masks
:
544 atmel_pwmc_remove(struct platform_device
*pdev
)
546 struct atmel_pwm
*ap
= platform_get_drvdata(pdev
);
549 /* TODO: what can we do if this fails? */
550 ret
= pwm_unregister(&ap
->pwm
);
553 pwmc_writel(ap
, PWMC_IDR
, -1);
554 pwmc_writel(ap
, PWMC_DIS
, -1);
555 clk_disable(ap
->clk
);
557 if (ap
->irq
!= -ENXIO
)
558 free_irq(ap
->irq
, ap
);
568 static struct platform_driver atmel_pwm_driver
= {
570 .name
= "atmel_pwmc",
571 .owner
= THIS_MODULE
,
573 .probe
= atmel_pwmc_probe
,
574 .remove
= __devexit_p(atmel_pwmc_remove
),
577 static int __init
atmel_pwm_init(void)
579 return platform_driver_register(&atmel_pwm_driver
);
581 module_init(atmel_pwm_init
);
583 static void __exit
atmel_pwm_exit(void)
585 platform_driver_unregister(&atmel_pwm_driver
);
587 module_exit(atmel_pwm_exit
);
589 MODULE_AUTHOR("Bill Gatliff <bgat@billgatliff.com>");
590 MODULE_DESCRIPTION("Driver for Atmel PWMC peripheral");
591 MODULE_LICENSE("GPL");
592 MODULE_ALIAS("platform:atmel_pwmc");