2 * NAND flash driver for the MikroTik RouterBOARD 750
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/mtd/nand.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/platform_device.h>
17 #include <linux/slab.h>
19 #include <asm/mach-ar71xx/ar71xx.h>
20 #include <asm/mach-ar71xx/mach-rb750.h>
22 #define DRV_NAME "rb750-nand"
23 #define DRV_VERSION "0.1.0"
24 #define DRV_DESC "NAND flash driver for the RouterBOARD 750"
26 #define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
27 #define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
28 #define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
29 #define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
30 #define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
31 #define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
32 #define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE)
34 #define RB750_NAND_DATA_SHIFT 1
35 #define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
36 #define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
37 #define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
38 RB750_NAND_NRE | RB750_NAND_NWE | \
41 struct rb750_nand_info
{
42 struct nand_chip chip
;
47 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
48 * will not be able to find the kernel that we load.
50 static struct nand_ecclayout rb750_nand_ecclayout
= {
52 .eccpos
= { 8, 9, 10, 13, 14, 15 },
54 .oobfree
= { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
57 static struct mtd_partition rb750_nand_partitions
[] = {
62 .mask_flags
= MTD_WRITEABLE
,
65 .offset
= (256 * 1024),
66 .size
= (4 * 1024 * 1024) - (256 * 1024),
69 .offset
= MTDPART_OFS_NXTBLK
,
70 .size
= MTDPART_SIZ_FULL
,
74 static void rb750_nand_write(const u8
*buf
, unsigned len
)
76 void __iomem
*base
= ar71xx_gpio_base
;
80 /* set data lines to output mode */
81 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) | RB750_NAND_DATA_BITS
,
84 out
= __raw_readl(base
+ GPIO_REG_OUT
);
85 out
&= ~(RB750_NAND_DATA_BITS
| RB750_NAND_NWE
);
86 for (i
= 0; i
!= len
; i
++) {
90 data
<<= RB750_NAND_DATA_SHIFT
;
92 __raw_writel(data
, base
+ GPIO_REG_OUT
);
94 __raw_writel(data
| RB750_NAND_NWE
, base
+ GPIO_REG_OUT
);
96 __raw_readl(base
+ GPIO_REG_OUT
);
99 /* set data lines to input mode */
100 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) & ~RB750_NAND_DATA_BITS
,
103 __raw_readl(base
+ GPIO_REG_OE
);
106 static int rb750_nand_read_verify(u8
*read_buf
, unsigned len
,
107 const u8
*verify_buf
)
109 void __iomem
*base
= ar71xx_gpio_base
;
112 for (i
= 0; i
< len
; i
++) {
115 /* activate RE line */
116 __raw_writel(RB750_NAND_NRE
, base
+ GPIO_REG_CLEAR
);
118 __raw_readl(base
+ GPIO_REG_CLEAR
);
120 /* read input lines */
121 data
= __raw_readl(base
+ GPIO_REG_IN
) >> RB750_NAND_DATA_SHIFT
;
123 /* deactivate RE line */
124 __raw_writel(RB750_NAND_NRE
, base
+ GPIO_REG_SET
);
128 else if (verify_buf
&& verify_buf
[i
] != data
)
135 static void rb750_nand_select_chip(struct mtd_info
*mtd
, int chip
)
137 void __iomem
*base
= ar71xx_gpio_base
;
140 func
= __raw_readl(base
+ GPIO_REG_FUNC
);
143 rb750_latch_change(RB750_LVC573_LE
, 0);
145 /* disable alternate functions */
146 ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE
,
147 AR724X_GPIO_FUNC_SPI_EN
);
149 /* set input mode for data lines */
150 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) &
151 ~RB750_NAND_INPUT_BITS
,
154 /* deactivate RE and WE lines */
155 __raw_writel(RB750_NAND_NRE
| RB750_NAND_NWE
,
156 base
+ GPIO_REG_SET
);
158 (void) __raw_readl(base
+ GPIO_REG_SET
);
160 /* activate CE line */
161 __raw_writel(RB750_NAND_NCE
, base
+ GPIO_REG_CLEAR
);
163 /* deactivate CE line */
164 __raw_writel(RB750_NAND_NCE
, base
+ GPIO_REG_SET
);
166 (void) __raw_readl(base
+ GPIO_REG_SET
);
168 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) |
169 RB750_NAND_IO0
| RB750_NAND_RDY
,
172 /* restore alternate functions */
173 ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN
,
174 AR724X_GPIO_FUNC_JTAG_DISABLE
);
177 rb750_latch_change(0, RB750_LVC573_LE
);
181 static int rb750_nand_dev_ready(struct mtd_info
*mtd
)
183 void __iomem
*base
= ar71xx_gpio_base
;
185 return !!(__raw_readl(base
+ GPIO_REG_IN
) & RB750_NAND_RDY
);
188 static void rb750_nand_cmd_ctrl(struct mtd_info
*mtd
, int cmd
,
191 if (ctrl
& NAND_CTRL_CHANGE
) {
192 void __iomem
*base
= ar71xx_gpio_base
;
195 t
= __raw_readl(base
+ GPIO_REG_OUT
);
197 t
&= ~(RB750_NAND_CLE
| RB750_NAND_ALE
);
198 t
|= (ctrl
& NAND_CLE
) ? RB750_NAND_CLE
: 0;
199 t
|= (ctrl
& NAND_ALE
) ? RB750_NAND_ALE
: 0;
201 __raw_writel(t
, base
+ GPIO_REG_OUT
);
203 __raw_readl(base
+ GPIO_REG_OUT
);
206 if (cmd
!= NAND_CMD_NONE
) {
208 rb750_nand_write(&t
, 1);
212 static u8
rb750_nand_read_byte(struct mtd_info
*mtd
)
215 rb750_nand_read_verify(&data
, 1, NULL
);
219 static void rb750_nand_read_buf(struct mtd_info
*mtd
, u8
*buf
, int len
)
221 rb750_nand_read_verify(buf
, len
, NULL
);
224 static void rb750_nand_write_buf(struct mtd_info
*mtd
, const u8
*buf
, int len
)
226 rb750_nand_write(buf
, len
);
229 static int rb750_nand_verify_buf(struct mtd_info
*mtd
, const u8
*buf
, int len
)
231 return rb750_nand_read_verify(NULL
, len
, buf
);
234 static void __init
rb750_nand_gpio_init(void)
236 void __iomem
*base
= ar71xx_gpio_base
;
239 out
= __raw_readl(base
+ GPIO_REG_OUT
);
241 /* setup output levels */
242 __raw_writel(RB750_NAND_NCE
| RB750_NAND_NRE
| RB750_NAND_NWE
,
243 base
+ GPIO_REG_SET
);
245 __raw_writel(RB750_NAND_ALE
| RB750_NAND_CLE
,
246 base
+ GPIO_REG_CLEAR
);
248 /* setup input lines */
249 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) & ~(RB750_NAND_INPUT_BITS
),
252 /* setup output lines */
253 __raw_writel(__raw_readl(base
+ GPIO_REG_OE
) | RB750_NAND_OUTPUT_BITS
,
256 rb750_latch_change(~out
& RB750_NAND_IO0
, out
& RB750_NAND_IO0
);
259 static int __init
rb750_nand_probe(struct platform_device
*pdev
)
261 struct rb750_nand_info
*info
;
264 printk(KERN_INFO DRV_DESC
" version " DRV_VERSION
"\n");
266 rb750_nand_gpio_init();
268 info
= kzalloc(sizeof(*info
), GFP_KERNEL
);
272 info
->chip
.priv
= &info
;
273 info
->mtd
.priv
= &info
->chip
;
274 info
->mtd
.owner
= THIS_MODULE
;
276 info
->chip
.select_chip
= rb750_nand_select_chip
;
277 info
->chip
.cmd_ctrl
= rb750_nand_cmd_ctrl
;
278 info
->chip
.dev_ready
= rb750_nand_dev_ready
;
279 info
->chip
.read_byte
= rb750_nand_read_byte
;
280 info
->chip
.write_buf
= rb750_nand_write_buf
;
281 info
->chip
.read_buf
= rb750_nand_read_buf
;
282 info
->chip
.verify_buf
= rb750_nand_verify_buf
;
284 info
->chip
.chip_delay
= 25;
285 info
->chip
.ecc
.mode
= NAND_ECC_SOFT
;
286 info
->chip
.options
|= NAND_NO_AUTOINCR
;
288 platform_set_drvdata(pdev
, info
);
290 ret
= nand_scan_ident(&info
->mtd
, 1);
296 if (info
->mtd
.writesize
== 512)
297 info
->chip
.ecc
.layout
= &rb750_nand_ecclayout
;
299 ret
= nand_scan_tail(&info
->mtd
);
302 goto err_set_drvdata
;
305 #ifdef CONFIG_MTD_PARTITIONS
306 ret
= add_mtd_partitions(&info
->mtd
, rb750_nand_partitions
,
307 ARRAY_SIZE(rb750_nand_partitions
));
309 ret
= add_mtd_device(&info
->mtd
);
312 goto err_release_nand
;
317 nand_release(&info
->mtd
);
319 platform_set_drvdata(pdev
, NULL
);
325 static int __devexit
rb750_nand_remove(struct platform_device
*pdev
)
327 struct rb750_nand_info
*info
= platform_get_drvdata(pdev
);
329 nand_release(&info
->mtd
);
330 platform_set_drvdata(pdev
, NULL
);
336 static struct platform_driver rb750_nand_driver
= {
337 .probe
= rb750_nand_probe
,
338 .remove
= __devexit_p(rb750_nand_remove
),
341 .owner
= THIS_MODULE
,
345 static int __init
rb750_nand_init(void)
347 return platform_driver_register(&rb750_nand_driver
);
350 static void __exit
rb750_nand_exit(void)
352 platform_driver_unregister(&rb750_nand_driver
);
355 module_init(rb750_nand_init
);
356 module_exit(rb750_nand_exit
);
358 MODULE_DESCRIPTION(DRV_DESC
);
359 MODULE_VERSION(DRV_VERSION
);
360 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
361 MODULE_LICENSE("GPL v2");